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drm/i915/gvt: add 0xe4f0 into gen9 render list
authorWeinan Li <weinan.z.li@intel.com>
Fri, 9 Feb 2018 08:01:34 +0000 (16:01 +0800)
committerZhenyu Wang <zhenyuw@linux.intel.com>
Wed, 14 Feb 2018 02:34:30 +0000 (10:34 +0800)
commit37ad4e68783088ed61493f54194cfccd3c87ab35
tree144fcb08878feea4236b0dd6dd17b1c22945d140tree | snapshot
parent4b8b41d15d9db54703958fbd2928a2fd319563f6commit | diff
drm/i915/gvt: add 0xe4f0 into gen9 render list

Guest may set this register on KBL platform, it can impact hardware
behavior, so add it into the gen9 render list. Otherwise gpu hang issue may
happen during different vgpu switch.

v2: separate it from patch set.

Cc: Zhi Wang <zhi.a.wang@intel.com>
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Weinan Li <weinan.z.li@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
drivers/gpu/drm/i915/gvt/mmio_context.c diff | blob | history
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