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riscv: dts: starfive: jh7110: Add syscon nodes
authorWilliam Qiu <william.qiu@starfivetech.com>
Mon, 17 Jul 2023 02:30:39 +0000 (10:30 +0800)
committerConor Dooley <conor.dooley@microchip.com>
Thu, 20 Jul 2023 16:22:30 +0000 (17:22 +0100)
commit3fcbcfc496f0cc08f9dc004a92915ce1cfb7ea95
treec4f82585be7a8368ff36df1ae76d5aeb0e597e12tree | snapshot
parent3d90131f2edb10c802e6741053e3b23b0950981ccommit | diff
riscv: dts: starfive: jh7110: Add syscon nodes

Add stg_syscon/sys_syscon/aon_syscon/PLL nodes for JH7110 SoC.

Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Co-developed-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
arch/riscv/boot/dts/starfive/jh7110.dtsi diff | blob | history
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