]> git.apps.os.sepia.ceph.com Git - ceph-client.git/commit
arm64: dts: marvell: cn9132-clearfog: fix multi-lane pci x2 and x4 ports
authorJosua Mayer <josua@solid-run.com>
Thu, 11 Sep 2025 18:28:06 +0000 (20:28 +0200)
committerGregory CLEMENT <gregory.clement@bootlin.com>
Fri, 12 Sep 2025 12:54:38 +0000 (14:54 +0200)
commit794a066688038df46c01e177cc6faebded0acba4
treef3952b5b2f7ee34c4201b73e93e825ed03b38210
parent48b51799a5461707705454568453618cdd7307f4
arm64: dts: marvell: cn9132-clearfog: fix multi-lane pci x2 and x4 ports

The mvebu-comphy driver does not currently know how to pass correct
lane-count to ATF while configuring the serdes lanes.

This causes the system to hard reset during reconfiguration, if a pci
card is present and has established a link during bootloader.

Remove the comphy handles from the respective pci nodes to avoid runtime
reconfiguration, relying solely on bootloader configuration - while
avoiding the hard reset.

When bootloader has configured the lanes correctly, the pci ports are
functional under Linux.

This issue may be addressed in the comphy driver at a future point.

Fixes: e9ff907f4076 ("arm64: dts: add description for solidrun cn9132 cex7 module and clearfog board")
Cc: stable@vger.kernel.org
Signed-off-by: Josua Mayer <josua@solid-run.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
arch/arm64/boot/dts/marvell/cn9132-clearfog.dts