]> git-server-git.apps.pok.os.sepia.ceph.com Git - ceph-client.git/commit
clk: samsung: Introduce Exynos8895 clock driver
authorIvaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
Wed, 23 Oct 2024 09:01:36 +0000 (12:01 +0300)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Sat, 26 Oct 2024 12:00:12 +0000 (14:00 +0200)
commit9174fac3b302a853b78c78f2f5ad11462b0c54b0
tree7118199883fc87118f531edd4e99fe32499c854f
parenta794e783ebf94c7bd9c8d40e390a54fa4322b2cb
clk: samsung: Introduce Exynos8895 clock driver

CMU_TOP is the top level clock management unit which contains PLLs, muxes,
dividers and gates that feed the other clock management units.

CMU_PERIS provides clocks for GIC and MCT
CMU_FSYS0 provides clocks for USBDRD30
CMU_FSYS1 provides clocks for MMC, UFS and PCIE
CMU_PERIC0 provides clocks for UART_DBG, USI00 ~ USI03
CMU_PERIC1 provides clocks for SPI_CAM0/1, UART_BT, USI04 ~ USI13,
HSI2C_CAM0/1/2/3

Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
Link: https://lore.kernel.org/r/20241023090136.537395-4-ivo.ivanov.ivanov1@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
drivers/clk/samsung/Makefile
drivers/clk/samsung/clk-exynos8895.c [new file with mode: 0644]