]> git.apps.os.sepia.ceph.com Git - ceph-client.git/commit
RISC-V: KVM: Fix pte settings within kvm_riscv_gstage_ioremap()
authorFangyu Yu <fangyu.yu@linux.alibaba.com>
Thu, 7 Aug 2025 07:07:29 +0000 (15:07 +0800)
committerAnup Patel <anup@brainfault.org>
Mon, 25 Aug 2025 04:56:16 +0000 (10:26 +0530)
commit9bca8be646e043d1fc6cd426fef05558c02de3df
treeb93f20136878834864d6c3aca7ca11c66b9e63fe
parent1b237f190eb3d36f52dffe07a40b5eb210280e00
RISC-V: KVM: Fix pte settings within kvm_riscv_gstage_ioremap()

Currently, kvm_riscv_gstage_ioremap() is used to map IMSIC gpa to the
spa of IMSIC guest interrupt file.

The PAGE_KERNEL_IO property includes global setting whereas it does not
include user mode settings, so when accessing the IMSIC address in the
virtual machine, a guest page fault will occur, this is not expected.

According to the RISC-V Privileged Architecture Spec, for G-stage address
translation, all memory accesses are considered to be user-level accesses
as though executed in U-mode.

Fixes: 659ad6d82c31 ("RISC-V: KVM: Use PAGE_KERNEL_IO in kvm_riscv_gstage_ioremap()")
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Reviewed-by: Radim Krčmář <rkrcmar@ventanamicro.com>
Reviewed-by: Nutty Liu <nutty.liu@hotmail.com>
Link: https://lore.kernel.org/r/20250807070729.89701-1-fangyu.yu@linux.alibaba.com
Signed-off-by: Anup Patel <anup@brainfault.org>
arch/riscv/kvm/mmu.c