#include "cs35l41_hda.h"
 
 static const struct reg_sequence cs35l41_hda_config[] = {
-       { CS35L41_PLL_CLK_CTRL,         0x00000430 }, // 3200000Hz, BCLK Input, PLL_REFCLK_EN = 1
+       { CS35L41_PLL_CLK_CTRL,         0x00000430 }, // 3072000Hz, BCLK Input, PLL_REFCLK_EN = 1
        { CS35L41_GLOBAL_CLK_CTRL,      0x00000003 }, // GLOBAL_FS = 48 kHz
        { CS35L41_SP_ENABLES,           0x00010000 }, // ASP_RX1_EN = 1
        { CS35L41_SP_RATE_CTRL,         0x00000021 }, // ASP_BCLK_FREQ = 3.072 MHz
-       { CS35L41_SP_FORMAT,            0x20200200 }, // 24 bits, I2S, BCLK Slave, FSYNC Slave
+       { CS35L41_SP_FORMAT,            0x20200200 }, // 32 bits RX/TX slots, I2S, clk consumer
        { CS35L41_DAC_PCM1_SRC,         0x00000008 }, // DACPCM1_SRC = ASPRX1
        { CS35L41_AMP_DIG_VOL_CTRL,     0x00000000 }, // AMP_VOL_PCM  0.0 dB
        { CS35L41_AMP_GAIN_CTRL,        0x00000084 }, // AMP_GAIN_PCM 4.5 dB