]> git-server-git.apps.pok.os.sepia.ceph.com Git - ceph-client.git/commitdiff
Revert "mtd: spinand: esmt: fix id code for F50D1G41LB"
authorZiyang Huang <hzyitc@outlook.com>
Tue, 2 Dec 2025 15:05:56 +0000 (23:05 +0800)
committerMiquel Raynal <miquel.raynal@bootlin.com>
Tue, 16 Dec 2025 08:08:28 +0000 (09:08 +0100)
This reverts commit dd26402642a0899fde59ea6b0852fad3d799b4cc.

The issue George met is due to the limit of QPIC, not the issue of the
flash chip.

QPIC only supports 4 bytes ID. So the fifth byte is always 0.

If we use spi-gpio, the fifth byte can be read correctly.

Signed-off-by: Ziyang Huang <hzyitc@outlook.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
drivers/mtd/nand/spi/esmt.c

index e60e4ac1fd6fb1c08460926bb4e4c5c3b879a617..3e86f346f751a359bc7c09d599d134f4df8e4162 100644 (file)
@@ -215,7 +215,7 @@ static const struct spinand_info esmt_c8_spinand_table[] = {
                     SPINAND_FACT_OTP_INFO(2, 0, &f50l1g41lb_fact_otp_ops)),
        SPINAND_INFO("F50D1G41LB",
                     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x11, 0x7f,
-                               0x7f),
+                               0x7f, 0x7f),
                     NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
                     NAND_ECCREQ(1, 512),
                     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,