* maximum clocks following a vblank miss (see do_rps_boost()).
         */
        if (!state->rps_interactive) {
-               intel_rps_mark_interactive(&dev_priv->gt.rps, true);
+               intel_rps_mark_interactive(&to_gt(dev_priv)->rps, true);
                state->rps_interactive = true;
        }
 
                return;
 
        if (state->rps_interactive) {
-               intel_rps_mark_interactive(&dev_priv->gt.rps, false);
+               intel_rps_mark_interactive(&to_gt(dev_priv)->rps, false);
                state->rps_interactive = false;
        }
 
 
 static bool gpu_reset_clobbers_display(struct drm_i915_private *dev_priv)
 {
        return (INTEL_INFO(dev_priv)->gpu_reset_clobbers_display &&
-               intel_has_gpu_reset(&dev_priv->gt));
+               intel_has_gpu_reset(to_gt(dev_priv)));
 }
 
 void intel_display_prepare_reset(struct drm_i915_private *dev_priv)
                return;
 
        /* We have a modeset vs reset deadlock, defensively unbreak it. */
-       set_bit(I915_RESET_MODESET, &dev_priv->gt.reset.flags);
+       set_bit(I915_RESET_MODESET, &to_gt(dev_priv)->reset.flags);
        smp_mb__after_atomic();
-       wake_up_bit(&dev_priv->gt.reset.flags, I915_RESET_MODESET);
+       wake_up_bit(&to_gt(dev_priv)->reset.flags, I915_RESET_MODESET);
 
        if (atomic_read(&dev_priv->gpu_error.pending_fb_pin)) {
                drm_dbg_kms(&dev_priv->drm,
                            "Modeset potentially stuck, unbreaking through wedging\n");
-               intel_gt_set_wedged(&dev_priv->gt);
+               intel_gt_set_wedged(to_gt(dev_priv));
        }
 
        /*
                return;
 
        /* reset doesn't touch the display */
-       if (!test_bit(I915_RESET_MODESET, &dev_priv->gt.reset.flags))
+       if (!test_bit(I915_RESET_MODESET, &to_gt(dev_priv)->reset.flags))
                return;
 
        state = fetch_and_zero(&dev_priv->modeset_restore_state);
        drm_modeset_acquire_fini(ctx);
        mutex_unlock(&dev->mode_config.mutex);
 
-       clear_bit_unlock(I915_RESET_MODESET, &dev_priv->gt.reset.flags);
+       clear_bit_unlock(I915_RESET_MODESET, &to_gt(dev_priv)->reset.flags);
 }
 
 static bool underrun_recovery_supported(const struct intel_crtc_state *crtc_state)
 {
        struct drm_i915_private *i915 = to_i915(obj->base.dev);
 
-       return intel_pxp_key_check(&i915->gt.pxp, obj, false) == 0;
+       return intel_pxp_key_check(&to_gt(i915)->pxp, obj, false) == 0;
 }
 
 static bool pxp_is_borked(struct drm_i915_gem_object *obj)
        for (;;) {
                prepare_to_wait(&intel_state->commit_ready.wait,
                                &wait_fence, TASK_UNINTERRUPTIBLE);
-               prepare_to_wait(bit_waitqueue(&dev_priv->gt.reset.flags,
+               prepare_to_wait(bit_waitqueue(&to_gt(dev_priv)->reset.flags,
                                              I915_RESET_MODESET),
                                &wait_reset, TASK_UNINTERRUPTIBLE);
 
 
                if (i915_sw_fence_done(&intel_state->commit_ready) ||
-                   test_bit(I915_RESET_MODESET, &dev_priv->gt.reset.flags))
+                   test_bit(I915_RESET_MODESET, &to_gt(dev_priv)->reset.flags))
                        break;
 
                schedule();
        }
        finish_wait(&intel_state->commit_ready.wait, &wait_fence);
-       finish_wait(bit_waitqueue(&dev_priv->gt.reset.flags,
+       finish_wait(bit_waitqueue(&to_gt(dev_priv)->reset.flags,
                                  I915_RESET_MODESET),
                    &wait_reset);
 }