#define   IRQ_RESP_STATUS BIT(14)
 #define   IRQ_SDIO BIT(15)
 #define   IRQ_EN_MASK \
-       (IRQ_CRC_ERR | IRQ_TIMEOUTS | IRQ_END_OF_CHAIN | IRQ_RESP_STATUS |\
-        IRQ_SDIO)
+       (IRQ_CRC_ERR | IRQ_TIMEOUTS | IRQ_END_OF_CHAIN)
 
 #define SD_EMMC_CMD_CFG 0x50
 #define SD_EMMC_CMD_ARG 0x54
        struct meson_host *host = dev_id;
        struct mmc_command *cmd;
        struct mmc_data *data;
-       u32 irq_en, status, raw_status;
+       u32 status, raw_status;
        irqreturn_t ret = IRQ_NONE;
 
-       irq_en = readl(host->regs + SD_EMMC_IRQ_EN);
        raw_status = readl(host->regs + SD_EMMC_STATUS);
-       status = raw_status & irq_en;
+       status = raw_status & IRQ_EN_MASK;
 
        if (!status) {
                dev_dbg(host->dev,
-                       "Unexpected IRQ! irq_en 0x%08x - status 0x%08x\n",
-                        irq_en, raw_status);
+                       "Unexpected IRQ! irq_en 0x%08lx - status 0x%08x\n",
+                        IRQ_EN_MASK, raw_status);
                return IRQ_NONE;
        }
 
 
        /* clear, ack and enable interrupts */
        writel(0, host->regs + SD_EMMC_IRQ_EN);
-       writel(IRQ_CRC_ERR | IRQ_TIMEOUTS | IRQ_END_OF_CHAIN,
-              host->regs + SD_EMMC_STATUS);
-       writel(IRQ_CRC_ERR | IRQ_TIMEOUTS | IRQ_END_OF_CHAIN,
-              host->regs + SD_EMMC_IRQ_EN);
+       writel(IRQ_EN_MASK, host->regs + SD_EMMC_STATUS);
+       writel(IRQ_EN_MASK, host->regs + SD_EMMC_IRQ_EN);
 
        ret = request_threaded_irq(host->irq, meson_mmc_irq,
                                   meson_mmc_irq_thread, IRQF_ONESHOT,