const struct intel_plane_state *old_plane_state =
                intel_atomic_get_old_plane_state(state, plane);
        const struct intel_plane_state *new_master_plane_state;
-       struct intel_crtc *crtc = intel_get_crtc_for_pipe(i915, plane->pipe);
+       struct intel_crtc *crtc = intel_crtc_for_pipe(i915, plane->pipe);
        const struct intel_crtc_state *old_crtc_state =
                intel_atomic_get_old_crtc_state(state, crtc);
        struct intel_crtc_state *new_crtc_state =
 
                struct intel_crtc_state *crtc_state;
 
                pipe = ilog2(new_cdclk_state->active_pipes);
-               crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
+               crtc = intel_crtc_for_pipe(dev_priv, pipe);
 
                crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
                if (IS_ERR(crtc_state))
 
        if (!encoder->get_hw_state(encoder, &pipe))
                return NULL;
 
-       crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
+       crtc = intel_crtc_for_pipe(dev_priv, pipe);
 
        mode = kzalloc(sizeof(*mode), GFP_KERNEL);
        if (!mode)
        struct intel_plane *plane;
 
        for_each_intel_plane(&dev_priv->drm, plane) {
-               struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv,
-                                                                 plane->pipe);
+               struct intel_crtc *crtc = intel_crtc_for_pipe(dev_priv,
+                                                             plane->pipe);
 
                plane->base.possible_crtcs = drm_crtc_mask(&crtc->base);
        }
 
 void i830_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe)
 {
-       struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
+       struct intel_crtc *crtc = intel_crtc_for_pipe(dev_priv, pipe);
        /* 640x480@60Hz, ~25175 kHz */
        struct dpll clock = {
                .m1 = 18,
 
 void i830_disable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe)
 {
-       struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
+       struct intel_crtc *crtc = intel_crtc_for_pipe(dev_priv, pipe);
 
        drm_dbg_kms(&dev_priv->drm, "disabling pipe %c due to force quirk\n",
                    pipe_name(pipe));
                            "[PLANE:%d:%s] attached to the wrong pipe, disabling plane\n",
                            plane->base.base.id, plane->base.name);
 
-               plane_crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
+               plane_crtc = intel_crtc_for_pipe(dev_priv, pipe);
                intel_plane_disable_noatomic(plane_crtc, plane);
        }
 }
 
                visible = plane->get_hw_state(plane, &pipe);
 
-               crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
+               crtc = intel_crtc_for_pipe(dev_priv, pipe);
                crtc_state = to_intel_crtc_state(crtc->base.state);
 
                intel_set_plane_visible(crtc_state, plane_state, visible);
                pipe = 0;
 
                if (encoder->get_hw_state(encoder, &pipe)) {
-                       crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
+                       crtc = intel_crtc_for_pipe(dev_priv, pipe);
                        crtc_state = to_intel_crtc_state(crtc->base.state);
 
                        encoder->base.crtc = &crtc->base;
 
 }
 
 static inline struct intel_crtc *
-intel_get_crtc_for_pipe(struct drm_i915_private *dev_priv, enum pipe pipe)
+intel_crtc_for_pipe(struct drm_i915_private *dev_priv, enum pipe pipe)
 {
        /* pipe_to_crtc_mapping may have hole on any of 3 display pipe system */
        drm_WARN_ON(&dev_priv->drm,
 static inline void
 intel_wait_for_vblank(struct drm_i915_private *dev_priv, enum pipe pipe)
 {
-       struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
+       struct intel_crtc *crtc = intel_crtc_for_pipe(dev_priv, pipe);
 
        intel_crtc_wait_for_next_vblank(crtc);
 }
 static inline void
 intel_wait_for_vblank_if_active(struct drm_i915_private *dev_priv, enum pipe pipe)
 {
-       struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
+       struct intel_crtc *crtc = intel_crtc_for_pipe(dev_priv, pipe);
 
        if (crtc->active)
                intel_crtc_wait_for_next_vblank(crtc);
 
 int vlv_force_pll_on(struct drm_i915_private *dev_priv, enum pipe pipe,
                     const struct dpll *dpll)
 {
-       struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
+       struct intel_crtc *crtc = intel_crtc_for_pipe(dev_priv, pipe);
        struct intel_crtc_state *crtc_state;
 
        crtc_state = intel_crtc_state_alloc(crtc);
 
                if (pipe_config->fdi_lanes <= 2)
                        return 0;
 
-               other_crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_C);
+               other_crtc = intel_crtc_for_pipe(dev_priv, PIPE_C);
                other_crtc_state =
                        intel_atomic_get_crtc_state(state, other_crtc);
                if (IS_ERR(other_crtc_state))
                        return -EINVAL;
                }
 
-               other_crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_B);
+               other_crtc = intel_crtc_for_pipe(dev_priv, PIPE_B);
                other_crtc_state =
                        intel_atomic_get_crtc_state(state, other_crtc);
                if (IS_ERR(other_crtc_state))
 
        lockdep_assert_held(&dev_priv->irq_lock);
 
        for_each_pipe(dev_priv, pipe) {
-               crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
+               crtc = intel_crtc_for_pipe(dev_priv, pipe);
 
                if (crtc->cpu_fifo_underrun_disabled)
                        return false;
        lockdep_assert_held(&dev_priv->irq_lock);
 
        for_each_pipe(dev_priv, pipe) {
-               crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
+               crtc = intel_crtc_for_pipe(dev_priv, pipe);
 
                if (crtc->pch_fifo_underrun_disabled)
                        return false;
                                                    enum pipe pipe, bool enable)
 {
        struct drm_i915_private *dev_priv = to_i915(dev);
-       struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
+       struct intel_crtc *crtc = intel_crtc_for_pipe(dev_priv, pipe);
        bool old;
 
        lockdep_assert_held(&dev_priv->irq_lock);
                                           bool enable)
 {
        struct intel_crtc *crtc =
-               intel_get_crtc_for_pipe(dev_priv, pch_transcoder);
+               intel_crtc_for_pipe(dev_priv, pch_transcoder);
        unsigned long flags;
        bool old;
 
 void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
                                         enum pipe pipe)
 {
-       struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
+       struct intel_crtc *crtc = intel_crtc_for_pipe(dev_priv, pipe);
        u32 underruns = 0;
 
        /* We may be called too early in init, thanks BIOS! */
 
                 */
                if (!ret && has_dst_key_in_primary_plane(dev_priv)) {
                        struct intel_crtc *crtc =
-                               intel_get_crtc_for_pipe(dev_priv,
-                                                       to_intel_plane(plane)->pipe);
+                               intel_crtc_for_pipe(dev_priv,
+                                                   to_intel_plane(plane)->pipe);
 
                        plane_state = drm_atomic_get_plane_state(state,
                                                                 crtc->base.primary);
 
        if (!intel_pipe_valid(i915, pipe))
                return NULL;
 
-       return intel_get_crtc_for_pipe(i915, pipe);
+       return intel_crtc_for_pipe(i915, pipe);
 }
 
 struct intel_crtc *
 
 static void
 intel_handle_vblank(struct drm_i915_private *dev_priv, enum pipe pipe)
 {
-       struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
+       struct intel_crtc *crtc = intel_crtc_for_pipe(dev_priv, pipe);
 
        drm_crtc_handle_vblank(&crtc->base);
 }
                                         u32 crc2, u32 crc3,
                                         u32 crc4)
 {
-       struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
+       struct intel_crtc *crtc = intel_crtc_for_pipe(dev_priv, pipe);
        struct intel_pipe_crc *pipe_crc = &crtc->pipe_crc;
        u32 crcs[5] = { crc0, crc1, crc2, crc3, crc4 };
 
 static void flip_done_handler(struct drm_i915_private *i915,
                              enum pipe pipe)
 {
-       struct intel_crtc *crtc = intel_get_crtc_for_pipe(i915, pipe);
+       struct intel_crtc *crtc = intel_crtc_for_pipe(i915, pipe);
        struct drm_crtc_state *crtc_state = crtc->base.state;
        struct drm_pending_vblank_event *e = crtc_state->event;
        struct drm_device *dev = &i915->drm;
 
                             ),
 
            TP_fast_assign(
-                           struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
+                           struct intel_crtc *crtc = intel_crtc_for_pipe(dev_priv, pipe);
                           __entry->pipe = pipe;
                           __entry->frame = intel_crtc_get_vblank_counter(crtc);
                           __entry->scanline = intel_get_crtc_scanline(crtc);
 
            TP_fast_assign(
                           enum pipe pipe = pch_transcoder;
-                          struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
+                          struct intel_crtc *crtc = intel_crtc_for_pipe(dev_priv, pipe);
                           __entry->pipe = pipe;
                           __entry->frame = intel_crtc_get_vblank_counter(crtc);
                           __entry->scanline = intel_get_crtc_scanline(crtc);
 
        enum pipe pipe;
 
        for_each_pipe(dev_priv, pipe)
-               trace_g4x_wm(intel_get_crtc_for_pipe(dev_priv, pipe), wm);
+               trace_g4x_wm(intel_crtc_for_pipe(dev_priv, pipe), wm);
 
        intel_uncore_write(&dev_priv->uncore, DSPFW1,
                   FW_WM(wm->sr.plane, SR) |
        enum pipe pipe;
 
        for_each_pipe(dev_priv, pipe) {
-               trace_vlv_wm(intel_get_crtc_for_pipe(dev_priv, pipe), wm);
+               trace_vlv_wm(intel_crtc_for_pipe(dev_priv, pipe), wm);
 
                intel_uncore_write(&dev_priv->uncore, VLV_DDL(pipe),
                           (wm->ddl[pipe].plane[PLANE_CURSOR] << DDL_CURSOR_SHIFT) |
 
        for_each_intel_plane(&dev_priv->drm, plane) {
                struct intel_crtc *crtc =
-                       intel_get_crtc_for_pipe(dev_priv, plane->pipe);
+                       intel_crtc_for_pipe(dev_priv, plane->pipe);
                struct intel_crtc_state *crtc_state =
                        to_intel_crtc_state(crtc->base.state);
                struct intel_plane_state *plane_state =
 
        for_each_intel_plane(&dev_priv->drm, plane) {
                struct intel_crtc *crtc =
-                       intel_get_crtc_for_pipe(dev_priv, plane->pipe);
+                       intel_crtc_for_pipe(dev_priv, plane->pipe);
                struct intel_crtc_state *crtc_state =
                        to_intel_crtc_state(crtc->base.state);
                struct intel_plane_state *plane_state =