#size-cells = <1>;
                ranges;
 
+               nfc_sram: sram@600000 {
+                       compatible = "mmio-sram";
+                       no-memory-wc;
+                       reg = <0x00600000 0x2400>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0 0x00600000 0x2400>;
+               };
+
+               nfc_io: nfc-io@10000000 {
+                       compatible = "atmel,sama5d3-nfc-io", "syscon";
+                       reg = <0x10000000 0x8000000>;
+               };
+
+               ebi: ebi@40000000 {
+                       compatible = "atmel,sama5d3-ebi";
+                       #address-cells = <2>;
+                       #size-cells = <1>;
+                       atmel,smc = <&hsmc>;
+                       reg = <0x40000000 0x20000000>;
+                       ranges = <0x0 0x0 0x40000000 0x8000000
+                                 0x1 0x0 0x48000000 0x8000000
+                                 0x2 0x0 0x50000000 0x8000000
+                                 0x3 0x0 0x58000000 0x8000000>;
+                       clocks = <&pmc PMC_TYPE_CORE PMC_MCK1>;
+                       status = "disabled";
+
+                       nand_controller: nand-controller {
+                               compatible = "atmel,sama5d3-nand-controller";
+                               atmel,nfc-sram = <&nfc_sram>;
+                               atmel,nfc-io = <&nfc_io>;
+                               ecc-engine = <&pmecc>;
+                               #address-cells = <2>;
+                               #size-cells = <1>;
+                               ranges;
+                               status = "disabled";
+                       };
+               };
+
                securam: securam@e0000000 {
                        compatible = "microchip,sama7g5-securam", "atmel,sama5d2-securam", "mmio-sram";
                        reg = <0xe0000000 0x4000>;
                        clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
                };
 
+               hsmc: hsmc@e0808000 {
+                       compatible = "atmel,sama5d2-smc", "syscon", "simple-mfd";
+                       reg = <0xe0808000 0x1000>;
+                       interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
+
+                       pmecc: ecc-engine@e0808070 {
+                               compatible = "atmel,sama5d2-pmecc";
+                               reg = <0xe0808070 0x490>,
+                                     <0xe0808500 0x200>;
+                       };
+               };
+
                qspi0: spi@e080c000 {
                        compatible = "microchip,sama7g5-ospi";
                        reg = <0xe080c000 0x400>, <0x20000000 0x10000000>;