s390: move the XOR code to lib/raid/

Move the optimized XOR into lib/raid and include it it in xor.ko instead
of unconditionally building it into the main kernel image.

Link: https://lkml.kernel.org/r/20260327061704.3707577-19-hch@lst.de
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Heiko Carstens <hca@linux.ibm.com>
Reviewed-by: Eric Biggers <ebiggers@kernel.org>
Tested-by: Eric Biggers <ebiggers@kernel.org>
Cc: Albert Ou <aou@eecs.berkeley.edu>
Cc: Alexander Gordeev <agordeev@linux.ibm.com>
Cc: Alexandre Ghiti <alex@ghiti.fr>
Cc: Andreas Larsson <andreas@gaisler.com>
Cc: Anton Ivanov <anton.ivanov@cambridgegreys.com>
Cc: Ard Biesheuvel <ardb@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: "Borislav Petkov (AMD)" <bp@alien8.de>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Chris Mason <clm@fb.com>
Cc: Christian Borntraeger <borntraeger@linux.ibm.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: David Sterba <dsterba@suse.com>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Huacai Chen <chenhuacai@kernel.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jason A. Donenfeld <jason@zx2c4.com>
Cc: Johannes Berg <johannes@sipsolutions.net>
Cc: Li Nan <linan122@huawei.com>
Cc: Madhavan Srinivasan <maddy@linux.ibm.com>
Cc: Magnus Lindholm <linmag7@gmail.com>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Nicholas Piggin <npiggin@gmail.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Richard Henderson <richard.henderson@linaro.org>
Cc: Richard Weinberger <richard@nod.at>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Song Liu <song@kernel.org>
Cc: Sven Schnelle <svens@linux.ibm.com>
Cc: Ted Ts'o <tytso@mit.edu>
Cc: Vasily Gorbik <gor@linux.ibm.com>
Cc: WANG Xuerui <kernel@xen0n.name>
Cc: Will Deacon <will@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>

diff --git a/arch/s390/lib/Makefile b/arch/s390/lib/Makefile
index f43f897d3fc027ad2f5cbf52ba2abc343b6e31ea..2bf47204f6abd989fb4a866b753354d42b86df36 100644 (file)
--- a/arch/s390/lib/Makefile
+++ b/arch/s390/lib/Makefile
@@ -5,7 +5,7 @@
 
 lib-y += delay.o string.o uaccess.o find.o spinlock.o tishift.o
 lib-y += csum-partial.o
-obj-y += mem.o xor.o
+obj-y += mem.o
 lib-$(CONFIG_KPROBES) += probes.o
 lib-$(CONFIG_UPROBES) += probes.o
 obj-$(CONFIG_S390_KPROBES_SANITY_TEST) += test_kprobes_s390.o

diff --git a/arch/s390/lib/xor.c b/arch/s390/lib/xor.c
deleted file mode 100644 (file)
index 3bbe21b..0000000
--- a/arch/s390/lib/xor.c
+++ /dev/null
@@ -1,136 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Optimized xor_block operation for RAID4/5
- *
- * Copyright IBM Corp. 2016
- * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
- */
-
-#include <linux/types.h>
-#include <linux/export.h>
-#include <linux/raid/xor_impl.h>
-#include <asm/xor.h>
-
-static void xor_xc_2(unsigned long bytes, unsigned long * __restrict p1,
-                    const unsigned long * __restrict p2)
-{
-       asm volatile(
-               "       aghi    %0,-1\n"
-               "       jm      3f\n"
-               "       srlg    0,%0,8\n"
-               "       ltgr    0,0\n"
-               "       jz      1f\n"
-               "0:     xc      0(256,%1),0(%2)\n"
-               "       la      %1,256(%1)\n"
-               "       la      %2,256(%2)\n"
-               "       brctg   0,0b\n"
-               "1:     exrl    %0,2f\n"
-               "       j       3f\n"
-               "2:     xc      0(1,%1),0(%2)\n"
-               "3:"
-               : "+a" (bytes), "+a" (p1), "+a" (p2)
-               : : "0", "cc", "memory");
-}
-
-static void xor_xc_3(unsigned long bytes, unsigned long * __restrict p1,
-                    const unsigned long * __restrict p2,
-                    const unsigned long * __restrict p3)
-{
-       asm volatile(
-               "       aghi    %0,-1\n"
-               "       jm      4f\n"
-               "       srlg    0,%0,8\n"
-               "       ltgr    0,0\n"
-               "       jz      1f\n"
-               "0:     xc      0(256,%1),0(%2)\n"
-               "       xc      0(256,%1),0(%3)\n"
-               "       la      %1,256(%1)\n"
-               "       la      %2,256(%2)\n"
-               "       la      %3,256(%3)\n"
-               "       brctg   0,0b\n"
-               "1:     exrl    %0,2f\n"
-               "       exrl    %0,3f\n"
-               "       j       4f\n"
-               "2:     xc      0(1,%1),0(%2)\n"
-               "3:     xc      0(1,%1),0(%3)\n"
-               "4:"
-               : "+a" (bytes), "+a" (p1), "+a" (p2), "+a" (p3)
-               : : "0", "cc", "memory");
-}
-
-static void xor_xc_4(unsigned long bytes, unsigned long * __restrict p1,
-                    const unsigned long * __restrict p2,
-                    const unsigned long * __restrict p3,
-                    const unsigned long * __restrict p4)
-{
-       asm volatile(
-               "       aghi    %0,-1\n"
-               "       jm      5f\n"
-               "       srlg    0,%0,8\n"
-               "       ltgr    0,0\n"
-               "       jz      1f\n"
-               "0:     xc      0(256,%1),0(%2)\n"
-               "       xc      0(256,%1),0(%3)\n"
-               "       xc      0(256,%1),0(%4)\n"
-               "       la      %1,256(%1)\n"
-               "       la      %2,256(%2)\n"
-               "       la      %3,256(%3)\n"
-               "       la      %4,256(%4)\n"
-               "       brctg   0,0b\n"
-               "1:     exrl    %0,2f\n"
-               "       exrl    %0,3f\n"
-               "       exrl    %0,4f\n"
-               "       j       5f\n"
-               "2:     xc      0(1,%1),0(%2)\n"
-               "3:     xc      0(1,%1),0(%3)\n"
-               "4:     xc      0(1,%1),0(%4)\n"
-               "5:"
-               : "+a" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4)
-               : : "0", "cc", "memory");
-}
-
-static void xor_xc_5(unsigned long bytes, unsigned long * __restrict p1,
-                    const unsigned long * __restrict p2,
-                    const unsigned long * __restrict p3,
-                    const unsigned long * __restrict p4,
-                    const unsigned long * __restrict p5)
-{
-       asm volatile(
-               "       aghi    %0,-1\n"
-               "       jm      6f\n"
-               "       srlg    0,%0,8\n"
-               "       ltgr    0,0\n"
-               "       jz      1f\n"
-               "0:     xc      0(256,%1),0(%2)\n"
-               "       xc      0(256,%1),0(%3)\n"
-               "       xc      0(256,%1),0(%4)\n"
-               "       xc      0(256,%1),0(%5)\n"
-               "       la      %1,256(%1)\n"
-               "       la      %2,256(%2)\n"
-               "       la      %3,256(%3)\n"
-               "       la      %4,256(%4)\n"
-               "       la      %5,256(%5)\n"
-               "       brctg   0,0b\n"
-               "1:     exrl    %0,2f\n"
-               "       exrl    %0,3f\n"
-               "       exrl    %0,4f\n"
-               "       exrl    %0,5f\n"
-               "       j       6f\n"
-               "2:     xc      0(1,%1),0(%2)\n"
-               "3:     xc      0(1,%1),0(%3)\n"
-               "4:     xc      0(1,%1),0(%4)\n"
-               "5:     xc      0(1,%1),0(%5)\n"
-               "6:"
-               : "+a" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4),
-                 "+a" (p5)
-               : : "0", "cc", "memory");
-}
-
-struct xor_block_template xor_block_xc = {
-       .name = "xc",
-       .do_2 = xor_xc_2,
-       .do_3 = xor_xc_3,
-       .do_4 = xor_xc_4,
-       .do_5 = xor_xc_5,
-};
-EXPORT_SYMBOL(xor_block_xc);

diff --git a/lib/raid/xor/Makefile b/lib/raid/xor/Makefile
index 3a7c887d08ee9f207490053e297a6a31d7dcef50..3db6c2b2f26a5c53b18f869d0946130f58945496 100644 (file)
--- a/lib/raid/xor/Makefile
+++ b/lib/raid/xor/Makefile
@@ -20,6 +20,7 @@ xor-$(CONFIG_ALTIVEC)         += powerpc/xor_vmx.o powerpc/xor_vmx_glue.o
 xor-$(CONFIG_RISCV_ISA_V)      += riscv/xor.o riscv/xor-glue.o
 xor-$(CONFIG_SPARC32)          += sparc/xor-sparc32.o
 xor-$(CONFIG_SPARC64)          += sparc/xor-sparc64.o sparc/xor-sparc64-glue.o
+xor-$(CONFIG_S390)             += s390/xor.o
 
 
 CFLAGS_arm/xor-neon.o          += $(CC_FLAGS_FPU)

diff --git a/lib/raid/xor/s390/xor.c b/lib/raid/xor/s390/xor.c
new file mode 100644 (file)
index 0000000..acbd268
--- /dev/null
+++ b/lib/raid/xor/s390/xor.c
@@ -0,0 +1,134 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Optimized xor_block operation for RAID4/5
+ *
+ * Copyright IBM Corp. 2016
+ * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
+ */
+
+#include <linux/types.h>
+#include <linux/raid/xor_impl.h>
+#include <asm/xor.h>
+
+static void xor_xc_2(unsigned long bytes, unsigned long * __restrict p1,
+                    const unsigned long * __restrict p2)
+{
+       asm volatile(
+               "       aghi    %0,-1\n"
+               "       jm      3f\n"
+               "       srlg    0,%0,8\n"
+               "       ltgr    0,0\n"
+               "       jz      1f\n"
+               "0:     xc      0(256,%1),0(%2)\n"
+               "       la      %1,256(%1)\n"
+               "       la      %2,256(%2)\n"
+               "       brctg   0,0b\n"
+               "1:     exrl    %0,2f\n"
+               "       j       3f\n"
+               "2:     xc      0(1,%1),0(%2)\n"
+               "3:"
+               : "+a" (bytes), "+a" (p1), "+a" (p2)
+               : : "0", "cc", "memory");
+}
+
+static void xor_xc_3(unsigned long bytes, unsigned long * __restrict p1,
+                    const unsigned long * __restrict p2,
+                    const unsigned long * __restrict p3)
+{
+       asm volatile(
+               "       aghi    %0,-1\n"
+               "       jm      4f\n"
+               "       srlg    0,%0,8\n"
+               "       ltgr    0,0\n"
+               "       jz      1f\n"
+               "0:     xc      0(256,%1),0(%2)\n"
+               "       xc      0(256,%1),0(%3)\n"
+               "       la      %1,256(%1)\n"
+               "       la      %2,256(%2)\n"
+               "       la      %3,256(%3)\n"
+               "       brctg   0,0b\n"
+               "1:     exrl    %0,2f\n"
+               "       exrl    %0,3f\n"
+               "       j       4f\n"
+               "2:     xc      0(1,%1),0(%2)\n"
+               "3:     xc      0(1,%1),0(%3)\n"
+               "4:"
+               : "+a" (bytes), "+a" (p1), "+a" (p2), "+a" (p3)
+               : : "0", "cc", "memory");
+}
+
+static void xor_xc_4(unsigned long bytes, unsigned long * __restrict p1,
+                    const unsigned long * __restrict p2,
+                    const unsigned long * __restrict p3,
+                    const unsigned long * __restrict p4)
+{
+       asm volatile(
+               "       aghi    %0,-1\n"
+               "       jm      5f\n"
+               "       srlg    0,%0,8\n"
+               "       ltgr    0,0\n"
+               "       jz      1f\n"
+               "0:     xc      0(256,%1),0(%2)\n"
+               "       xc      0(256,%1),0(%3)\n"
+               "       xc      0(256,%1),0(%4)\n"
+               "       la      %1,256(%1)\n"
+               "       la      %2,256(%2)\n"
+               "       la      %3,256(%3)\n"
+               "       la      %4,256(%4)\n"
+               "       brctg   0,0b\n"
+               "1:     exrl    %0,2f\n"
+               "       exrl    %0,3f\n"
+               "       exrl    %0,4f\n"
+               "       j       5f\n"
+               "2:     xc      0(1,%1),0(%2)\n"
+               "3:     xc      0(1,%1),0(%3)\n"
+               "4:     xc      0(1,%1),0(%4)\n"
+               "5:"
+               : "+a" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4)
+               : : "0", "cc", "memory");
+}
+
+static void xor_xc_5(unsigned long bytes, unsigned long * __restrict p1,
+                    const unsigned long * __restrict p2,
+                    const unsigned long * __restrict p3,
+                    const unsigned long * __restrict p4,
+                    const unsigned long * __restrict p5)
+{
+       asm volatile(
+               "       aghi    %0,-1\n"
+               "       jm      6f\n"
+               "       srlg    0,%0,8\n"
+               "       ltgr    0,0\n"
+               "       jz      1f\n"
+               "0:     xc      0(256,%1),0(%2)\n"
+               "       xc      0(256,%1),0(%3)\n"
+               "       xc      0(256,%1),0(%4)\n"
+               "       xc      0(256,%1),0(%5)\n"
+               "       la      %1,256(%1)\n"
+               "       la      %2,256(%2)\n"
+               "       la      %3,256(%3)\n"
+               "       la      %4,256(%4)\n"
+               "       la      %5,256(%5)\n"
+               "       brctg   0,0b\n"
+               "1:     exrl    %0,2f\n"
+               "       exrl    %0,3f\n"
+               "       exrl    %0,4f\n"
+               "       exrl    %0,5f\n"
+               "       j       6f\n"
+               "2:     xc      0(1,%1),0(%2)\n"
+               "3:     xc      0(1,%1),0(%3)\n"
+               "4:     xc      0(1,%1),0(%4)\n"
+               "5:     xc      0(1,%1),0(%5)\n"
+               "6:"
+               : "+a" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4),
+                 "+a" (p5)
+               : : "0", "cc", "memory");
+}
+
+struct xor_block_template xor_block_xc = {
+       .name = "xc",
+       .do_2 = xor_xc_2,
+       .do_3 = xor_xc_3,
+       .do_4 = xor_xc_4,
+       .do_5 = xor_xc_5,
+};