hsotg->lx_state = DWC2_L0;
                }
        } else {
-               if (hsotg->params.power_down)
-                       return;
-
-               if (hsotg->lx_state != DWC2_L1) {
-                       u32 pcgcctl = dwc2_readl(hsotg, PCGCTL);
-
-                       /* Restart the Phy Clock */
-                       pcgcctl &= ~PCGCTL_STOPPCLK;
-                       dwc2_writel(hsotg, pcgcctl, PCGCTL);
+               if (hsotg->lx_state == DWC2_L2) {
+                       if (hsotg->in_ppd) {
+                               ret = dwc2_exit_partial_power_down(hsotg, 1,
+                                                                  true);
+                               if (ret)
+                                       dev_err(hsotg->dev,
+                                               "exit partial_power_down failed\n");
+                       }
 
                        /*
                         * If we've got this quirk then the PHY is stuck upon