vc4_hdmi->variant->phy_disable(vc4_hdmi);
 
        clk_disable_unprepare(vc4_hdmi->pixel_bvb_clock);
-       clk_disable_unprepare(vc4_hdmi->hsm_clock);
        clk_disable_unprepare(vc4_hdmi->pixel_clock);
 
        ret = pm_runtime_put(&vc4_hdmi->pdev->dev);
                conn_state_to_vc4_hdmi_conn_state(conn_state);
        struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
        struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
-       unsigned long bvb_rate, pixel_rate, hsm_rate;
+       unsigned long pixel_rate = vc4_conn_state->pixel_rate;
+       unsigned long bvb_rate, hsm_rate;
        int ret;
 
-       ret = pm_runtime_resume_and_get(&vc4_hdmi->pdev->dev);
-       if (ret < 0) {
-               DRM_ERROR("Failed to retain power domain: %d\n", ret);
-               return;
-       }
-
-       pixel_rate = vc4_conn_state->pixel_rate;
-       ret = clk_set_rate(vc4_hdmi->pixel_clock, pixel_rate);
-       if (ret) {
-               DRM_ERROR("Failed to set pixel clock rate: %d\n", ret);
-               return;
-       }
-
-       ret = clk_prepare_enable(vc4_hdmi->pixel_clock);
-       if (ret) {
-               DRM_ERROR("Failed to turn on pixel clock: %d\n", ret);
-               return;
-       }
-
        /*
         * As stated in RPi's vc4 firmware "HDMI state machine (HSM) clock must
         * be faster than pixel clock, infinitesimally faster, tested in
                return;
        }
 
-       ret = clk_prepare_enable(vc4_hdmi->hsm_clock);
+       ret = pm_runtime_resume_and_get(&vc4_hdmi->pdev->dev);
+       if (ret < 0) {
+               DRM_ERROR("Failed to retain power domain: %d\n", ret);
+               return;
+       }
+
+       ret = clk_set_rate(vc4_hdmi->pixel_clock, pixel_rate);
        if (ret) {
-               DRM_ERROR("Failed to turn on HSM clock: %d\n", ret);
-               clk_disable_unprepare(vc4_hdmi->pixel_clock);
+               DRM_ERROR("Failed to set pixel clock rate: %d\n", ret);
+               return;
+       }
+
+       ret = clk_prepare_enable(vc4_hdmi->pixel_clock);
+       if (ret) {
+               DRM_ERROR("Failed to turn on pixel clock: %d\n", ret);
                return;
        }
 
        ret = clk_set_min_rate(vc4_hdmi->pixel_bvb_clock, bvb_rate);
        if (ret) {
                DRM_ERROR("Failed to set pixel bvb clock rate: %d\n", ret);
-               clk_disable_unprepare(vc4_hdmi->hsm_clock);
                clk_disable_unprepare(vc4_hdmi->pixel_clock);
                return;
        }
        ret = clk_prepare_enable(vc4_hdmi->pixel_bvb_clock);
        if (ret) {
                DRM_ERROR("Failed to turn on pixel bvb clock: %d\n", ret);
-               clk_disable_unprepare(vc4_hdmi->hsm_clock);
                clk_disable_unprepare(vc4_hdmi->pixel_clock);
                return;
        }
        return 0;
 }
 
+static int __maybe_unused vc4_hdmi_runtime_suspend(struct device *dev)
+{
+       struct vc4_hdmi *vc4_hdmi = dev_get_drvdata(dev);
+
+       clk_disable_unprepare(vc4_hdmi->hsm_clock);
+
+       return 0;
+}
+
+static int vc4_hdmi_runtime_resume(struct device *dev)
+{
+       struct vc4_hdmi *vc4_hdmi = dev_get_drvdata(dev);
+       int ret;
+
+       ret = clk_prepare_enable(vc4_hdmi->hsm_clock);
+       if (ret)
+               return ret;
+
+       return 0;
+}
+
 static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data)
 {
        const struct vc4_hdmi_variant *variant = of_device_get_match_data(dev);
        {}
 };
 
+static const struct dev_pm_ops vc4_hdmi_pm_ops = {
+       SET_RUNTIME_PM_OPS(vc4_hdmi_runtime_suspend,
+                          vc4_hdmi_runtime_resume,
+                          NULL)
+};
+
 struct platform_driver vc4_hdmi_driver = {
        .probe = vc4_hdmi_dev_probe,
        .remove = vc4_hdmi_dev_remove,
        .driver = {
                .name = "vc4_hdmi",
                .of_match_table = vc4_hdmi_dt_match,
+               .pm = &vc4_hdmi_pm_ops,
        },
 };