*/
                if (pd->port_rcvhdrtail_kvaddr)
                        ipath_clear_rcvhdrtail(pd);
-               set_bit(INFINIPATH_R_PORTENABLE_SHIFT + pd->port_port,
+               set_bit(dd->ipath_r_portenable_shift + pd->port_port,
                        &dd->ipath_rcvctrl);
        } else
-               clear_bit(INFINIPATH_R_PORTENABLE_SHIFT + pd->port_port,
+               clear_bit(dd->ipath_r_portenable_shift + pd->port_port,
                          &dd->ipath_rcvctrl);
        ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
                         dd->ipath_rcvctrl);
                /* flush waiting flag so we don't miss an event */
                wmb();
 
-               set_bit(pd->port_port + INFINIPATH_R_INTRAVAIL_SHIFT,
+               set_bit(pd->port_port + dd->ipath_r_intravail_shift,
                        &dd->ipath_rcvctrl);
 
                ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
         */
        if (pd->port_rcvhdrtail_kvaddr)
                ipath_clear_rcvhdrtail(pd);
-       set_bit(INFINIPATH_R_PORTENABLE_SHIFT + pd->port_port,
+       set_bit(dd->ipath_r_portenable_shift + pd->port_port,
                &dd->ipath_rcvctrl);
        ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
-                        dd->ipath_rcvctrl & ~INFINIPATH_R_TAILUPD);
+                       dd->ipath_rcvctrl &
+                       ~(1ULL << dd->ipath_r_tailupd_shift));
        ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
                         dd->ipath_rcvctrl);
        /* Notify any waiting slaves */
        if (dd->ipath_kregbase) {
                int i;
                /* atomically clear receive enable port and intr avail. */
-               clear_bit(INFINIPATH_R_PORTENABLE_SHIFT + port,
+               clear_bit(dd->ipath_r_portenable_shift + port,
                          &dd->ipath_rcvctrl);
-               clear_bit(pd->port_port + INFINIPATH_R_INTRAVAIL_SHIFT,
+               clear_bit(pd->port_port + dd->ipath_r_intravail_shift,
                          &dd->ipath_rcvctrl);
                ipath_write_kreg( dd, dd->ipath_kregs->kr_rcvctrl,
                        dd->ipath_rcvctrl);
 
 #define INFINIPATH_RT_BUFSIZE_MASK 0x3FFFULL
 #define INFINIPATH_RT_BUFSIZE_SHIFT 48
 
+#define INFINIPATH_R_INTRAVAIL_SHIFT 16
+#define INFINIPATH_R_TAILUPD_SHIFT 31
+
+/* kr_xgxsconfig bits */
+#define INFINIPATH_XGXS_RESET          0x7ULL
+
 /*
  * masks and bits that are different in different chips, or present only
  * in one
        dd->ipath_gpio_sda = IPATH_GPIO_SDA;
        dd->ipath_gpio_scl = IPATH_GPIO_SCL;
 
+       /* Fill in shifts for RcvCtrl. */
+       dd->ipath_r_portenable_shift = INFINIPATH_R_PORTENABLE_SHIFT;
+       dd->ipath_r_intravail_shift = INFINIPATH_R_INTRAVAIL_SHIFT;
+       dd->ipath_r_tailupd_shift = INFINIPATH_R_TAILUPD_SHIFT;
+       dd->ipath_r_portcfg_shift = 0; /* Not on IBA6110 */
+
        dd->ipath_i_bitsextant =
                (INFINIPATH_I_RCVURG_MASK << INFINIPATH_I_RCVURG_SHIFT) |
                (INFINIPATH_I_RCVAVAIL_MASK <<
 
 #define IPATH_GPIO_SCL (1ULL << \
        (_IPATH_GPIO_SCL_NUM+INFINIPATH_EXTC_GPIOOE_SHIFT))
 
+#define INFINIPATH_R_INTRAVAIL_SHIFT 16
+#define INFINIPATH_R_TAILUPD_SHIFT 31
+
 /* 6120 specific hardware errors... */
 static const struct ipath_hwerror_msgs ipath_6120_hwerror_msgs[] = {
        INFINIPATH_HWE_MSG(PCIEPOISONEDTLP, "PCIe Poisoned TLP"),
        dd->ipath_gpio_sda = IPATH_GPIO_SDA;
        dd->ipath_gpio_scl = IPATH_GPIO_SCL;
 
+       /* Fill in shifts for RcvCtrl. */
+       dd->ipath_r_portenable_shift = INFINIPATH_R_PORTENABLE_SHIFT;
+       dd->ipath_r_intravail_shift = INFINIPATH_R_INTRAVAIL_SHIFT;
+       dd->ipath_r_tailupd_shift = INFINIPATH_R_TAILUPD_SHIFT;
+       dd->ipath_r_portcfg_shift = 0; /* Not on IBA6120 */
+
        /* variables for sanity checking interrupt and errors */
        dd->ipath_hwe_bitsextant =
                (INFINIPATH_HWE_RXEMEMPARITYERR_MASK <<
 
         * enable port 0 receive, and receive interrupt.  other ports
         * done as user opens and inits them.
         */
-       dd->ipath_rcvctrl = INFINIPATH_R_TAILUPD |
-               (1ULL << INFINIPATH_R_PORTENABLE_SHIFT) |
-               (1ULL << INFINIPATH_R_INTRAVAIL_SHIFT);
+       dd->ipath_rcvctrl = (1ULL << dd->ipath_r_tailupd_shift) |
+               (1ULL << dd->ipath_r_portenable_shift) |
+               (1ULL << dd->ipath_r_intravail_shift);
        ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
                         dd->ipath_rcvctrl);
 
 
                if (portr & (1 << i) && pd && pd->port_cnt) {
                        if (test_and_clear_bit(IPATH_PORT_WAITING_RCV,
                                               &pd->port_flag)) {
-                               clear_bit(i + INFINIPATH_R_INTRAVAIL_SHIFT,
+                               clear_bit(i + dd->ipath_r_intravail_shift,
                                          &dd->ipath_rcvctrl);
                                wake_up_interruptible(&pd->port_wait);
                                rcvdint = 1;
 
        u8 ipath_minrev;
        /* board rev, from ipath_revision */
        u8 ipath_boardrev;
+
+       u8 ipath_r_portenable_shift;
+       u8 ipath_r_intravail_shift;
+       u8 ipath_r_tailupd_shift;
+       u8 ipath_r_portcfg_shift;
+
        /* unit # of this chip, if present */
        int ipath_unit;
        /* saved for restore after reset */
 
 
 /* kr_rcvctrl bits */
 #define INFINIPATH_R_PORTENABLE_SHIFT 0
-#define INFINIPATH_R_INTRAVAIL_SHIFT 16
-#define INFINIPATH_R_TAILUPD   0x80000000
+#define INFINIPATH_R_QPMAP_ENABLE (1ULL << 38)
 
 /* kr_intstatus, kr_intclear, kr_intmask bits */
 #define INFINIPATH_I_RCVURG_SHIFT 0