From: Sean Anderson <sean.anderson@linux.dev>
Date: Fri, 31 May 2024 16:13:37 +0000 (-0400)
Subject: arm64: zynqmp: Add PCIe phys property for ZCU102
X-Git-Tag: ceph-for-6.12-rc2~98^2~3^2~2
X-Git-Url: http://git-server-git.apps.pok.os.sepia.ceph.com/?a=commitdiff_plain;h=0b93267adb34f39ca5b1574cf3766ee5fe3d44b6;p=ceph-client.git

arm64: zynqmp: Add PCIe phys property for ZCU102

Add PCIe phy bindings for the ZCU102.

Link: https://lore.kernel.org/r/20240531161337.864994-8-sean.anderson@linux.dev
Tested-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Michal Simek <michal.simek@amd.com>
---

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
index ad8f23a0ec67..d2175f3dd099 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
@@ -941,6 +941,7 @@
 
 &pcie {
 	status = "okay";
+	phys = <&psgtr 0 PHY_TYPE_PCIE 0 0>;
 };
 
 &psgtr {