From: Deepika Upadhyay <dupadhya@redhat.com>
Date: Sat, 13 Nov 2021 11:57:27 +0000 (+0530)
Subject: Merge pull request #42046 from CongMinYin/align-entry-bit
X-Git-Tag: v17.1.0~447
X-Git-Url: http://git-server-git.apps.pok.os.sepia.ceph.com/?a=commitdiff_plain;h=44cd7c7650ed2227d3597352b00bd2ef65f4388f;p=ceph.git

Merge pull request #42046 from CongMinYin/align-entry-bit

librbd/cache/pwl/ssd: make log entry 64 bit and add ssd version control

Reviewed-by: Mykola Golub <mykola.golub@clyso.com>
Reviewed-by: Deepika Upadhyay <dupadhya@redhat.com>
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44cd7c7650ed2227d3597352b00bd2ef65f4388f