From: Bjorn Helgaas <bhelgaas@google.com>
Date: Thu, 31 Jul 2025 21:12:16 +0000 (-0500)
Subject: Merge branch 'pci/controller/rockchip'
X-Git-Tag: ceph-for-6.17-rc6~198^2~5
X-Git-Url: http://git-server-git.apps.pok.os.sepia.ceph.com/?a=commitdiff_plain;h=90eb421c46fd7e31f03b4e5f8a36eb81ca3f42bb;p=ceph-client.git

Merge branch 'pci/controller/rockchip'

- Drop unused PCIe Message routing and code definitions (Hans Zhang)

- Use standard PCIe config register definitions instead of
  rockchip-specific redefinitions (Geraldo Nascimento)

- Set Target Link Speed to 5.0 GT/s before retraining so we have a chance
  to train at a higher speed (Geraldo Nascimento)

* pci/controller/rockchip:
  PCI: rockchip: Set Target Link Speed to 5.0 GT/s before retraining
  PCI: rockchip: Use standard PCIe definitions
  PCI: rockchip: Remove redundant PCIe message routing definitions
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90eb421c46fd7e31f03b4e5f8a36eb81ca3f42bb