From: Adam Kupczyk <akupczyk@mirantis.com>
Date: Fri, 24 Mar 2017 18:31:03 +0000 (+0100)
Subject: common, arch, intel: added recognition of AESNI features
X-Git-Tag: v12.0.2~34^2~5
X-Git-Url: http://git-server-git.apps.pok.os.sepia.ceph.com/?a=commitdiff_plain;h=f1c3f226450b2ec742f972d30cc37ec06e6b3f61;p=ceph.git

common, arch, intel: added recognition of AESNI features

Signed-off-by: Adam Kupczyk <akupczyk@mirantis.com>
---

diff --git a/src/arch/intel.c b/src/arch/intel.c
index e487da4f9b85..a45bc1debbe2 100644
--- a/src/arch/intel.c
+++ b/src/arch/intel.c
@@ -22,6 +22,7 @@ int ceph_arch_intel_sse41 = 0;
 int ceph_arch_intel_ssse3 = 0;
 int ceph_arch_intel_sse3 = 0;
 int ceph_arch_intel_sse2 = 0;
+int ceph_arch_intel_aesni = 0;
 
 #ifdef __x86_64__
 
@@ -51,6 +52,7 @@ static void do_cpuid(unsigned int *eax, unsigned int *ebx, unsigned int *ecx,
 #define CPUID_SSSE3	(1 << 9)
 #define CPUID_SSE3	(1)
 #define CPUID_SSE2	(1 << 26)
+#define CPUID_AESNI (1 << 25)
 
 int ceph_arch_intel_probe(void)
 {
@@ -75,6 +77,9 @@ int ceph_arch_intel_probe(void)
 	if ((edx & CPUID_SSE2) != 0) {
 	        ceph_arch_intel_sse2 = 1;
 	}
+  if ((ecx & CPUID_AESNI) != 0) {
+          ceph_arch_intel_aesni = 1;
+  }
 
 	return 0;
 }
diff --git a/src/arch/intel.h b/src/arch/intel.h
index 2c3b80995e07..3f4ae9482c04 100644
--- a/src/arch/intel.h
+++ b/src/arch/intel.h
@@ -11,6 +11,8 @@ extern int ceph_arch_intel_sse41;  /* true if we have sse 4.1 features */
 extern int ceph_arch_intel_ssse3;  /* true if we have ssse 3 features */
 extern int ceph_arch_intel_sse3;   /* true if we have sse 3 features */
 extern int ceph_arch_intel_sse2;   /* true if we have sse 2 features */
+extern int ceph_arch_intel_aesni;  /* true if we have aesni features */
+
 extern int ceph_arch_intel_probe(void);
 
 #ifdef __cplusplus