From: Piotr Dałek <piotr.dalek@corp.ovh.com>
Date: Fri, 26 May 2017 09:39:58 +0000 (+0200)
Subject: inline_memory: optimized mem_is_zero for non-X64
X-Git-Tag: ses5-milestone6~9^2~22^2
X-Git-Url: http://git-server-git.apps.pok.os.sepia.ceph.com/?a=commitdiff_plain;h=refs%2Fpull%2F15307%2Fhead;p=ceph.git

inline_memory: optimized mem_is_zero for non-X64

mem_is_zero is fast for X64 where 128-bit registers are available,
but it's very easy to optimze it for 32-bit Intel and ARM CPUs as
well, the speed won't be anywhere near the fastest one but still almost
7x faster than regular byte-by-byte check.
Now with extra test to check for corner cases that may pop with such
implementations.

Signed-off-by: Piotr Dałek <piotr.dalek@corp.ovh.com>
---

diff --git a/src/include/inline_memory.h b/src/include/inline_memory.h
index f2166826b76d..f2433f03edf7 100644
--- a/src/include/inline_memory.h
+++ b/src/include/inline_memory.h
@@ -124,6 +124,15 @@ bool mem_is_zero(const char *data, size_t len)
 
 static inline bool mem_is_zero(const char *data, size_t len) {
   const char *end = data + len;
+  const char* end64 = data + (len / sizeof(uint64_t))*sizeof(uint64_t);
+
+  while (data < end64) {
+    if (*(uint64_t*)data != 0) {
+      return false;
+    }
+    data += sizeof(uint64_t);
+  }
+
   while (data < end) {
     if (*data != 0) {
       return false;
diff --git a/src/test/bufferlist.cc b/src/test/bufferlist.cc
index 907a194229e4..b2d408e26450 100644
--- a/src/test/bufferlist.cc
+++ b/src/test/bufferlist.cc
@@ -1764,6 +1764,17 @@ TEST(BufferList, is_zero) {
     bl.append_zero(1);
     EXPECT_TRUE(bl.is_zero());
   }
+
+  for (size_t i = 1; i <= 256; ++i) {
+    bufferlist bl;
+    bl.append_zero(i);
+    EXPECT_TRUE(bl.is_zero());
+    bl.append('A');
+    // ensure buffer is a single, contiguous before testing
+    bl.rebuild();
+    EXPECT_FALSE(bl.is_zero());
+  }
+
 }
 
 TEST(BufferList, clear) {