From 20e6a51f61bc061f8944b62288057098117b5dfb Mon Sep 17 00:00:00 2001 From: Ian Rogers Date: Wed, 25 Oct 2023 17:31:44 -0700 Subject: [PATCH] perf vendor events intel: Add typo fix for ivybridge FP Add a missed space. Signed-off-by: Ian Rogers Reviewed-by: Kan Liang Cc: Alexandre Torgue Cc: Maxime Coquelin Cc: Edward Baker Cc: Zhengjun Xing Link: https://lore.kernel.org/r/20231026003149.3287633-4-irogers@google.com Signed-off-by: Namhyung Kim --- tools/perf/pmu-events/arch/x86/ivybridge/floating-point.json | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/perf/pmu-events/arch/x86/ivybridge/floating-point.json b/tools/perf/pmu-events/arch/x86/ivybridge/floating-point.json index 87c958213c7a7..89c6d47cc0771 100644 --- a/tools/perf/pmu-events/arch/x86/ivybridge/floating-point.json +++ b/tools/perf/pmu-events/arch/x86/ivybridge/floating-point.json @@ -73,7 +73,7 @@ "UMask": "0x20" }, { - "BriefDescription": "Number of FP Computational Uops Executed this cycle. The number of FADD, FSUB, FCOM, FMULs, integer MULsand IMULs, FDIVs, FPREMs, FSQRTS, integer DIVs, and IDIVs. This event does not distinguish an FADD used in the middle of a transcendental flow from a s", + "BriefDescription": "Number of FP Computational Uops Executed this cycle. The number of FADD, FSUB, FCOM, FMULs, integer MULs and IMULs, FDIVs, FPREMs, FSQRTS, integer DIVs, and IDIVs. This event does not distinguish an FADD used in the middle of a transcendental flow from a s", "EventCode": "0x10", "EventName": "FP_COMP_OPS_EXE.X87", "PublicDescription": "Counts number of X87 uops executed.", -- 2.39.5