From 53b3e2e0c9a36263be6874203c68bd7bd104663f Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Sat, 26 Oct 2024 18:43:31 +0300 Subject: [PATCH] dt-bindings: cache: qcom,llcc: document SAR2130P and SAR1130P Describe the last level cache controller on the SAR2130P and SAR1130P platforms. They have 2 banks and also a separate register set to control scratchpad slice. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20241026-sar2130p-llcc-v3-1-2a58fa1b4d12@linaro.org Signed-off-by: Bjorn Andersson --- .../devicetree/bindings/cache/qcom,llcc.yaml | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml index 68ea5f70b75f0..2edacf28944c7 100644 --- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml @@ -22,6 +22,8 @@ properties: enum: - qcom,qdu1000-llcc - qcom,sa8775p-llcc + - qcom,sar1130p-llcc + - qcom,sar2130p-llcc - qcom,sc7180-llcc - qcom,sc7280-llcc - qcom,sc8180x-llcc @@ -62,6 +64,32 @@ required: - reg-names allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,sar1130p-llcc + - qcom,sar2130p-llcc + then: + properties: + reg: + items: + - description: LLCC0 base register region + - description: LLCC1 base register region + - description: LLCC broadcast OR register region + - description: LLCC broadcast AND register region + - description: LLCC scratchpad broadcast OR register region + - description: LLCC scratchpad broadcast AND register region + reg-names: + items: + - const: llcc0_base + - const: llcc1_base + - const: llcc_broadcast_base + - const: llcc_broadcast_and_base + - const: llcc_scratchpad_broadcast_base + - const: llcc_scratchpad_broadcast_and_base + - if: properties: compatible: -- 2.39.5