From f8fc29dfd5aed2c01728788114c3d69e133d8ea5 Mon Sep 17 00:00:00 2001
From: WenLei <lei.wen2@zte.com.cn>
Date: Tue, 19 Aug 2025 15:12:25 +0800
Subject: [PATCH] common/Cycles: Add high-precision counter support for riscv64

Signed-off-by: WenLei <lei.wen2@zte.com.cn>
---
 src/common/Cycles.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/common/Cycles.h b/src/common/Cycles.h
index b546479c2b3..f12ea092f49 100644
--- a/src/common/Cycles.h
+++ b/src/common/Cycles.h
@@ -84,6 +84,10 @@ class Cycles {
     uint64_t tsc;
     asm volatile("stck %0" : "=Q" (tsc) : : "cc");
     return tsc;
+#elif defined(__riscv) && __riscv_xlen == 64
+    uint64_t tsc;
+    asm volatile ("rdtime %0" : "=r" (tsc));
+    return tsc;
 #else
 #warning No high-precision counter available for your OS/arch
     return 0;
-- 
2.47.3