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(parent: 6edfcab) | patch
erasure-code: Increase SIMD_ALIGN from 32 to 64 60246/head
authorJamie Pryde <jamiepry@uk.ibm.com>
Mon, 19 Aug 2024 16:06:39 +0000 (16:06 +0000)
committerJamie Pryde <jamiepry@uk.ibm.com>
Thu, 10 Oct 2024 12:31:03 +0000 (13:31 +0100)
commit216eb2635c2fbf61e76fa395a894dee1766e50b5
tree0a24ff7b97ac1085a4c753fab2bcc8e9cda42f5ctree | snapshot
parent6edfcabb380e32f37a043a54449a437cc9bd270ecommit | diff
erasure-code: Increase SIMD_ALIGN from 32 to 64

Fixes: https://tracker.ceph.com/issues/61573
Signed-off-by: Jamie Pryde <jamiepry@uk.ibm.com>
src/erasure-code/ErasureCode.cc diff | blob | history
src/test/bufferlist.cc diff | blob | history
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