cycles: add reader for i386 and aarch64

Signed-off-by: Noah Watkins <noahwatkins@gmail.com>

diff --git a/src/common/Cycles.h b/src/common/Cycles.h
index 6ddcb7a74941ef849e6215e95b9e7ce317c4cedc..6e47cde199e511500c0e106634669f5c58c77426 100644 (file)
--- a/src/common/Cycles.h
+++ b/src/common/Cycles.h
@@ -32,7 +32,6 @@
 #ifndef CEPH_CYCLES_H
 #define CEPH_CYCLES_H
 
-
 /**
  * This class provides static methods that read the fine-grain CPU
  * cycle counter and translate between cycle-level times and absolute
@@ -47,9 +46,35 @@ class Cycles {
    * (accessed via the RDTSC instruction).
    */
   static __inline __attribute__((always_inline)) uint64_t rdtsc() {
+#if defined(__i386__)
+    int64_t ret;
+    __asm__ volatile ("rdtsc" : "=A" (ret) );
+    return ret;
+#elif defined(__x86_64__) || defined(__amd64__)
     uint32_t lo, hi;
     __asm__ __volatile__("rdtsc" : "=a" (lo), "=d" (hi));
     return (((uint64_t)hi << 32) | lo);
+#elif defined(__aarch64__)
+    //
+    // arch/arm64/include/asm/arch_timer.h
+    //
+    // static inline u64 arch_counter_get_cntvct(void)
+    // {
+    //         u64 cval;
+    // 
+    //         isb();
+    //         asm volatile("mrs %0, cntvct_el0" : "=r" (cval));
+    // 
+    //         return cval;
+    // }
+    //
+    // https://github.com/cloudius-systems/osv/blob/master/arch/aarch64/arm-clock.cc
+    uint64_t cntvct;
+    asm volatile ("isb; mrs %0, cntvct_el0; isb; " : "=r" (cntvct) :: "memory");
+    return cntvct;
+#else
+#error No high-precision counter available for your OS/arch
+#endif
   }
 
   static double per_second();