]> git-server-git.apps.pok.os.sepia.ceph.com Git - ceph.git/commitdiff
erasure-code: enable isa-l EC for aarch64 platform
authorHang Li <lihang48@hisilicon.com>
Thu, 28 Nov 2019 11:03:21 +0000 (19:03 +0800)
committerluo rixin <luorixin@huawei.com>
Tue, 10 Mar 2020 07:19:00 +0000 (15:19 +0800)
add compile options to support erasure-code on aarch64
platform.

Signed-off-by: Hang Li <lihang48@hisilicon.com>
Signed-off-by: luo rixin <luorixin@huawei.com>
src/CMakeLists.txt
src/common/options.cc
src/erasure-code/CMakeLists.txt
src/erasure-code/isa/CMakeLists.txt
src/include/config-h.in.cmake
src/test/erasure-code/CMakeLists.txt

index 5f370b8dbbbe594ab0b458a1103eda50a062117e..7ae4f162af8ac2768b4be790dcd49bfab79575d4 100644 (file)
@@ -144,7 +144,6 @@ if(HAVE_INTEL)
   endif()
 endif()
 
-
 # require c++17
 set(CMAKE_CXX_STANDARD 17)
 set(CMAKE_CXX_EXTENSIONS OFF)
index 54c70e8b4fee9756c8085b5abf186a68230c7978..7170b385d1541d010150b7cccd0440b4d8fca70a 100644 (file)
@@ -2602,7 +2602,7 @@ std::vector<Option> get_global_options() {
 
     Option("osd_erasure_code_plugins", Option::TYPE_STR, Option::LEVEL_ADVANCED)
     .set_default("jerasure lrc"
-  #ifdef HAVE_BETTER_YASM_ELF64
+  #if defined(HAVE_BETTER_YASM_ELF64) || defined(HAVE_ARMV8_SIMD)
          " isa"
   #endif
         )
index bd9b00460b49b3e4504d63c86b203cd454f82da2..9cdc62e7dcbdeb1d2f751830fede3432110454ba 100644 (file)
@@ -22,10 +22,10 @@ add_subdirectory(lrc)
 add_subdirectory(shec)
 add_subdirectory(clay)
 
-if (HAVE_BETTER_YASM_ELF64)
+if(HAVE_BETTER_YASM_ELF64 OR HAVE_ARMV8_SIMD)
   add_subdirectory(isa)
   set(EC_ISA_LIB ec_isa)
-endif (HAVE_BETTER_YASM_ELF64)
+endif()
 
 add_library(erasure_code STATIC ErasureCodePlugin.cc)
 target_link_libraries(erasure_code ${CMAKE_DL_LIBS})
index cc48921125344278f1eab1a7d81b9c7992ee2399..5043ac225dc3259c3924239743478320422192cc 100644 (file)
@@ -2,61 +2,90 @@
 set(isal_src_dir ${CMAKE_SOURCE_DIR}/src/isa-l)
 include_directories(${isal_src_dir}/include)
 
-set(isa_srcs
-  ${isal_src_dir}/erasure_code/ec_base.c
-  ${isal_src_dir}/erasure_code/gf_2vect_dot_prod_sse.asm
-  ${isal_src_dir}/erasure_code/gf_3vect_dot_prod_sse.asm
-  ${isal_src_dir}/erasure_code/gf_4vect_dot_prod_sse.asm
-  ${isal_src_dir}/erasure_code/gf_5vect_dot_prod_sse.asm
-  ${isal_src_dir}/erasure_code/gf_6vect_dot_prod_sse.asm
-  ${isal_src_dir}/erasure_code/gf_vect_dot_prod_sse.asm
-  ${isal_src_dir}/erasure_code/gf_2vect_mad_avx2.asm
-  ${isal_src_dir}/erasure_code/gf_3vect_mad_avx2.asm
-  ${isal_src_dir}/erasure_code/gf_4vect_mad_avx2.asm
-  ${isal_src_dir}/erasure_code/gf_5vect_mad_avx2.asm
-  ${isal_src_dir}/erasure_code/gf_6vect_mad_avx2.asm
-  ${isal_src_dir}/erasure_code/gf_vect_mad_avx2.asm
-  ${isal_src_dir}/erasure_code/ec_highlevel_func.c
-  ${isal_src_dir}/erasure_code/gf_2vect_mad_avx.asm
-  ${isal_src_dir}/erasure_code/gf_3vect_mad_avx.asm
-  ${isal_src_dir}/erasure_code/gf_4vect_mad_avx.asm
-  ${isal_src_dir}/erasure_code/gf_5vect_mad_avx.asm
-  ${isal_src_dir}/erasure_code/gf_6vect_mad_avx.asm
-  ${isal_src_dir}/erasure_code/gf_vect_mad_avx.asm
-  ${isal_src_dir}/erasure_code/ec_multibinary.asm
-  ${isal_src_dir}/erasure_code/gf_2vect_mad_sse.asm
-  ${isal_src_dir}/erasure_code/gf_3vect_mad_sse.asm
-  ${isal_src_dir}/erasure_code/gf_4vect_mad_sse.asm
-  ${isal_src_dir}/erasure_code/gf_5vect_mad_sse.asm
-  ${isal_src_dir}/erasure_code/gf_6vect_mad_sse.asm
-  ${isal_src_dir}/erasure_code/gf_vect_mad_sse.asm
-  ${isal_src_dir}/erasure_code/gf_2vect_dot_prod_avx2.asm
-  ${isal_src_dir}/erasure_code/gf_3vect_dot_prod_avx2.asm
-  ${isal_src_dir}/erasure_code/gf_4vect_dot_prod_avx2.asm
-  ${isal_src_dir}/erasure_code/gf_5vect_dot_prod_avx2.asm
-  ${isal_src_dir}/erasure_code/gf_6vect_dot_prod_avx2.asm
-  ${isal_src_dir}/erasure_code/gf_vect_dot_prod_avx2.asm
-  ${isal_src_dir}/erasure_code/gf_vect_mul_avx.asm
-  ${isal_src_dir}/erasure_code/gf_2vect_dot_prod_avx.asm
-  ${isal_src_dir}/erasure_code/gf_3vect_dot_prod_avx.asm
-  ${isal_src_dir}/erasure_code/gf_4vect_dot_prod_avx.asm
-  ${isal_src_dir}/erasure_code/gf_5vect_dot_prod_avx.asm
-  ${isal_src_dir}/erasure_code/gf_6vect_dot_prod_avx.asm
-  ${isal_src_dir}/erasure_code/gf_vect_dot_prod_avx.asm
-  ${isal_src_dir}/erasure_code/gf_vect_mul_sse.asm
-  ${isal_src_dir}/erasure_code/gf_2vect_dot_prod_avx512.asm
-  ${isal_src_dir}/erasure_code/gf_2vect_mad_avx512.asm
-  ${isal_src_dir}/erasure_code/gf_3vect_dot_prod_avx512.asm
-  ${isal_src_dir}/erasure_code/gf_3vect_mad_avx512.asm
-  ${isal_src_dir}/erasure_code/gf_4vect_dot_prod_avx512.asm
-  ${isal_src_dir}/erasure_code/gf_4vect_mad_avx512.asm
-  ${isal_src_dir}/erasure_code/gf_vect_dot_prod_avx512.asm
-  ${isal_src_dir}/erasure_code/gf_vect_mad_avx512.asm
-  ErasureCodeIsa.cc
-  ErasureCodeIsaTableCache.cc
-  ErasureCodePluginIsa.cc
-  xor_op.cc
-)
+if(HAVE_BETTER_YASM_ELF64)
+  set(isa_srcs
+    ${isal_src_dir}/erasure_code/ec_base.c
+    ${isal_src_dir}/erasure_code/gf_2vect_dot_prod_sse.asm
+    ${isal_src_dir}/erasure_code/gf_3vect_dot_prod_sse.asm
+    ${isal_src_dir}/erasure_code/gf_4vect_dot_prod_sse.asm
+    ${isal_src_dir}/erasure_code/gf_5vect_dot_prod_sse.asm
+    ${isal_src_dir}/erasure_code/gf_6vect_dot_prod_sse.asm
+    ${isal_src_dir}/erasure_code/gf_vect_dot_prod_sse.asm
+    ${isal_src_dir}/erasure_code/gf_2vect_mad_avx2.asm
+    ${isal_src_dir}/erasure_code/gf_3vect_mad_avx2.asm
+    ${isal_src_dir}/erasure_code/gf_4vect_mad_avx2.asm
+    ${isal_src_dir}/erasure_code/gf_5vect_mad_avx2.asm
+    ${isal_src_dir}/erasure_code/gf_6vect_mad_avx2.asm
+    ${isal_src_dir}/erasure_code/gf_vect_mad_avx2.asm
+    ${isal_src_dir}/erasure_code/ec_highlevel_func.c
+    ${isal_src_dir}/erasure_code/gf_2vect_mad_avx.asm
+    ${isal_src_dir}/erasure_code/gf_3vect_mad_avx.asm
+    ${isal_src_dir}/erasure_code/gf_4vect_mad_avx.asm
+    ${isal_src_dir}/erasure_code/gf_5vect_mad_avx.asm
+    ${isal_src_dir}/erasure_code/gf_6vect_mad_avx.asm
+    ${isal_src_dir}/erasure_code/gf_vect_mad_avx.asm
+    ${isal_src_dir}/erasure_code/ec_multibinary.asm
+    ${isal_src_dir}/erasure_code/gf_2vect_mad_sse.asm
+    ${isal_src_dir}/erasure_code/gf_3vect_mad_sse.asm
+    ${isal_src_dir}/erasure_code/gf_4vect_mad_sse.asm
+    ${isal_src_dir}/erasure_code/gf_5vect_mad_sse.asm
+    ${isal_src_dir}/erasure_code/gf_6vect_mad_sse.asm
+    ${isal_src_dir}/erasure_code/gf_vect_mad_sse.asm
+    ${isal_src_dir}/erasure_code/gf_2vect_dot_prod_avx2.asm
+    ${isal_src_dir}/erasure_code/gf_3vect_dot_prod_avx2.asm
+    ${isal_src_dir}/erasure_code/gf_4vect_dot_prod_avx2.asm
+    ${isal_src_dir}/erasure_code/gf_5vect_dot_prod_avx2.asm
+    ${isal_src_dir}/erasure_code/gf_6vect_dot_prod_avx2.asm
+    ${isal_src_dir}/erasure_code/gf_vect_dot_prod_avx2.asm
+    ${isal_src_dir}/erasure_code/gf_vect_mul_avx.asm
+    ${isal_src_dir}/erasure_code/gf_2vect_dot_prod_avx.asm
+    ${isal_src_dir}/erasure_code/gf_3vect_dot_prod_avx.asm
+    ${isal_src_dir}/erasure_code/gf_4vect_dot_prod_avx.asm
+    ${isal_src_dir}/erasure_code/gf_5vect_dot_prod_avx.asm
+    ${isal_src_dir}/erasure_code/gf_6vect_dot_prod_avx.asm
+    ${isal_src_dir}/erasure_code/gf_vect_dot_prod_avx.asm
+    ${isal_src_dir}/erasure_code/gf_vect_mul_sse.asm
+    ${isal_src_dir}/erasure_code/gf_2vect_dot_prod_avx512.asm
+    ${isal_src_dir}/erasure_code/gf_2vect_mad_avx512.asm
+    ${isal_src_dir}/erasure_code/gf_3vect_dot_prod_avx512.asm
+    ${isal_src_dir}/erasure_code/gf_3vect_mad_avx512.asm
+    ${isal_src_dir}/erasure_code/gf_4vect_dot_prod_avx512.asm
+    ${isal_src_dir}/erasure_code/gf_4vect_mad_avx512.asm
+    ${isal_src_dir}/erasure_code/gf_vect_dot_prod_avx512.asm
+    ${isal_src_dir}/erasure_code/gf_vect_mad_avx512.asm
+    ErasureCodeIsa.cc
+    ErasureCodeIsaTableCache.cc
+    ErasureCodePluginIsa.cc
+    xor_op.cc
+  )
+elseif(HAVE_ARMV8_SIMD)
+  set(isa_srcs
+    ${isal_src_dir}/erasure_code/ec_base.c
+    ${isal_src_dir}/erasure_code/aarch64/ec_aarch64_highlevel_func.c
+    ${isal_src_dir}/erasure_code/aarch64/ec_aarch64_dispatcher.c
+    ${isal_src_dir}/erasure_code/aarch64/gf_2vect_dot_prod_neon.S
+    ${isal_src_dir}/erasure_code/aarch64/gf_2vect_mad_neon.S
+    ${isal_src_dir}/erasure_code/aarch64/gf_3vect_dot_prod_neon.S
+    ${isal_src_dir}/erasure_code/aarch64/gf_3vect_mad_neon.S
+    ${isal_src_dir}/erasure_code/aarch64/gf_4vect_dot_prod_neon.S
+    ${isal_src_dir}/erasure_code/aarch64/gf_4vect_mad_neon.S
+    ${isal_src_dir}/erasure_code/aarch64/gf_5vect_dot_prod_neon.S
+    ${isal_src_dir}/erasure_code/aarch64/gf_5vect_mad_neon.S
+    ${isal_src_dir}/erasure_code/aarch64/gf_6vect_mad_neon.S
+    ${isal_src_dir}/erasure_code/aarch64/gf_vect_dot_prod_neon.S
+    ${isal_src_dir}/erasure_code/aarch64/gf_vect_mad_neon.S
+    ${isal_src_dir}/erasure_code/aarch64/gf_vect_mul_neon.S
+    ${isal_src_dir}/erasure_code/aarch64/ec_multibinary_arm.S
+    ErasureCodeIsa.cc
+    ErasureCodeIsaTableCache.cc
+    ErasureCodePluginIsa.cc
+    xor_op.cc
+  )
+  set_source_files_properties(
+    ${isal_src_dir}/erasure_code/aarch64/ec_multibinary_arm.S
+    PROPERTIES COMPILE_FLAGS "-D__ASSEMBLY__"
+  )
+endif()
 
 add_library(ec_isa SHARED
   ${isa_srcs}
index 1eb7807ed4acd992029261186bb90a3c2345fc32..31dfb8983a7f1037d77058928720c0f5b3b5d462 100644 (file)
 /* yasm can also build the isa-l */
 #cmakedefine HAVE_BETTER_YASM_ELF64
 
+/* Define if isa-l is compiled for arm64 */
+#cmakedefine HAVE_ARMV8_SIMD
+
 /* Define to 1 if strerror_r returns char *. */
 #cmakedefine STRERROR_R_CHAR_P 1
 
index 721f6c36750fa9bf25658bfb8bd4fb6afdcb4e49..49f12adc9184aabe46b3ca06642d157f7ad95a1b 100644 (file)
@@ -79,7 +79,7 @@ target_link_libraries(unittest_erasure_code_plugin_jerasure
 add_dependencies(unittest_erasure_code_plugin_jerasure
   ec_jerasure)
 
-if(HAVE_BETTER_YASM_ELF64)
+if(HAVE_BETTER_YASM_ELF64 OR HAVE_ARMV8_SIMD)
 
 #unittest_erasure_code_isa
 add_executable(unittest_erasure_code_isa
@@ -110,7 +110,7 @@ target_link_libraries(unittest_erasure_code_plugin_isa
   )
 add_dependencies(unittest_erasure_code_plugin_isa
   ec_isa)
-endif(HAVE_BETTER_YASM_ELF64)
+endif(HAVE_BETTER_YASM_ELF64 OR HAVE_ARMV8_SIMD)
 
 # unittest_erasure_code_lrc
 add_executable(unittest_erasure_code_lrc