erasure-code: Remove duplicate of isa-l files

There are two copies of isa-l. While one is a git submodule the other
was a static copy from an older version. This change helps with removing
the duplicate and maintain a single copy.
This is also upgrading isa-l used by (src/erasure-code/isa/isa-l) from
v2.14 to v2.16.0

Signed-off-by: Ganesh Mahalingam <ganesh.mahalingam@intel.com>

diff --git a/src/.gitignore b/src/.gitignore
index 2fa1c6df2b4c825dcde7e5a5cadf0e8fe13b5448..6020b701ee74aa5c76d1b27372bd9a4c11e4d295 100644 (file)
--- a/src/.gitignore
+++ b/src/.gitignore
@@ -1,3 +1,4 @@
 # local directory specific entries
 /.git_version
 /ceph_ver.h
+/gf_vect_dot_prod_avx2.o

diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index 3b3350b40862865ce63e794991134e37c485e9cd..9b74ae49e7c345bd7ba55488de12b22ad73f78e2 100644 (file)
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -115,8 +115,8 @@ else(no_yasm)
       message(STATUS " we are not x32")
       set(HAVE_GOOD_YASM_ELF64 1)
       execute_process(COMMAND yasm -f elf64 -i
-        ${CMAKE_SOURCE_DIR}/src/erasure-code/isa/isa-l/include/
-        ${CMAKE_SOURCE_DIR}/src/erasure-code/isa/isa-l/erasure_code/gf_vect_dot_prod_avx2.asm.s
+        ${CMAKE_SOURCE_DIR}/src/isa-l/include/
+        ${CMAKE_SOURCE_DIR}/src/isa-l/erasure_code/gf_vect_dot_prod_avx2.asm
         -o /dev/null
         RESULT_VARIABLE rc
         OUTPUT_QUIET)

diff --git a/src/erasure-code/isa/CMakeLists.txt b/src/erasure-code/isa/CMakeLists.txt
index bdb1c4ef5885d45b4eae6658b8fa359ad37a3d37..27345f63a83da63876762a99a0979d92a0582223 100644 (file)
--- a/src/erasure-code/isa/CMakeLists.txt
+++ b/src/erasure-code/isa/CMakeLists.txt
@@ -1,49 +1,49 @@
 # ISA
-
-include_directories(isa-l/include)
+set(isal_src_dir ${CMAKE_SOURCE_DIR}/src/isa-l)
+include_directories(${isal_src_dir}/include)
 
 set(isa_srcs
-  isa-l/erasure_code/ec_base.c
-  isa-l/erasure_code/gf_2vect_dot_prod_sse.asm.s
-  isa-l/erasure_code/gf_3vect_dot_prod_sse.asm.s
-  isa-l/erasure_code/gf_4vect_dot_prod_sse.asm.s
-  isa-l/erasure_code/gf_5vect_dot_prod_sse.asm.s
-  isa-l/erasure_code/gf_6vect_dot_prod_sse.asm.s
-  isa-l/erasure_code/gf_vect_dot_prod_sse.asm.s
-  isa-l/erasure_code/gf_2vect_mad_avx2.asm.s
-  isa-l/erasure_code/gf_3vect_mad_avx2.asm.s
-  isa-l/erasure_code/gf_4vect_mad_avx2.asm.s
-  isa-l/erasure_code/gf_5vect_mad_avx2.asm.s
-  isa-l/erasure_code/gf_6vect_mad_avx2.asm.s
-  isa-l/erasure_code/gf_vect_mad_avx2.asm.s
-  isa-l/erasure_code/ec_highlevel_func.c
-  isa-l/erasure_code/gf_2vect_mad_avx.asm.s
-  isa-l/erasure_code/gf_3vect_mad_avx.asm.s
-  isa-l/erasure_code/gf_4vect_mad_avx.asm.s
-  isa-l/erasure_code/gf_5vect_mad_avx.asm.s
-  isa-l/erasure_code/gf_6vect_mad_avx.asm.s
-  isa-l/erasure_code/gf_vect_mad_avx.asm.s
-  isa-l/erasure_code/ec_multibinary.asm.s
-  isa-l/erasure_code/gf_2vect_mad_sse.asm.s
-  isa-l/erasure_code/gf_3vect_mad_sse.asm.s
-  isa-l/erasure_code/gf_4vect_mad_sse.asm.s
-  isa-l/erasure_code/gf_5vect_mad_sse.asm.s
-  isa-l/erasure_code/gf_6vect_mad_sse.asm.s
-  isa-l/erasure_code/gf_vect_mad_sse.asm.s
-  isa-l/erasure_code/gf_2vect_dot_prod_avx2.asm.s
-  isa-l/erasure_code/gf_3vect_dot_prod_avx2.asm.s
-  isa-l/erasure_code/gf_4vect_dot_prod_avx2.asm.s
-  isa-l/erasure_code/gf_5vect_dot_prod_avx2.asm.s
-  isa-l/erasure_code/gf_6vect_dot_prod_avx2.asm.s
-  isa-l/erasure_code/gf_vect_dot_prod_avx2.asm.s
-  isa-l/erasure_code/gf_vect_mul_avx.asm.s
-  isa-l/erasure_code/gf_2vect_dot_prod_avx.asm.s
-  isa-l/erasure_code/gf_3vect_dot_prod_avx.asm.s
-  isa-l/erasure_code/gf_4vect_dot_prod_avx.asm.s
-  isa-l/erasure_code/gf_5vect_dot_prod_avx.asm.s
-  isa-l/erasure_code/gf_6vect_dot_prod_avx.asm.s
-  isa-l/erasure_code/gf_vect_dot_prod_avx.asm.s
-  isa-l/erasure_code/gf_vect_mul_sse.asm.s
+  ${isal_src_dir}/erasure_code/ec_base.c
+  ${isal_src_dir}/erasure_code/gf_2vect_dot_prod_sse.asm
+  ${isal_src_dir}/erasure_code/gf_3vect_dot_prod_sse.asm
+  ${isal_src_dir}/erasure_code/gf_4vect_dot_prod_sse.asm
+  ${isal_src_dir}/erasure_code/gf_5vect_dot_prod_sse.asm
+  ${isal_src_dir}/erasure_code/gf_6vect_dot_prod_sse.asm
+  ${isal_src_dir}/erasure_code/gf_vect_dot_prod_sse.asm
+  ${isal_src_dir}/erasure_code/gf_2vect_mad_avx2.asm
+  ${isal_src_dir}/erasure_code/gf_3vect_mad_avx2.asm
+  ${isal_src_dir}/erasure_code/gf_4vect_mad_avx2.asm
+  ${isal_src_dir}/erasure_code/gf_5vect_mad_avx2.asm
+  ${isal_src_dir}/erasure_code/gf_6vect_mad_avx2.asm
+  ${isal_src_dir}/erasure_code/gf_vect_mad_avx2.asm
+  ${isal_src_dir}/erasure_code/ec_highlevel_func.c
+  ${isal_src_dir}/erasure_code/gf_2vect_mad_avx.asm
+  ${isal_src_dir}/erasure_code/gf_3vect_mad_avx.asm
+  ${isal_src_dir}/erasure_code/gf_4vect_mad_avx.asm
+  ${isal_src_dir}/erasure_code/gf_5vect_mad_avx.asm
+  ${isal_src_dir}/erasure_code/gf_6vect_mad_avx.asm
+  ${isal_src_dir}/erasure_code/gf_vect_mad_avx.asm
+  ${isal_src_dir}/erasure_code/ec_multibinary.asm
+  ${isal_src_dir}/erasure_code/gf_2vect_mad_sse.asm
+  ${isal_src_dir}/erasure_code/gf_3vect_mad_sse.asm
+  ${isal_src_dir}/erasure_code/gf_4vect_mad_sse.asm
+  ${isal_src_dir}/erasure_code/gf_5vect_mad_sse.asm
+  ${isal_src_dir}/erasure_code/gf_6vect_mad_sse.asm
+  ${isal_src_dir}/erasure_code/gf_vect_mad_sse.asm
+  ${isal_src_dir}/erasure_code/gf_2vect_dot_prod_avx2.asm
+  ${isal_src_dir}/erasure_code/gf_3vect_dot_prod_avx2.asm
+  ${isal_src_dir}/erasure_code/gf_4vect_dot_prod_avx2.asm
+  ${isal_src_dir}/erasure_code/gf_5vect_dot_prod_avx2.asm
+  ${isal_src_dir}/erasure_code/gf_6vect_dot_prod_avx2.asm
+  ${isal_src_dir}/erasure_code/gf_vect_dot_prod_avx2.asm
+  ${isal_src_dir}/erasure_code/gf_vect_mul_avx.asm
+  ${isal_src_dir}/erasure_code/gf_2vect_dot_prod_avx.asm
+  ${isal_src_dir}/erasure_code/gf_3vect_dot_prod_avx.asm
+  ${isal_src_dir}/erasure_code/gf_4vect_dot_prod_avx.asm
+  ${isal_src_dir}/erasure_code/gf_5vect_dot_prod_avx.asm
+  ${isal_src_dir}/erasure_code/gf_6vect_dot_prod_avx.asm
+  ${isal_src_dir}/erasure_code/gf_vect_dot_prod_avx.asm
+  ${isal_src_dir}/erasure_code/gf_vect_mul_sse.asm
   ErasureCodeIsa.cc
   ErasureCodeIsaTableCache.cc
   ErasureCodePluginIsa.cc

diff --git a/src/erasure-code/isa/isa-l/erasure_code/ec_base.c b/src/erasure-code/isa/isa-l/erasure_code/ec_base.c
deleted file mode 100644 (file)
index 3c7e838..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/ec_base.c
+++ /dev/null
@@ -1,348 +0,0 @@
-/**********************************************************************
-  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-
-  Redistribution and use in source and binary forms, with or without
-  modification, are permitted provided that the following conditions
-  are met:
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-    * Redistributions in binary form must reproduce the above copyright
-      notice, this list of conditions and the following disclaimer in
-      the documentation and/or other materials provided with the
-      distribution.
-    * Neither the name of Intel Corporation nor the names of its
-      contributors may be used to endorse or promote products derived
-      from this software without specific prior written permission.
-
-  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-**********************************************************************/
-
-#include <limits.h>
-#include <string.h>            // for memset
-#include "erasure_code.h"
-#include "ec_base.h"           // for GF tables
-#include "types.h"
-
-unsigned char gf_mul(unsigned char a, unsigned char b)
-{
-#ifndef GF_LARGE_TABLES
-       int i;
-
-       if ((a == 0) || (b == 0))
-               return 0;
-
-       return gff_base[(i = gflog_base[a] + gflog_base[b]) > 254 ? i - 255 : i];
-#else
-       return gf_mul_table_base[b * 256 + a];
-#endif
-}
-
-unsigned char gf_inv(unsigned char a)
-{
-#ifndef GF_LARGE_TABLES
-       if (a == 0)
-               return 0;
-
-       return gff_base[255 - gflog_base[a]];
-#else
-       return gf_inv_table_base[a];
-#endif
-}
-
-void gf_gen_rs_matrix(unsigned char *a, int m, int k)
-{
-       int i, j;
-       unsigned char p, gen = 1;
-
-       memset(a, 0, k * m);
-       for (i = 0; i < k; i++)
-               a[k * i + i] = 1;
-
-       for (i = k; i < m; i++) {
-               p = 1;
-               for (j = 0; j < k; j++) {
-                       a[k * i + j] = p;
-                       p = gf_mul(p, gen);
-               }
-               gen = gf_mul(gen, 2);
-       }
-}
-
-void gf_gen_cauchy1_matrix(unsigned char *a, int m, int k)
-{
-       int i, j;
-       unsigned char *p;
-
-       // Identity matrix in high position
-       memset(a, 0, k * m);
-       for (i = 0; i < k; i++)
-               a[k * i + i] = 1;
-
-       // For the rest choose 1/(i + j) | i != j
-       p = &a[k * k];
-       for (i = k; i < m; i++)
-               for (j = 0; j < k; j++)
-                       *p++ = gf_inv(i ^ j);
-
-}
-
-int gf_invert_matrix(unsigned char *in_mat, unsigned char *out_mat, const int n)
-{
-       int i, j, k;
-       unsigned char temp;
-
-       // Set out_mat[] to the identity matrix
-       for (i = 0; i < n * n; i++)     // memset(out_mat, 0, n*n)
-               out_mat[i] = 0;
-
-       for (i = 0; i < n; i++)
-               out_mat[i * n + i] = 1;
-
-       // Inverse
-       for (i = 0; i < n; i++) {
-               // Check for 0 in pivot element
-               if (in_mat[i * n + i] == 0) {
-                       // Find a row with non-zero in current column and swap
-                       for (j = i + 1; j < n; j++)
-                               if (in_mat[j * n + i])
-                                       break;
-
-                       if (j == n)     // Couldn't find means it's singular
-                               return -1;
-
-                       for (k = 0; k < n; k++) {       // Swap rows i,j
-                               temp = in_mat[i * n + k];
-                               in_mat[i * n + k] = in_mat[j * n + k];
-                               in_mat[j * n + k] = temp;
-
-                               temp = out_mat[i * n + k];
-                               out_mat[i * n + k] = out_mat[j * n + k];
-                               out_mat[j * n + k] = temp;
-                       }
-               }
-
-               temp = gf_inv(in_mat[i * n + i]);       // 1/pivot
-               for (j = 0; j < n; j++) {       // Scale row i by 1/pivot
-                       in_mat[i * n + j] = gf_mul(in_mat[i * n + j], temp);
-                       out_mat[i * n + j] = gf_mul(out_mat[i * n + j], temp);
-               }
-
-               for (j = 0; j < n; j++) {
-                       if (j == i)
-                               continue;
-
-                       temp = in_mat[j * n + i];
-                       for (k = 0; k < n; k++) {
-                               out_mat[j * n + k] ^= gf_mul(temp, out_mat[i * n + k]);
-                               in_mat[j * n + k] ^= gf_mul(temp, in_mat[i * n + k]);
-                       }
-               }
-       }
-       return 0;
-}
-
-// Calculates const table gftbl in GF(2^8) from single input A
-// gftbl(A) = {A{00}, A{01}, A{02}, ... , A{0f} }, {A{00}, A{10}, A{20}, ... , A{f0} }
-
-void gf_vect_mul_init(unsigned char c, unsigned char *tbl)
-{
-       unsigned char c2 = (c << 1) ^ ((c & 0x80) ? 0x1d : 0);  //Mult by GF{2}
-       unsigned char c4 = (c2 << 1) ^ ((c2 & 0x80) ? 0x1d : 0);        //Mult by GF{2}
-       unsigned char c8 = (c4 << 1) ^ ((c4 & 0x80) ? 0x1d : 0);        //Mult by GF{2}
-
-#if __WORDSIZE == 64 || _WIN64 || __x86_64__
-       unsigned long long v1, v2, v4, v8, *t;
-       unsigned long long v10, v20, v40, v80;
-       unsigned char c17, c18, c20, c24;
-
-       t = (unsigned long long *)tbl;
-
-       v1 = c * 0x0100010001000100ull;
-       v2 = c2 * 0x0101000001010000ull;
-       v4 = c4 * 0x0101010100000000ull;
-       v8 = c8 * 0x0101010101010101ull;
-
-       v4 = v1 ^ v2 ^ v4;
-       t[0] = v4;
-       t[1] = v8 ^ v4;
-
-       c17 = (c8 << 1) ^ ((c8 & 0x80) ? 0x1d : 0);     //Mult by GF{2}
-       c18 = (c17 << 1) ^ ((c17 & 0x80) ? 0x1d : 0);   //Mult by GF{2}
-       c20 = (c18 << 1) ^ ((c18 & 0x80) ? 0x1d : 0);   //Mult by GF{2}
-       c24 = (c20 << 1) ^ ((c20 & 0x80) ? 0x1d : 0);   //Mult by GF{2}
-
-       v10 = c17 * 0x0100010001000100ull;
-       v20 = c18 * 0x0101000001010000ull;
-       v40 = c20 * 0x0101010100000000ull;
-       v80 = c24 * 0x0101010101010101ull;
-
-       v40 = v10 ^ v20 ^ v40;
-       t[2] = v40;
-       t[3] = v80 ^ v40;
-
-#else // 32-bit or other
-       unsigned char c3, c5, c6, c7, c9, c10, c11, c12, c13, c14, c15;
-       unsigned char c17, c18, c19, c20, c21, c22, c23, c24, c25, c26, c27, c28, c29, c30,
-           c31;
-
-       c3 = c2 ^ c;
-       c5 = c4 ^ c;
-       c6 = c4 ^ c2;
-       c7 = c4 ^ c3;
-
-       c9 = c8 ^ c;
-       c10 = c8 ^ c2;
-       c11 = c8 ^ c3;
-       c12 = c8 ^ c4;
-       c13 = c8 ^ c5;
-       c14 = c8 ^ c6;
-       c15 = c8 ^ c7;
-
-       tbl[0] = 0;
-       tbl[1] = c;
-       tbl[2] = c2;
-       tbl[3] = c3;
-       tbl[4] = c4;
-       tbl[5] = c5;
-       tbl[6] = c6;
-       tbl[7] = c7;
-       tbl[8] = c8;
-       tbl[9] = c9;
-       tbl[10] = c10;
-       tbl[11] = c11;
-       tbl[12] = c12;
-       tbl[13] = c13;
-       tbl[14] = c14;
-       tbl[15] = c15;
-
-       c17 = (c8 << 1) ^ ((c8 & 0x80) ? 0x1d : 0);     //Mult by GF{2}
-       c18 = (c17 << 1) ^ ((c17 & 0x80) ? 0x1d : 0);   //Mult by GF{2}
-       c19 = c18 ^ c17;
-       c20 = (c18 << 1) ^ ((c18 & 0x80) ? 0x1d : 0);   //Mult by GF{2}
-       c21 = c20 ^ c17;
-       c22 = c20 ^ c18;
-       c23 = c20 ^ c19;
-       c24 = (c20 << 1) ^ ((c20 & 0x80) ? 0x1d : 0);   //Mult by GF{2}
-       c25 = c24 ^ c17;
-       c26 = c24 ^ c18;
-       c27 = c24 ^ c19;
-       c28 = c24 ^ c20;
-       c29 = c24 ^ c21;
-       c30 = c24 ^ c22;
-       c31 = c24 ^ c23;
-
-       tbl[16] = 0;
-       tbl[17] = c17;
-       tbl[18] = c18;
-       tbl[19] = c19;
-       tbl[20] = c20;
-       tbl[21] = c21;
-       tbl[22] = c22;
-       tbl[23] = c23;
-       tbl[24] = c24;
-       tbl[25] = c25;
-       tbl[26] = c26;
-       tbl[27] = c27;
-       tbl[28] = c28;
-       tbl[29] = c29;
-       tbl[30] = c30;
-       tbl[31] = c31;
-
-#endif //__WORDSIZE == 64 || _WIN64 || __x86_64__
-}
-
-void gf_vect_dot_prod_base(int len, int vlen, unsigned char *v,
-                          unsigned char **src, unsigned char *dest)
-{
-       int i, j;
-       unsigned char s;
-       for (i = 0; i < len; i++) {
-               s = 0;
-               for (j = 0; j < vlen; j++)
-                       s ^= gf_mul(src[j][i], v[j * 32 + 1]);
-
-               dest[i] = s;
-       }
-}
-
-void gf_vect_mad_base(int len, int vec, int vec_i,
-                     unsigned char *v, unsigned char *src, unsigned char *dest)
-{
-       int i;
-       unsigned char s;
-       for (i = 0; i < len; i++) {
-               s = dest[i];
-               s ^= gf_mul(src[i], v[vec_i * 32 + 1]);
-               dest[i] = s;
-       }
-}
-
-void ec_encode_data_base(int len, int srcs, int dests, unsigned char *v,
-                        unsigned char **src, unsigned char **dest)
-{
-       int i, j, l;
-       unsigned char s;
-
-       for (l = 0; l < dests; l++) {
-               for (i = 0; i < len; i++) {
-                       s = 0;
-                       for (j = 0; j < srcs; j++)
-                               s ^= gf_mul(src[j][i], v[j * 32 + l * srcs * 32 + 1]);
-
-                       dest[l][i] = s;
-               }
-       }
-}
-
-void ec_encode_data_update_base(int len, int k, int rows, int vec_i, unsigned char *v,
-                               unsigned char *data, unsigned char **dest)
-{
-       int i, l;
-       unsigned char s;
-
-       for (l = 0; l < rows; l++) {
-               for (i = 0; i < len; i++) {
-                       s = dest[l][i];
-                       s ^= gf_mul(data[i], v[vec_i * 32 + l * k * 32 + 1]);
-
-                       dest[l][i] = s;
-               }
-       }
-}
-
-void gf_vect_mul_base(int len, unsigned char *a, unsigned char *src, unsigned char *dest)
-{
-       //2nd element of table array is ref value used to fill it in
-       unsigned char c = a[1];
-       while (len-- > 0)
-               *dest++ = gf_mul(c, *src++);
-}
-
-struct slver {
-       UINT16 snum;
-       UINT8 ver;
-       UINT8 core;
-};
-
-// Version info
-struct slver gf_vect_mul_init_slver_00020035;
-struct slver gf_vect_mul_init_slver = { 0x0035, 0x02, 0x00 };
-
-struct slver ec_encode_data_base_slver_00010135;
-struct slver ec_encode_data_base_slver = { 0x0135, 0x01, 0x00 };
-
-struct slver gf_vect_mul_base_slver_00010136;
-struct slver gf_vect_mul_base_slver = { 0x0136, 0x01, 0x00 };
-
-struct slver gf_vect_dot_prod_base_slver_00010137;
-struct slver gf_vect_dot_prod_base_slver = { 0x0137, 0x01, 0x00 };

diff --git a/src/erasure-code/isa/isa-l/erasure_code/ec_base.h b/src/erasure-code/isa/isa-l/erasure_code/ec_base.h
deleted file mode 100644 (file)
index d69a92d..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/ec_base.h
+++ /dev/null
@@ -1,6680 +0,0 @@
-/**********************************************************************
-  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-
-  Redistribution and use in source and binary forms, with or without
-  modification, are permitted provided that the following conditions
-  are met:
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-    * Redistributions in binary form must reproduce the above copyright
-      notice, this list of conditions and the following disclaimer in
-      the documentation and/or other materials provided with the
-      distribution.
-    * Neither the name of Intel Corporation nor the names of its
-      contributors may be used to endorse or promote products derived
-      from this software without specific prior written permission.
-
-  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-**********************************************************************/
-
-#ifndef _EC_BASE_H_
-#define _EC_BASE_H_
-
-// Global GF(256) tables
-#ifndef GF_LARGE_TABLES
-unsigned char gff_base[] = {
-       0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x1d, 0x3a,
-       0x74, 0xe8, 0xcd, 0x87, 0x13, 0x26, 0x4c, 0x98, 0x2d, 0x5a,
-       0xb4, 0x75, 0xea, 0xc9, 0x8f, 0x03, 0x06, 0x0c, 0x18, 0x30,
-       0x60, 0xc0, 0x9d, 0x27, 0x4e, 0x9c, 0x25, 0x4a, 0x94, 0x35,
-       0x6a, 0xd4, 0xb5, 0x77, 0xee, 0xc1, 0x9f, 0x23, 0x46, 0x8c,
-       0x05, 0x0a, 0x14, 0x28, 0x50, 0xa0, 0x5d, 0xba, 0x69, 0xd2,
-       0xb9, 0x6f, 0xde, 0xa1, 0x5f, 0xbe, 0x61, 0xc2, 0x99, 0x2f,
-       0x5e, 0xbc, 0x65, 0xca, 0x89, 0x0f, 0x1e, 0x3c, 0x78, 0xf0,
-       0xfd, 0xe7, 0xd3, 0xbb, 0x6b, 0xd6, 0xb1, 0x7f, 0xfe, 0xe1,
-       0xdf, 0xa3, 0x5b, 0xb6, 0x71, 0xe2, 0xd9, 0xaf, 0x43, 0x86,
-       0x11, 0x22, 0x44, 0x88, 0x0d, 0x1a, 0x34, 0x68, 0xd0, 0xbd,
-       0x67, 0xce, 0x81, 0x1f, 0x3e, 0x7c, 0xf8, 0xed, 0xc7, 0x93,
-       0x3b, 0x76, 0xec, 0xc5, 0x97, 0x33, 0x66, 0xcc, 0x85, 0x17,
-       0x2e, 0x5c, 0xb8, 0x6d, 0xda, 0xa9, 0x4f, 0x9e, 0x21, 0x42,
-       0x84, 0x15, 0x2a, 0x54, 0xa8, 0x4d, 0x9a, 0x29, 0x52, 0xa4,
-       0x55, 0xaa, 0x49, 0x92, 0x39, 0x72, 0xe4, 0xd5, 0xb7, 0x73,
-       0xe6, 0xd1, 0xbf, 0x63, 0xc6, 0x91, 0x3f, 0x7e, 0xfc, 0xe5,
-       0xd7, 0xb3, 0x7b, 0xf6, 0xf1, 0xff, 0xe3, 0xdb, 0xab, 0x4b,
-       0x96, 0x31, 0x62, 0xc4, 0x95, 0x37, 0x6e, 0xdc, 0xa5, 0x57,
-       0xae, 0x41, 0x82, 0x19, 0x32, 0x64, 0xc8, 0x8d, 0x07, 0x0e,
-       0x1c, 0x38, 0x70, 0xe0, 0xdd, 0xa7, 0x53, 0xa6, 0x51, 0xa2,
-       0x59, 0xb2, 0x79, 0xf2, 0xf9, 0xef, 0xc3, 0x9b, 0x2b, 0x56,
-       0xac, 0x45, 0x8a, 0x09, 0x12, 0x24, 0x48, 0x90, 0x3d, 0x7a,
-       0xf4, 0xf5, 0xf7, 0xf3, 0xfb, 0xeb, 0xcb, 0x8b, 0x0b, 0x16,
-       0x2c, 0x58, 0xb0, 0x7d, 0xfa, 0xe9, 0xcf, 0x83, 0x1b, 0x36,
-       0x6c, 0xd8, 0xad, 0x47, 0x8e, 0x01
-};
-
-unsigned char gflog_base[] = {
-       0x00, 0xff, 0x01, 0x19, 0x02, 0x32, 0x1a, 0xc6, 0x03, 0xdf,
-       0x33, 0xee, 0x1b, 0x68, 0xc7, 0x4b, 0x04, 0x64, 0xe0, 0x0e,
-       0x34, 0x8d, 0xef, 0x81, 0x1c, 0xc1, 0x69, 0xf8, 0xc8, 0x08,
-       0x4c, 0x71, 0x05, 0x8a, 0x65, 0x2f, 0xe1, 0x24, 0x0f, 0x21,
-       0x35, 0x93, 0x8e, 0xda, 0xf0, 0x12, 0x82, 0x45, 0x1d, 0xb5,
-       0xc2, 0x7d, 0x6a, 0x27, 0xf9, 0xb9, 0xc9, 0x9a, 0x09, 0x78,
-       0x4d, 0xe4, 0x72, 0xa6, 0x06, 0xbf, 0x8b, 0x62, 0x66, 0xdd,
-       0x30, 0xfd, 0xe2, 0x98, 0x25, 0xb3, 0x10, 0x91, 0x22, 0x88,
-       0x36, 0xd0, 0x94, 0xce, 0x8f, 0x96, 0xdb, 0xbd, 0xf1, 0xd2,
-       0x13, 0x5c, 0x83, 0x38, 0x46, 0x40, 0x1e, 0x42, 0xb6, 0xa3,
-       0xc3, 0x48, 0x7e, 0x6e, 0x6b, 0x3a, 0x28, 0x54, 0xfa, 0x85,
-       0xba, 0x3d, 0xca, 0x5e, 0x9b, 0x9f, 0x0a, 0x15, 0x79, 0x2b,
-       0x4e, 0xd4, 0xe5, 0xac, 0x73, 0xf3, 0xa7, 0x57, 0x07, 0x70,
-       0xc0, 0xf7, 0x8c, 0x80, 0x63, 0x0d, 0x67, 0x4a, 0xde, 0xed,
-       0x31, 0xc5, 0xfe, 0x18, 0xe3, 0xa5, 0x99, 0x77, 0x26, 0xb8,
-       0xb4, 0x7c, 0x11, 0x44, 0x92, 0xd9, 0x23, 0x20, 0x89, 0x2e,
-       0x37, 0x3f, 0xd1, 0x5b, 0x95, 0xbc, 0xcf, 0xcd, 0x90, 0x87,
-       0x97, 0xb2, 0xdc, 0xfc, 0xbe, 0x61, 0xf2, 0x56, 0xd3, 0xab,
-       0x14, 0x2a, 0x5d, 0x9e, 0x84, 0x3c, 0x39, 0x53, 0x47, 0x6d,
-       0x41, 0xa2, 0x1f, 0x2d, 0x43, 0xd8, 0xb7, 0x7b, 0xa4, 0x76,
-       0xc4, 0x17, 0x49, 0xec, 0x7f, 0x0c, 0x6f, 0xf6, 0x6c, 0xa1,
-       0x3b, 0x52, 0x29, 0x9d, 0x55, 0xaa, 0xfb, 0x60, 0x86, 0xb1,
-       0xbb, 0xcc, 0x3e, 0x5a, 0xcb, 0x59, 0x5f, 0xb0, 0x9c, 0xa9,
-       0xa0, 0x51, 0x0b, 0xf5, 0x16, 0xeb, 0x7a, 0x75, 0x2c, 0xd7,
-       0x4f, 0xae, 0xd5, 0xe9, 0xe6, 0xe7, 0xad, 0xe8, 0x74, 0xd6,
-       0xf4, 0xea, 0xa8, 0x50, 0x58, 0xaf
-};
-#else
-unsigned char gf_mul_table_base[] = {
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x02, 0x03,
-       0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d,
-       0x0e, 0x0f, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-       0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, 0x20, 0x21,
-       0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b,
-       0x2c, 0x2d, 0x2e, 0x2f, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35,
-       0x36, 0x37, 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-       0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49,
-       0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x52, 0x53,
-       0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d,
-       0x5e, 0x5f, 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
-       0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f, 0x70, 0x71,
-       0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7a, 0x7b,
-       0x7c, 0x7d, 0x7e, 0x7f, 0x80, 0x81, 0x82, 0x83, 0x84, 0x85,
-       0x86, 0x87, 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
-       0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99,
-       0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, 0xa0, 0xa1, 0xa2, 0xa3,
-       0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad,
-       0xae, 0xaf, 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
-       0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf, 0xc0, 0xc1,
-       0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0xcb,
-       0xcc, 0xcd, 0xce, 0xcf, 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5,
-       0xd6, 0xd7, 0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
-       0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9,
-       0xea, 0xeb, 0xec, 0xed, 0xee, 0xef, 0xf0, 0xf1, 0xf2, 0xf3,
-       0xf4, 0xf5, 0xf6, 0xf7, 0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd,
-       0xfe, 0xff, 0x00, 0x02, 0x04, 0x06, 0x08, 0x0a, 0x0c, 0x0e,
-       0x10, 0x12, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0x1e, 0x20, 0x22,
-       0x24, 0x26, 0x28, 0x2a, 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36,
-       0x38, 0x3a, 0x3c, 0x3e, 0x40, 0x42, 0x44, 0x46, 0x48, 0x4a,
-       0x4c, 0x4e, 0x50, 0x52, 0x54, 0x56, 0x58, 0x5a, 0x5c, 0x5e,
-       0x60, 0x62, 0x64, 0x66, 0x68, 0x6a, 0x6c, 0x6e, 0x70, 0x72,
-       0x74, 0x76, 0x78, 0x7a, 0x7c, 0x7e, 0x80, 0x82, 0x84, 0x86,
-       0x88, 0x8a, 0x8c, 0x8e, 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a,
-       0x9c, 0x9e, 0xa0, 0xa2, 0xa4, 0xa6, 0xa8, 0xaa, 0xac, 0xae,
-       0xb0, 0xb2, 0xb4, 0xb6, 0xb8, 0xba, 0xbc, 0xbe, 0xc0, 0xc2,
-       0xc4, 0xc6, 0xc8, 0xca, 0xcc, 0xce, 0xd0, 0xd2, 0xd4, 0xd6,
-       0xd8, 0xda, 0xdc, 0xde, 0xe0, 0xe2, 0xe4, 0xe6, 0xe8, 0xea,
-       0xec, 0xee, 0xf0, 0xf2, 0xf4, 0xf6, 0xf8, 0xfa, 0xfc, 0xfe,
-       0x1d, 0x1f, 0x19, 0x1b, 0x15, 0x17, 0x11, 0x13, 0x0d, 0x0f,
-       0x09, 0x0b, 0x05, 0x07, 0x01, 0x03, 0x3d, 0x3f, 0x39, 0x3b,
-       0x35, 0x37, 0x31, 0x33, 0x2d, 0x2f, 0x29, 0x2b, 0x25, 0x27,
-       0x21, 0x23, 0x5d, 0x5f, 0x59, 0x5b, 0x55, 0x57, 0x51, 0x53,
-       0x4d, 0x4f, 0x49, 0x4b, 0x45, 0x47, 0x41, 0x43, 0x7d, 0x7f,
-       0x79, 0x7b, 0x75, 0x77, 0x71, 0x73, 0x6d, 0x6f, 0x69, 0x6b,
-       0x65, 0x67, 0x61, 0x63, 0x9d, 0x9f, 0x99, 0x9b, 0x95, 0x97,
-       0x91, 0x93, 0x8d, 0x8f, 0x89, 0x8b, 0x85, 0x87, 0x81, 0x83,
-       0xbd, 0xbf, 0xb9, 0xbb, 0xb5, 0xb7, 0xb1, 0xb3, 0xad, 0xaf,
-       0xa9, 0xab, 0xa5, 0xa7, 0xa1, 0xa3, 0xdd, 0xdf, 0xd9, 0xdb,
-       0xd5, 0xd7, 0xd1, 0xd3, 0xcd, 0xcf, 0xc9, 0xcb, 0xc5, 0xc7,
-       0xc1, 0xc3, 0xfd, 0xff, 0xf9, 0xfb, 0xf5, 0xf7, 0xf1, 0xf3,
-       0xed, 0xef, 0xe9, 0xeb, 0xe5, 0xe7, 0xe1, 0xe3, 0x00, 0x03,
-       0x06, 0x05, 0x0c, 0x0f, 0x0a, 0x09, 0x18, 0x1b, 0x1e, 0x1d,
-       0x14, 0x17, 0x12, 0x11, 0x30, 0x33, 0x36, 0x35, 0x3c, 0x3f,
-       0x3a, 0x39, 0x28, 0x2b, 0x2e, 0x2d, 0x24, 0x27, 0x22, 0x21,
-       0x60, 0x63, 0x66, 0x65, 0x6c, 0x6f, 0x6a, 0x69, 0x78, 0x7b,
-       0x7e, 0x7d, 0x74, 0x77, 0x72, 0x71, 0x50, 0x53, 0x56, 0x55,
-       0x5c, 0x5f, 0x5a, 0x59, 0x48, 0x4b, 0x4e, 0x4d, 0x44, 0x47,
-       0x42, 0x41, 0xc0, 0xc3, 0xc6, 0xc5, 0xcc, 0xcf, 0xca, 0xc9,
-       0xd8, 0xdb, 0xde, 0xdd, 0xd4, 0xd7, 0xd2, 0xd1, 0xf0, 0xf3,
-       0xf6, 0xf5, 0xfc, 0xff, 0xfa, 0xf9, 0xe8, 0xeb, 0xee, 0xed,
-       0xe4, 0xe7, 0xe2, 0xe1, 0xa0, 0xa3, 0xa6, 0xa5, 0xac, 0xaf,
-       0xaa, 0xa9, 0xb8, 0xbb, 0xbe, 0xbd, 0xb4, 0xb7, 0xb2, 0xb1,
-       0x90, 0x93, 0x96, 0x95, 0x9c, 0x9f, 0x9a, 0x99, 0x88, 0x8b,
-       0x8e, 0x8d, 0x84, 0x87, 0x82, 0x81, 0x9d, 0x9e, 0x9b, 0x98,
-       0x91, 0x92, 0x97, 0x94, 0x85, 0x86, 0x83, 0x80, 0x89, 0x8a,
-       0x8f, 0x8c, 0xad, 0xae, 0xab, 0xa8, 0xa1, 0xa2, 0xa7, 0xa4,
-       0xb5, 0xb6, 0xb3, 0xb0, 0xb9, 0xba, 0xbf, 0xbc, 0xfd, 0xfe,
-       0xfb, 0xf8, 0xf1, 0xf2, 0xf7, 0xf4, 0xe5, 0xe6, 0xe3, 0xe0,
-       0xe9, 0xea, 0xef, 0xec, 0xcd, 0xce, 0xcb, 0xc8, 0xc1, 0xc2,
-       0xc7, 0xc4, 0xd5, 0xd6, 0xd3, 0xd0, 0xd9, 0xda, 0xdf, 0xdc,
-       0x5d, 0x5e, 0x5b, 0x58, 0x51, 0x52, 0x57, 0x54, 0x45, 0x46,
-       0x43, 0x40, 0x49, 0x4a, 0x4f, 0x4c, 0x6d, 0x6e, 0x6b, 0x68,
-       0x61, 0x62, 0x67, 0x64, 0x75, 0x76, 0x73, 0x70, 0x79, 0x7a,
-       0x7f, 0x7c, 0x3d, 0x3e, 0x3b, 0x38, 0x31, 0x32, 0x37, 0x34,
-       0x25, 0x26, 0x23, 0x20, 0x29, 0x2a, 0x2f, 0x2c, 0x0d, 0x0e,
-       0x0b, 0x08, 0x01, 0x02, 0x07, 0x04, 0x15, 0x16, 0x13, 0x10,
-       0x19, 0x1a, 0x1f, 0x1c, 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14,
-       0x18, 0x1c, 0x20, 0x24, 0x28, 0x2c, 0x30, 0x34, 0x38, 0x3c,
-       0x40, 0x44, 0x48, 0x4c, 0x50, 0x54, 0x58, 0x5c, 0x60, 0x64,
-       0x68, 0x6c, 0x70, 0x74, 0x78, 0x7c, 0x80, 0x84, 0x88, 0x8c,
-       0x90, 0x94, 0x98, 0x9c, 0xa0, 0xa4, 0xa8, 0xac, 0xb0, 0xb4,
-       0xb8, 0xbc, 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4, 0xd8, 0xdc,
-       0xe0, 0xe4, 0xe8, 0xec, 0xf0, 0xf4, 0xf8, 0xfc, 0x1d, 0x19,
-       0x15, 0x11, 0x0d, 0x09, 0x05, 0x01, 0x3d, 0x39, 0x35, 0x31,
-       0x2d, 0x29, 0x25, 0x21, 0x5d, 0x59, 0x55, 0x51, 0x4d, 0x49,
-       0x45, 0x41, 0x7d, 0x79, 0x75, 0x71, 0x6d, 0x69, 0x65, 0x61,
-       0x9d, 0x99, 0x95, 0x91, 0x8d, 0x89, 0x85, 0x81, 0xbd, 0xb9,
-       0xb5, 0xb1, 0xad, 0xa9, 0xa5, 0xa1, 0xdd, 0xd9, 0xd5, 0xd1,
-       0xcd, 0xc9, 0xc5, 0xc1, 0xfd, 0xf9, 0xf5, 0xf1, 0xed, 0xe9,
-       0xe5, 0xe1, 0x3a, 0x3e, 0x32, 0x36, 0x2a, 0x2e, 0x22, 0x26,
-       0x1a, 0x1e, 0x12, 0x16, 0x0a, 0x0e, 0x02, 0x06, 0x7a, 0x7e,
-       0x72, 0x76, 0x6a, 0x6e, 0x62, 0x66, 0x5a, 0x5e, 0x52, 0x56,
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-       0x43, 0xba, 0x6f, 0x96, 0x80, 0x79, 0x37, 0xce, 0xd8, 0x21,
-       0xf4, 0x0d, 0x1b, 0xe2, 0x87, 0x7e, 0x68, 0x91, 0x44, 0xbd,
-       0xab, 0x52, 0x1c, 0xe5, 0xf3, 0x0a, 0xdf, 0x26, 0x30, 0xc9,
-       0xfa, 0x03, 0x15, 0xec, 0x39, 0xc0, 0xd6, 0x2f, 0x61, 0x98,
-       0x8e, 0x77, 0xa2, 0x5b, 0x4d, 0xb4, 0xd1, 0x28, 0x3e, 0xc7,
-       0x12, 0xeb, 0xfd, 0x04, 0x4a, 0xb3, 0xa5, 0x5c, 0x89, 0x70,
-       0x66, 0x9f, 0x45, 0xbc, 0xaa, 0x53, 0x86, 0x7f, 0x69, 0x90,
-       0xde, 0x27, 0x31, 0xc8, 0x1d, 0xe4, 0xf2, 0x0b, 0x6e, 0x97,
-       0x81, 0x78, 0xad, 0x54, 0x42, 0xbb, 0xf5, 0x0c, 0x1a, 0xe3,
-       0x36, 0xcf, 0xd9, 0x20, 0x13, 0xea, 0xfc, 0x05, 0xd0, 0x29,
-       0x3f, 0xc6, 0x88, 0x71, 0x67, 0x9e, 0x4b, 0xb2, 0xa4, 0x5d,
-       0x38, 0xc1, 0xd7, 0x2e, 0xfb, 0x02, 0x14, 0xed, 0xa3, 0x5a,
-       0x4c, 0xb5, 0x60, 0x99, 0x8f, 0x76, 0xe9, 0x10, 0x06, 0xff,
-       0x2a, 0xd3, 0xc5, 0x3c, 0x72, 0x8b, 0x9d, 0x64, 0xb1, 0x48,
-       0x5e, 0xa7, 0xc2, 0x3b, 0x2d, 0xd4, 0x01, 0xf8, 0xee, 0x17,
-       0x59, 0xa0, 0xb6, 0x4f, 0x9a, 0x63, 0x75, 0x8c, 0xbf, 0x46,
-       0x50, 0xa9, 0x7c, 0x85, 0x93, 0x6a, 0x24, 0xdd, 0xcb, 0x32,
-       0xe7, 0x1e, 0x08, 0xf1, 0x94, 0x6d, 0x7b, 0x82, 0x57, 0xae,
-       0xb8, 0x41, 0x0f, 0xf6, 0xe0, 0x19, 0xcc, 0x35, 0x23, 0xda,
-       0x00, 0xfa, 0xe9, 0x13, 0xcf, 0x35, 0x26, 0xdc, 0x83, 0x79,
-       0x6a, 0x90, 0x4c, 0xb6, 0xa5, 0x5f, 0x1b, 0xe1, 0xf2, 0x08,
-       0xd4, 0x2e, 0x3d, 0xc7, 0x98, 0x62, 0x71, 0x8b, 0x57, 0xad,
-       0xbe, 0x44, 0x36, 0xcc, 0xdf, 0x25, 0xf9, 0x03, 0x10, 0xea,
-       0xb5, 0x4f, 0x5c, 0xa6, 0x7a, 0x80, 0x93, 0x69, 0x2d, 0xd7,
-       0xc4, 0x3e, 0xe2, 0x18, 0x0b, 0xf1, 0xae, 0x54, 0x47, 0xbd,
-       0x61, 0x9b, 0x88, 0x72, 0x6c, 0x96, 0x85, 0x7f, 0xa3, 0x59,
-       0x4a, 0xb0, 0xef, 0x15, 0x06, 0xfc, 0x20, 0xda, 0xc9, 0x33,
-       0x77, 0x8d, 0x9e, 0x64, 0xb8, 0x42, 0x51, 0xab, 0xf4, 0x0e,
-       0x1d, 0xe7, 0x3b, 0xc1, 0xd2, 0x28, 0x5a, 0xa0, 0xb3, 0x49,
-       0x95, 0x6f, 0x7c, 0x86, 0xd9, 0x23, 0x30, 0xca, 0x16, 0xec,
-       0xff, 0x05, 0x41, 0xbb, 0xa8, 0x52, 0x8e, 0x74, 0x67, 0x9d,
-       0xc2, 0x38, 0x2b, 0xd1, 0x0d, 0xf7, 0xe4, 0x1e, 0xd8, 0x22,
-       0x31, 0xcb, 0x17, 0xed, 0xfe, 0x04, 0x5b, 0xa1, 0xb2, 0x48,
-       0x94, 0x6e, 0x7d, 0x87, 0xc3, 0x39, 0x2a, 0xd0, 0x0c, 0xf6,
-       0xe5, 0x1f, 0x40, 0xba, 0xa9, 0x53, 0x8f, 0x75, 0x66, 0x9c,
-       0xee, 0x14, 0x07, 0xfd, 0x21, 0xdb, 0xc8, 0x32, 0x6d, 0x97,
-       0x84, 0x7e, 0xa2, 0x58, 0x4b, 0xb1, 0xf5, 0x0f, 0x1c, 0xe6,
-       0x3a, 0xc0, 0xd3, 0x29, 0x76, 0x8c, 0x9f, 0x65, 0xb9, 0x43,
-       0x50, 0xaa, 0xb4, 0x4e, 0x5d, 0xa7, 0x7b, 0x81, 0x92, 0x68,
-       0x37, 0xcd, 0xde, 0x24, 0xf8, 0x02, 0x11, 0xeb, 0xaf, 0x55,
-       0x46, 0xbc, 0x60, 0x9a, 0x89, 0x73, 0x2c, 0xd6, 0xc5, 0x3f,
-       0xe3, 0x19, 0x0a, 0xf0, 0x82, 0x78, 0x6b, 0x91, 0x4d, 0xb7,
-       0xa4, 0x5e, 0x01, 0xfb, 0xe8, 0x12, 0xce, 0x34, 0x27, 0xdd,
-       0x99, 0x63, 0x70, 0x8a, 0x56, 0xac, 0xbf, 0x45, 0x1a, 0xe0,
-       0xf3, 0x09, 0xd5, 0x2f, 0x3c, 0xc6, 0x00, 0xfb, 0xeb, 0x10,
-       0xcb, 0x30, 0x20, 0xdb, 0x8b, 0x70, 0x60, 0x9b, 0x40, 0xbb,
-       0xab, 0x50, 0x0b, 0xf0, 0xe0, 0x1b, 0xc0, 0x3b, 0x2b, 0xd0,
-       0x80, 0x7b, 0x6b, 0x90, 0x4b, 0xb0, 0xa0, 0x5b, 0x16, 0xed,
-       0xfd, 0x06, 0xdd, 0x26, 0x36, 0xcd, 0x9d, 0x66, 0x76, 0x8d,
-       0x56, 0xad, 0xbd, 0x46, 0x1d, 0xe6, 0xf6, 0x0d, 0xd6, 0x2d,
-       0x3d, 0xc6, 0x96, 0x6d, 0x7d, 0x86, 0x5d, 0xa6, 0xb6, 0x4d,
-       0x2c, 0xd7, 0xc7, 0x3c, 0xe7, 0x1c, 0x0c, 0xf7, 0xa7, 0x5c,
-       0x4c, 0xb7, 0x6c, 0x97, 0x87, 0x7c, 0x27, 0xdc, 0xcc, 0x37,
-       0xec, 0x17, 0x07, 0xfc, 0xac, 0x57, 0x47, 0xbc, 0x67, 0x9c,
-       0x8c, 0x77, 0x3a, 0xc1, 0xd1, 0x2a, 0xf1, 0x0a, 0x1a, 0xe1,
-       0xb1, 0x4a, 0x5a, 0xa1, 0x7a, 0x81, 0x91, 0x6a, 0x31, 0xca,
-       0xda, 0x21, 0xfa, 0x01, 0x11, 0xea, 0xba, 0x41, 0x51, 0xaa,
-       0x71, 0x8a, 0x9a, 0x61, 0x58, 0xa3, 0xb3, 0x48, 0x93, 0x68,
-       0x78, 0x83, 0xd3, 0x28, 0x38, 0xc3, 0x18, 0xe3, 0xf3, 0x08,
-       0x53, 0xa8, 0xb8, 0x43, 0x98, 0x63, 0x73, 0x88, 0xd8, 0x23,
-       0x33, 0xc8, 0x13, 0xe8, 0xf8, 0x03, 0x4e, 0xb5, 0xa5, 0x5e,
-       0x85, 0x7e, 0x6e, 0x95, 0xc5, 0x3e, 0x2e, 0xd5, 0x0e, 0xf5,
-       0xe5, 0x1e, 0x45, 0xbe, 0xae, 0x55, 0x8e, 0x75, 0x65, 0x9e,
-       0xce, 0x35, 0x25, 0xde, 0x05, 0xfe, 0xee, 0x15, 0x74, 0x8f,
-       0x9f, 0x64, 0xbf, 0x44, 0x54, 0xaf, 0xff, 0x04, 0x14, 0xef,
-       0x34, 0xcf, 0xdf, 0x24, 0x7f, 0x84, 0x94, 0x6f, 0xb4, 0x4f,
-       0x5f, 0xa4, 0xf4, 0x0f, 0x1f, 0xe4, 0x3f, 0xc4, 0xd4, 0x2f,
-       0x62, 0x99, 0x89, 0x72, 0xa9, 0x52, 0x42, 0xb9, 0xe9, 0x12,
-       0x02, 0xf9, 0x22, 0xd9, 0xc9, 0x32, 0x69, 0x92, 0x82, 0x79,
-       0xa2, 0x59, 0x49, 0xb2, 0xe2, 0x19, 0x09, 0xf2, 0x29, 0xd2,
-       0xc2, 0x39, 0x00, 0xfc, 0xe5, 0x19, 0xd7, 0x2b, 0x32, 0xce,
-       0xb3, 0x4f, 0x56, 0xaa, 0x64, 0x98, 0x81, 0x7d, 0x7b, 0x87,
-       0x9e, 0x62, 0xac, 0x50, 0x49, 0xb5, 0xc8, 0x34, 0x2d, 0xd1,
-       0x1f, 0xe3, 0xfa, 0x06, 0xf6, 0x0a, 0x13, 0xef, 0x21, 0xdd,
-       0xc4, 0x38, 0x45, 0xb9, 0xa0, 0x5c, 0x92, 0x6e, 0x77, 0x8b,
-       0x8d, 0x71, 0x68, 0x94, 0x5a, 0xa6, 0xbf, 0x43, 0x3e, 0xc2,
-       0xdb, 0x27, 0xe9, 0x15, 0x0c, 0xf0, 0xf1, 0x0d, 0x14, 0xe8,
-       0x26, 0xda, 0xc3, 0x3f, 0x42, 0xbe, 0xa7, 0x5b, 0x95, 0x69,
-       0x70, 0x8c, 0x8a, 0x76, 0x6f, 0x93, 0x5d, 0xa1, 0xb8, 0x44,
-       0x39, 0xc5, 0xdc, 0x20, 0xee, 0x12, 0x0b, 0xf7, 0x07, 0xfb,
-       0xe2, 0x1e, 0xd0, 0x2c, 0x35, 0xc9, 0xb4, 0x48, 0x51, 0xad,
-       0x63, 0x9f, 0x86, 0x7a, 0x7c, 0x80, 0x99, 0x65, 0xab, 0x57,
-       0x4e, 0xb2, 0xcf, 0x33, 0x2a, 0xd6, 0x18, 0xe4, 0xfd, 0x01,
-       0xff, 0x03, 0x1a, 0xe6, 0x28, 0xd4, 0xcd, 0x31, 0x4c, 0xb0,
-       0xa9, 0x55, 0x9b, 0x67, 0x7e, 0x82, 0x84, 0x78, 0x61, 0x9d,
-       0x53, 0xaf, 0xb6, 0x4a, 0x37, 0xcb, 0xd2, 0x2e, 0xe0, 0x1c,
-       0x05, 0xf9, 0x09, 0xf5, 0xec, 0x10, 0xde, 0x22, 0x3b, 0xc7,
-       0xba, 0x46, 0x5f, 0xa3, 0x6d, 0x91, 0x88, 0x74, 0x72, 0x8e,
-       0x97, 0x6b, 0xa5, 0x59, 0x40, 0xbc, 0xc1, 0x3d, 0x24, 0xd8,
-       0x16, 0xea, 0xf3, 0x0f, 0x0e, 0xf2, 0xeb, 0x17, 0xd9, 0x25,
-       0x3c, 0xc0, 0xbd, 0x41, 0x58, 0xa4, 0x6a, 0x96, 0x8f, 0x73,
-       0x75, 0x89, 0x90, 0x6c, 0xa2, 0x5e, 0x47, 0xbb, 0xc6, 0x3a,
-       0x23, 0xdf, 0x11, 0xed, 0xf4, 0x08, 0xf8, 0x04, 0x1d, 0xe1,
-       0x2f, 0xd3, 0xca, 0x36, 0x4b, 0xb7, 0xae, 0x52, 0x9c, 0x60,
-       0x79, 0x85, 0x83, 0x7f, 0x66, 0x9a, 0x54, 0xa8, 0xb1, 0x4d,
-       0x30, 0xcc, 0xd5, 0x29, 0xe7, 0x1b, 0x02, 0xfe, 0x00, 0xfd,
-       0xe7, 0x1a, 0xd3, 0x2e, 0x34, 0xc9, 0xbb, 0x46, 0x5c, 0xa1,
-       0x68, 0x95, 0x8f, 0x72, 0x6b, 0x96, 0x8c, 0x71, 0xb8, 0x45,
-       0x5f, 0xa2, 0xd0, 0x2d, 0x37, 0xca, 0x03, 0xfe, 0xe4, 0x19,
-       0xd6, 0x2b, 0x31, 0xcc, 0x05, 0xf8, 0xe2, 0x1f, 0x6d, 0x90,
-       0x8a, 0x77, 0xbe, 0x43, 0x59, 0xa4, 0xbd, 0x40, 0x5a, 0xa7,
-       0x6e, 0x93, 0x89, 0x74, 0x06, 0xfb, 0xe1, 0x1c, 0xd5, 0x28,
-       0x32, 0xcf, 0xb1, 0x4c, 0x56, 0xab, 0x62, 0x9f, 0x85, 0x78,
-       0x0a, 0xf7, 0xed, 0x10, 0xd9, 0x24, 0x3e, 0xc3, 0xda, 0x27,
-       0x3d, 0xc0, 0x09, 0xf4, 0xee, 0x13, 0x61, 0x9c, 0x86, 0x7b,
-       0xb2, 0x4f, 0x55, 0xa8, 0x67, 0x9a, 0x80, 0x7d, 0xb4, 0x49,
-       0x53, 0xae, 0xdc, 0x21, 0x3b, 0xc6, 0x0f, 0xf2, 0xe8, 0x15,
-       0x0c, 0xf1, 0xeb, 0x16, 0xdf, 0x22, 0x38, 0xc5, 0xb7, 0x4a,
-       0x50, 0xad, 0x64, 0x99, 0x83, 0x7e, 0x7f, 0x82, 0x98, 0x65,
-       0xac, 0x51, 0x4b, 0xb6, 0xc4, 0x39, 0x23, 0xde, 0x17, 0xea,
-       0xf0, 0x0d, 0x14, 0xe9, 0xf3, 0x0e, 0xc7, 0x3a, 0x20, 0xdd,
-       0xaf, 0x52, 0x48, 0xb5, 0x7c, 0x81, 0x9b, 0x66, 0xa9, 0x54,
-       0x4e, 0xb3, 0x7a, 0x87, 0x9d, 0x60, 0x12, 0xef, 0xf5, 0x08,
-       0xc1, 0x3c, 0x26, 0xdb, 0xc2, 0x3f, 0x25, 0xd8, 0x11, 0xec,
-       0xf6, 0x0b, 0x79, 0x84, 0x9e, 0x63, 0xaa, 0x57, 0x4d, 0xb0,
-       0xce, 0x33, 0x29, 0xd4, 0x1d, 0xe0, 0xfa, 0x07, 0x75, 0x88,
-       0x92, 0x6f, 0xa6, 0x5b, 0x41, 0xbc, 0xa5, 0x58, 0x42, 0xbf,
-       0x76, 0x8b, 0x91, 0x6c, 0x1e, 0xe3, 0xf9, 0x04, 0xcd, 0x30,
-       0x2a, 0xd7, 0x18, 0xe5, 0xff, 0x02, 0xcb, 0x36, 0x2c, 0xd1,
-       0xa3, 0x5e, 0x44, 0xb9, 0x70, 0x8d, 0x97, 0x6a, 0x73, 0x8e,
-       0x94, 0x69, 0xa0, 0x5d, 0x47, 0xba, 0xc8, 0x35, 0x2f, 0xd2,
-       0x1b, 0xe6, 0xfc, 0x01, 0x00, 0xfe, 0xe1, 0x1f, 0xdf, 0x21,
-       0x3e, 0xc0, 0xa3, 0x5d, 0x42, 0xbc, 0x7c, 0x82, 0x9d, 0x63,
-       0x5b, 0xa5, 0xba, 0x44, 0x84, 0x7a, 0x65, 0x9b, 0xf8, 0x06,
-       0x19, 0xe7, 0x27, 0xd9, 0xc6, 0x38, 0xb6, 0x48, 0x57, 0xa9,
-       0x69, 0x97, 0x88, 0x76, 0x15, 0xeb, 0xf4, 0x0a, 0xca, 0x34,
-       0x2b, 0xd5, 0xed, 0x13, 0x0c, 0xf2, 0x32, 0xcc, 0xd3, 0x2d,
-       0x4e, 0xb0, 0xaf, 0x51, 0x91, 0x6f, 0x70, 0x8e, 0x71, 0x8f,
-       0x90, 0x6e, 0xae, 0x50, 0x4f, 0xb1, 0xd2, 0x2c, 0x33, 0xcd,
-       0x0d, 0xf3, 0xec, 0x12, 0x2a, 0xd4, 0xcb, 0x35, 0xf5, 0x0b,
-       0x14, 0xea, 0x89, 0x77, 0x68, 0x96, 0x56, 0xa8, 0xb7, 0x49,
-       0xc7, 0x39, 0x26, 0xd8, 0x18, 0xe6, 0xf9, 0x07, 0x64, 0x9a,
-       0x85, 0x7b, 0xbb, 0x45, 0x5a, 0xa4, 0x9c, 0x62, 0x7d, 0x83,
-       0x43, 0xbd, 0xa2, 0x5c, 0x3f, 0xc1, 0xde, 0x20, 0xe0, 0x1e,
-       0x01, 0xff, 0xe2, 0x1c, 0x03, 0xfd, 0x3d, 0xc3, 0xdc, 0x22,
-       0x41, 0xbf, 0xa0, 0x5e, 0x9e, 0x60, 0x7f, 0x81, 0xb9, 0x47,
-       0x58, 0xa6, 0x66, 0x98, 0x87, 0x79, 0x1a, 0xe4, 0xfb, 0x05,
-       0xc5, 0x3b, 0x24, 0xda, 0x54, 0xaa, 0xb5, 0x4b, 0x8b, 0x75,
-       0x6a, 0x94, 0xf7, 0x09, 0x16, 0xe8, 0x28, 0xd6, 0xc9, 0x37,
-       0x0f, 0xf1, 0xee, 0x10, 0xd0, 0x2e, 0x31, 0xcf, 0xac, 0x52,
-       0x4d, 0xb3, 0x73, 0x8d, 0x92, 0x6c, 0x93, 0x6d, 0x72, 0x8c,
-       0x4c, 0xb2, 0xad, 0x53, 0x30, 0xce, 0xd1, 0x2f, 0xef, 0x11,
-       0x0e, 0xf0, 0xc8, 0x36, 0x29, 0xd7, 0x17, 0xe9, 0xf6, 0x08,
-       0x6b, 0x95, 0x8a, 0x74, 0xb4, 0x4a, 0x55, 0xab, 0x25, 0xdb,
-       0xc4, 0x3a, 0xfa, 0x04, 0x1b, 0xe5, 0x86, 0x78, 0x67, 0x99,
-       0x59, 0xa7, 0xb8, 0x46, 0x7e, 0x80, 0x9f, 0x61, 0xa1, 0x5f,
-       0x40, 0xbe, 0xdd, 0x23, 0x3c, 0xc2, 0x02, 0xfc, 0xe3, 0x1d,
-       0x00, 0xff, 0xe3, 0x1c, 0xdb, 0x24, 0x38, 0xc7, 0xab, 0x54,
-       0x48, 0xb7, 0x70, 0x8f, 0x93, 0x6c, 0x4b, 0xb4, 0xa8, 0x57,
-       0x90, 0x6f, 0x73, 0x8c, 0xe0, 0x1f, 0x03, 0xfc, 0x3b, 0xc4,
-       0xd8, 0x27, 0x96, 0x69, 0x75, 0x8a, 0x4d, 0xb2, 0xae, 0x51,
-       0x3d, 0xc2, 0xde, 0x21, 0xe6, 0x19, 0x05, 0xfa, 0xdd, 0x22,
-       0x3e, 0xc1, 0x06, 0xf9, 0xe5, 0x1a, 0x76, 0x89, 0x95, 0x6a,
-       0xad, 0x52, 0x4e, 0xb1, 0x31, 0xce, 0xd2, 0x2d, 0xea, 0x15,
-       0x09, 0xf6, 0x9a, 0x65, 0x79, 0x86, 0x41, 0xbe, 0xa2, 0x5d,
-       0x7a, 0x85, 0x99, 0x66, 0xa1, 0x5e, 0x42, 0xbd, 0xd1, 0x2e,
-       0x32, 0xcd, 0x0a, 0xf5, 0xe9, 0x16, 0xa7, 0x58, 0x44, 0xbb,
-       0x7c, 0x83, 0x9f, 0x60, 0x0c, 0xf3, 0xef, 0x10, 0xd7, 0x28,
-       0x34, 0xcb, 0xec, 0x13, 0x0f, 0xf0, 0x37, 0xc8, 0xd4, 0x2b,
-       0x47, 0xb8, 0xa4, 0x5b, 0x9c, 0x63, 0x7f, 0x80, 0x62, 0x9d,
-       0x81, 0x7e, 0xb9, 0x46, 0x5a, 0xa5, 0xc9, 0x36, 0x2a, 0xd5,
-       0x12, 0xed, 0xf1, 0x0e, 0x29, 0xd6, 0xca, 0x35, 0xf2, 0x0d,
-       0x11, 0xee, 0x82, 0x7d, 0x61, 0x9e, 0x59, 0xa6, 0xba, 0x45,
-       0xf4, 0x0b, 0x17, 0xe8, 0x2f, 0xd0, 0xcc, 0x33, 0x5f, 0xa0,
-       0xbc, 0x43, 0x84, 0x7b, 0x67, 0x98, 0xbf, 0x40, 0x5c, 0xa3,
-       0x64, 0x9b, 0x87, 0x78, 0x14, 0xeb, 0xf7, 0x08, 0xcf, 0x30,
-       0x2c, 0xd3, 0x53, 0xac, 0xb0, 0x4f, 0x88, 0x77, 0x6b, 0x94,
-       0xf8, 0x07, 0x1b, 0xe4, 0x23, 0xdc, 0xc0, 0x3f, 0x18, 0xe7,
-       0xfb, 0x04, 0xc3, 0x3c, 0x20, 0xdf, 0xb3, 0x4c, 0x50, 0xaf,
-       0x68, 0x97, 0x8b, 0x74, 0xc5, 0x3a, 0x26, 0xd9, 0x1e, 0xe1,
-       0xfd, 0x02, 0x6e, 0x91, 0x8d, 0x72, 0xb5, 0x4a, 0x56, 0xa9,
-       0x8e, 0x71, 0x6d, 0x92, 0x55, 0xaa, 0xb6, 0x49, 0x25, 0xda,
-       0xc6, 0x39, 0xfe, 0x01, 0x1d, 0xe2
-};
-
-unsigned char gf_inv_table_base[] = {
-       0x00, 0x01, 0x8e, 0xf4, 0x47, 0xa7, 0x7a, 0xba, 0xad, 0x9d,
-       0xdd, 0x98, 0x3d, 0xaa, 0x5d, 0x96, 0xd8, 0x72, 0xc0, 0x58,
-       0xe0, 0x3e, 0x4c, 0x66, 0x90, 0xde, 0x55, 0x80, 0xa0, 0x83,
-       0x4b, 0x2a, 0x6c, 0xed, 0x39, 0x51, 0x60, 0x56, 0x2c, 0x8a,
-       0x70, 0xd0, 0x1f, 0x4a, 0x26, 0x8b, 0x33, 0x6e, 0x48, 0x89,
-       0x6f, 0x2e, 0xa4, 0xc3, 0x40, 0x5e, 0x50, 0x22, 0xcf, 0xa9,
-       0xab, 0x0c, 0x15, 0xe1, 0x36, 0x5f, 0xf8, 0xd5, 0x92, 0x4e,
-       0xa6, 0x04, 0x30, 0x88, 0x2b, 0x1e, 0x16, 0x67, 0x45, 0x93,
-       0x38, 0x23, 0x68, 0x8c, 0x81, 0x1a, 0x25, 0x61, 0x13, 0xc1,
-       0xcb, 0x63, 0x97, 0x0e, 0x37, 0x41, 0x24, 0x57, 0xca, 0x5b,
-       0xb9, 0xc4, 0x17, 0x4d, 0x52, 0x8d, 0xef, 0xb3, 0x20, 0xec,
-       0x2f, 0x32, 0x28, 0xd1, 0x11, 0xd9, 0xe9, 0xfb, 0xda, 0x79,
-       0xdb, 0x77, 0x06, 0xbb, 0x84, 0xcd, 0xfe, 0xfc, 0x1b, 0x54,
-       0xa1, 0x1d, 0x7c, 0xcc, 0xe4, 0xb0, 0x49, 0x31, 0x27, 0x2d,
-       0x53, 0x69, 0x02, 0xf5, 0x18, 0xdf, 0x44, 0x4f, 0x9b, 0xbc,
-       0x0f, 0x5c, 0x0b, 0xdc, 0xbd, 0x94, 0xac, 0x09, 0xc7, 0xa2,
-       0x1c, 0x82, 0x9f, 0xc6, 0x34, 0xc2, 0x46, 0x05, 0xce, 0x3b,
-       0x0d, 0x3c, 0x9c, 0x08, 0xbe, 0xb7, 0x87, 0xe5, 0xee, 0x6b,
-       0xeb, 0xf2, 0xbf, 0xaf, 0xc5, 0x64, 0x07, 0x7b, 0x95, 0x9a,
-       0xae, 0xb6, 0x12, 0x59, 0xa5, 0x35, 0x65, 0xb8, 0xa3, 0x9e,
-       0xd2, 0xf7, 0x62, 0x5a, 0x85, 0x7d, 0xa8, 0x3a, 0x29, 0x71,
-       0xc8, 0xf6, 0xf9, 0x43, 0xd7, 0xd6, 0x10, 0x73, 0x76, 0x78,
-       0x99, 0x0a, 0x19, 0x91, 0x14, 0x3f, 0xe6, 0xf0, 0x86, 0xb1,
-       0xe2, 0xf1, 0xfa, 0x74, 0xf3, 0xb4, 0x6d, 0x21, 0xb2, 0x6a,
-       0xe3, 0xe7, 0xb5, 0xea, 0x03, 0x8f, 0xd3, 0xc9, 0x42, 0xd4,
-       0xe8, 0x75, 0x7f, 0xff, 0x7e, 0xfd
-};
-#endif // GF_LARGE_TABLES
-
-#endif //_EC_BASE_H_

diff --git a/src/erasure-code/isa/isa-l/erasure_code/ec_highlevel_func.c b/src/erasure-code/isa/isa-l/erasure_code/ec_highlevel_func.c
deleted file mode 100644 (file)
index fe2cdc9..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/ec_highlevel_func.c
+++ /dev/null
@@ -1,267 +0,0 @@
-/**********************************************************************
-  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-
-  Redistribution and use in source and binary forms, with or without
-  modification, are permitted provided that the following conditions
-  are met:
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-    * Redistributions in binary form must reproduce the above copyright
-      notice, this list of conditions and the following disclaimer in
-      the documentation and/or other materials provided with the
-      distribution.
-    * Neither the name of Intel Corporation nor the names of its
-      contributors may be used to endorse or promote products derived
-      from this software without specific prior written permission.
-
-  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-**********************************************************************/
-#include <limits.h>
-#include "erasure_code.h"
-#include "types.h"
-
-void ec_init_tables(int k, int rows, unsigned char *a, unsigned char *g_tbls)
-{
-       int i, j;
-
-       for (i = 0; i < rows; i++) {
-               for (j = 0; j < k; j++) {
-                       gf_vect_mul_init(*a++, g_tbls);
-                       g_tbls += 32;
-               }
-       }
-}
-
-void ec_encode_data_sse(int len, int k, int rows, unsigned char *g_tbls, unsigned char **data,
-                       unsigned char **coding)
-{
-
-       if (len < 16) {
-               ec_encode_data_base(len, k, rows, g_tbls, data, coding);
-               return;
-       }
-
-       while (rows >= 4) {
-               gf_4vect_dot_prod_sse(len, k, g_tbls, data, coding);
-               g_tbls += 4 * k * 32;
-               coding += 4;
-               rows -= 4;
-       }
-       switch (rows) {
-       case 3:
-               gf_3vect_dot_prod_sse(len, k, g_tbls, data, coding);
-               break;
-       case 2:
-               gf_2vect_dot_prod_sse(len, k, g_tbls, data, coding);
-               break;
-       case 1:
-               gf_vect_dot_prod_sse(len, k, g_tbls, data, *coding);
-               break;
-       case 0:
-               break;
-       }
-
-}
-
-void ec_encode_data_avx(int len, int k, int rows, unsigned char *g_tbls, unsigned char **data,
-                       unsigned char **coding)
-{
-       if (len < 16) {
-               ec_encode_data_base(len, k, rows, g_tbls, data, coding);
-               return;
-       }
-
-       while (rows >= 4) {
-               gf_4vect_dot_prod_avx(len, k, g_tbls, data, coding);
-               g_tbls += 4 * k * 32;
-               coding += 4;
-               rows -= 4;
-       }
-       switch (rows) {
-       case 3:
-               gf_3vect_dot_prod_avx(len, k, g_tbls, data, coding);
-               break;
-       case 2:
-               gf_2vect_dot_prod_avx(len, k, g_tbls, data, coding);
-               break;
-       case 1:
-               gf_vect_dot_prod_avx(len, k, g_tbls, data, *coding);
-               break;
-       case 0:
-               break;
-       }
-
-}
-
-void ec_encode_data_avx2(int len, int k, int rows, unsigned char *g_tbls, unsigned char **data,
-                        unsigned char **coding)
-{
-
-       if (len < 32) {
-               ec_encode_data_base(len, k, rows, g_tbls, data, coding);
-               return;
-       }
-
-       while (rows >= 4) {
-               gf_4vect_dot_prod_avx2(len, k, g_tbls, data, coding);
-               g_tbls += 4 * k * 32;
-               coding += 4;
-               rows -= 4;
-       }
-       switch (rows) {
-       case 3:
-               gf_3vect_dot_prod_avx2(len, k, g_tbls, data, coding);
-               break;
-       case 2:
-               gf_2vect_dot_prod_avx2(len, k, g_tbls, data, coding);
-               break;
-       case 1:
-               gf_vect_dot_prod_avx2(len, k, g_tbls, data, *coding);
-               break;
-       case 0:
-               break;
-       }
-
-}
-
-#if __WORDSIZE == 64 || _WIN64 || __x86_64__
-
-void ec_encode_data_update_sse(int len, int k, int rows, int vec_i, unsigned char *g_tbls,
-                              unsigned char *data, unsigned char **coding)
-{
-       if (len < 16) {
-               ec_encode_data_update_base(len, k, rows, vec_i, g_tbls, data, coding);
-               return;
-       }
-
-       while (rows > 6) {
-               gf_6vect_mad_sse(len, k, vec_i, g_tbls, data, coding);
-               g_tbls += 6 * k * 32;
-               coding += 6;
-               rows -= 6;
-       }
-       switch (rows) {
-       case 6:
-               gf_6vect_mad_sse(len, k, vec_i, g_tbls, data, coding);
-               break;
-       case 5:
-               gf_5vect_mad_sse(len, k, vec_i, g_tbls, data, coding);
-               break;
-       case 4:
-               gf_4vect_mad_sse(len, k, vec_i, g_tbls, data, coding);
-               break;
-       case 3:
-               gf_3vect_mad_sse(len, k, vec_i, g_tbls, data, coding);
-               break;
-       case 2:
-               gf_2vect_mad_sse(len, k, vec_i, g_tbls, data, coding);
-               break;
-       case 1:
-               gf_vect_mad_sse(len, k, vec_i, g_tbls, data, *coding);
-               break;
-       case 0:
-               break;
-       }
-
-}
-
-void ec_encode_data_update_avx(int len, int k, int rows, int vec_i, unsigned char *g_tbls,
-                              unsigned char *data, unsigned char **coding)
-{
-       if (len < 16) {
-               ec_encode_data_update_base(len, k, rows, vec_i, g_tbls, data, coding);
-               return;
-       }
-       while (rows > 6) {
-               gf_6vect_mad_avx(len, k, vec_i, g_tbls, data, coding);
-               g_tbls += 6 * k * 32;
-               coding += 6;
-               rows -= 6;
-       }
-       switch (rows) {
-       case 6:
-               gf_6vect_mad_avx(len, k, vec_i, g_tbls, data, coding);
-               break;
-       case 5:
-               gf_5vect_mad_avx(len, k, vec_i, g_tbls, data, coding);
-               break;
-       case 4:
-               gf_4vect_mad_avx(len, k, vec_i, g_tbls, data, coding);
-               break;
-       case 3:
-               gf_3vect_mad_avx(len, k, vec_i, g_tbls, data, coding);
-               break;
-       case 2:
-               gf_2vect_mad_avx(len, k, vec_i, g_tbls, data, coding);
-               break;
-       case 1:
-               gf_vect_mad_avx(len, k, vec_i, g_tbls, data, *coding);
-               break;
-       case 0:
-               break;
-       }
-
-}
-
-void ec_encode_data_update_avx2(int len, int k, int rows, int vec_i, unsigned char *g_tbls,
-                               unsigned char *data, unsigned char **coding)
-{
-       if (len < 32) {
-               ec_encode_data_update_base(len, k, rows, vec_i, g_tbls, data, coding);
-               return;
-       }
-       while (rows > 6) {
-               gf_6vect_mad_avx2(len, k, vec_i, g_tbls, data, coding);
-               g_tbls += 6 * k * 32;
-               coding += 6;
-               rows -= 6;
-       }
-       switch (rows) {
-       case 6:
-               gf_6vect_mad_avx2(len, k, vec_i, g_tbls, data, coding);
-               break;
-       case 5:
-               gf_5vect_mad_avx2(len, k, vec_i, g_tbls, data, coding);
-               break;
-       case 4:
-               gf_4vect_mad_avx2(len, k, vec_i, g_tbls, data, coding);
-               break;
-       case 3:
-               gf_3vect_mad_avx2(len, k, vec_i, g_tbls, data, coding);
-               break;
-       case 2:
-               gf_2vect_mad_avx2(len, k, vec_i, g_tbls, data, coding);
-               break;
-       case 1:
-               gf_vect_mad_avx2(len, k, vec_i, g_tbls, data, *coding);
-               break;
-       case 0:
-               break;
-       }
-
-}
-
-#endif //__WORDSIZE == 64 || _WIN64 || __x86_64__
-
-struct slver {
-       UINT16 snum;
-       UINT8 ver;
-       UINT8 core;
-};
-
-// Version info
-struct slver ec_init_tables_slver_00010068;
-struct slver ec_init_tables_slver = { 0x0068, 0x01, 0x00 };
-
-struct slver ec_encode_data_sse_slver_00020069;
-struct slver ec_encode_data_sse_slver = { 0x0069, 0x02, 0x00 };

diff --git a/src/erasure-code/isa/isa-l/erasure_code/ec_multibinary.asm.s b/src/erasure-code/isa/isa-l/erasure_code/ec_multibinary.asm.s
deleted file mode 100644 (file)
index 03f501a..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/ec_multibinary.asm.s
+++ /dev/null
@@ -1,395 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-%ifidn __OUTPUT_FORMAT__, elf64
- %define WRT_OPT               wrt ..plt
-%else
- %define WRT_OPT
-%endif
-
-%include "reg_sizes.asm"
-
-%ifidn __OUTPUT_FORMAT__, elf32
-
-[bits 32]
-
- %define def_wrd               dd
- %define wrd_sz        dword
- %define arg1          esi
- %define arg2          eax
- %define arg3          ebx
- %define arg4          ecx
- %define arg5          edx
-
-%else
-
- default rel
- [bits 64]
-
- %define def_wrd       dq
- %define wrd_sz        qword
- %define arg1          rsi
- %define arg2          rax
- %define arg3          rbx
- %define arg4          rcx
- %define arg5          rdx
-
-
- extern ec_encode_data_update_sse
- extern ec_encode_data_update_avx
- extern ec_encode_data_update_avx2
- extern gf_vect_mul_sse
- extern gf_vect_mul_avx
-
- extern gf_vect_mad_sse
- extern gf_vect_mad_avx
- extern gf_vect_mad_avx2
-%endif
-
-extern gf_vect_mul_base
-extern ec_encode_data_base
-extern ec_encode_data_update_base
-extern gf_vect_dot_prod_base
-extern gf_vect_mad_base
-
-extern gf_vect_dot_prod_sse
-extern gf_vect_dot_prod_avx
-extern gf_vect_dot_prod_avx2
-extern ec_encode_data_sse
-extern ec_encode_data_avx
-extern ec_encode_data_avx2
-
-
-section .data
-;;; *_mbinit are initial values for *_dispatched; is updated on first call.
-;;; Therefore, *_dispatch_init is only executed on first call.
-
-ec_encode_data_dispatched:
-       def_wrd      ec_encode_data_mbinit
-
-gf_vect_mul_dispatched:
-       def_wrd      gf_vect_mul_mbinit
-
-gf_vect_dot_prod_dispatched:
-       def_wrd      gf_vect_dot_prod_mbinit
-
-ec_encode_data_update_dispatched:
-       def_wrd      ec_encode_data_update_mbinit
-
-gf_vect_mad_dispatched:
-       def_wrd      gf_vect_mad_mbinit
-
-section .text
-;;;;
-; ec_encode_data multibinary function
-;;;;
-global ec_encode_data:function
-ec_encode_data_mbinit:
-       call    ec_encode_data_dispatch_init
-
-ec_encode_data:
-       jmp     wrd_sz [ec_encode_data_dispatched]
-
-ec_encode_data_dispatch_init:
-       push    arg1
-       push    arg2
-       push    arg3
-       push    arg4
-       push    arg5
-       lea     arg1, [ec_encode_data_base WRT_OPT] ; Default
-
-       mov     eax, 1
-       cpuid
-       lea     arg3, [ec_encode_data_sse WRT_OPT]
-       test    ecx, FLAG_CPUID1_ECX_SSE4_1
-       cmovne  arg1, arg3
-
-       and     ecx, (FLAG_CPUID1_ECX_AVX | FLAG_CPUID1_ECX_OSXSAVE)
-       cmp     ecx, (FLAG_CPUID1_ECX_AVX | FLAG_CPUID1_ECX_OSXSAVE)
-       lea     arg3, [ec_encode_data_avx WRT_OPT]
-
-       jne     _done_ec_encode_data_init
-       mov     arg1, arg3
-
-       ;; Try for AVX2
-       xor     ecx, ecx
-       mov     eax, 7
-       cpuid
-       test    ebx, FLAG_CPUID1_EBX_AVX2
-       lea     arg3, [ec_encode_data_avx2 WRT_OPT]
-       cmovne  arg1, arg3
-       ;; Does it have xmm and ymm support
-       xor     ecx, ecx
-       xgetbv
-       and     eax, FLAG_XGETBV_EAX_XMM_YMM
-       cmp     eax, FLAG_XGETBV_EAX_XMM_YMM
-       je      _done_ec_encode_data_init
-       lea     arg1, [ec_encode_data_sse WRT_OPT]
-
-_done_ec_encode_data_init:
-       pop     arg5
-       pop     arg4
-       pop     arg3
-       pop     arg2
-       mov     [ec_encode_data_dispatched], arg1
-       pop     arg1
-       ret
-
-;;;;
-; gf_vect_mul multibinary function
-;;;;
-global gf_vect_mul:function
-gf_vect_mul_mbinit:
-       call    gf_vect_mul_dispatch_init
-
-gf_vect_mul:
-       jmp     wrd_sz [gf_vect_mul_dispatched]
-
-gf_vect_mul_dispatch_init:
-       push    arg1
-%ifidn __OUTPUT_FORMAT__, elf32                ;; 32-bit check
-       lea     arg1, [gf_vect_mul_base]
-%else
-       push    rax
-       push    rbx
-       push    rcx
-       push    rdx
-       lea     arg1, [gf_vect_mul_base WRT_OPT] ; Default
-
-       mov     eax, 1
-       cpuid
-       test    ecx, FLAG_CPUID1_ECX_SSE4_2
-       lea     rbx, [gf_vect_mul_sse WRT_OPT]
-       je      _done_gf_vect_mul_dispatch_init
-       mov     arg1, rbx
-
-       ;; Try for AVX
-       and     ecx, (FLAG_CPUID1_ECX_OSXSAVE | FLAG_CPUID1_ECX_AVX)
-       cmp     ecx, (FLAG_CPUID1_ECX_OSXSAVE | FLAG_CPUID1_ECX_AVX)
-       jne     _done_gf_vect_mul_dispatch_init
-
-       ;; Does it have xmm and ymm support
-       xor     ecx, ecx
-       xgetbv
-       and     eax, FLAG_XGETBV_EAX_XMM_YMM
-       cmp     eax, FLAG_XGETBV_EAX_XMM_YMM
-       jne     _done_gf_vect_mul_dispatch_init
-       lea     arg1, [gf_vect_mul_avx WRT_OPT]
-
-_done_gf_vect_mul_dispatch_init:
-       pop     rdx
-       pop     rcx
-       pop     rbx
-       pop     rax
-%endif                 ;; END 32-bit check
-       mov     [gf_vect_mul_dispatched], arg1
-       pop     arg1
-       ret
-
-;;;;
-; ec_encode_data_update multibinary function
-;;;;
-global ec_encode_data_update:function
-ec_encode_data_update_mbinit:
-       call    ec_encode_data_update_dispatch_init
-
-ec_encode_data_update:
-       jmp     wrd_sz [ec_encode_data_update_dispatched]
-
-ec_encode_data_update_dispatch_init:
-       push    arg1
-%ifidn __OUTPUT_FORMAT__, elf32                ;; 32-bit check
-       lea     arg1, [ec_encode_data_update_base]
-%else
-       push    rax
-       push    rbx
-       push    rcx
-       push    rdx
-       lea     arg1, [ec_encode_data_update_base WRT_OPT] ; Default
-
-       mov     eax, 1
-       cpuid
-       lea     rbx, [ec_encode_data_update_sse WRT_OPT]
-       test    ecx, FLAG_CPUID1_ECX_SSE4_1
-       cmovne  arg1, rbx
-
-       and     ecx, (FLAG_CPUID1_ECX_AVX | FLAG_CPUID1_ECX_OSXSAVE)
-       cmp     ecx, (FLAG_CPUID1_ECX_AVX | FLAG_CPUID1_ECX_OSXSAVE)
-       lea     rbx, [ec_encode_data_update_avx WRT_OPT]
-
-       jne     _done_ec_encode_data_update_init
-       mov     rsi, rbx
-
-       ;; Try for AVX2
-       xor     ecx, ecx
-       mov     eax, 7
-       cpuid
-       test    ebx, FLAG_CPUID1_EBX_AVX2
-       lea     rbx, [ec_encode_data_update_avx2 WRT_OPT]
-       cmovne  rsi, rbx
-
-       ;; Does it have xmm and ymm support
-       xor     ecx, ecx
-       xgetbv
-       and     eax, FLAG_XGETBV_EAX_XMM_YMM
-       cmp     eax, FLAG_XGETBV_EAX_XMM_YMM
-       je      _done_ec_encode_data_update_init
-       lea     rsi, [ec_encode_data_update_sse WRT_OPT]
-
-_done_ec_encode_data_update_init:
-       pop     rdx
-       pop     rcx
-       pop     rbx
-       pop     rax
-%endif                 ;; END 32-bit check
-       mov     [ec_encode_data_update_dispatched], arg1
-       pop     arg1
-       ret
-
-;;;;
-; gf_vect_dot_prod multibinary function
-;;;;
-global gf_vect_dot_prod:function
-gf_vect_dot_prod_mbinit:
-       call    gf_vect_dot_prod_dispatch_init
-
-gf_vect_dot_prod:
-       jmp     wrd_sz [gf_vect_dot_prod_dispatched]
-
-gf_vect_dot_prod_dispatch_init:
-       push    arg1
-       push    arg2
-       push    arg3
-       push    arg4
-       push    arg5
-       lea     arg1, [gf_vect_dot_prod_base WRT_OPT] ; Default
-
-       mov     eax, 1
-       cpuid
-       lea     arg3, [gf_vect_dot_prod_sse WRT_OPT]
-       test    ecx, FLAG_CPUID1_ECX_SSE4_1
-       cmovne  arg1, arg3
-
-       and             ecx, (FLAG_CPUID1_ECX_AVX | FLAG_CPUID1_ECX_OSXSAVE)
-       cmp             ecx, (FLAG_CPUID1_ECX_AVX | FLAG_CPUID1_ECX_OSXSAVE)
-       lea     arg3, [gf_vect_dot_prod_avx WRT_OPT]
-
-       jne     _done_gf_vect_dot_prod_init
-       mov             arg1, arg3
-
-       ;; Try for AVX2
-       xor             ecx, ecx
-       mov             eax, 7
-       cpuid
-       test    ebx, FLAG_CPUID1_EBX_AVX2
-       lea     arg3, [gf_vect_dot_prod_avx2 WRT_OPT]
-       cmovne  arg1, arg3
-       ;; Does it have xmm and ymm support
-       xor     ecx, ecx
-       xgetbv
-       and     eax, FLAG_XGETBV_EAX_XMM_YMM
-       cmp     eax, FLAG_XGETBV_EAX_XMM_YMM
-       je      _done_gf_vect_dot_prod_init
-       lea     arg1, [gf_vect_dot_prod_sse WRT_OPT]
-
-_done_gf_vect_dot_prod_init:
-       pop     arg5
-       pop     arg4
-       pop     arg3
-       pop     arg2
-       mov     [gf_vect_dot_prod_dispatched], arg1
-       pop     arg1
-       ret
-
-;;;;
-; gf_vect_mad multibinary function
-;;;;
-global gf_vect_mad:function
-gf_vect_mad_mbinit:
-       call    gf_vect_mad_dispatch_init
-
-gf_vect_mad:
-       jmp     wrd_sz [gf_vect_mad_dispatched]
-
-gf_vect_mad_dispatch_init:
-       push    arg1
-%ifidn __OUTPUT_FORMAT__, elf32         ;; 32-bit check
-       lea     arg1, [gf_vect_mad_base]
-%else
-       push    rax
-       push    rbx
-       push    rcx
-       push    rdx
-       lea     arg1, [gf_vect_mad_base WRT_OPT] ; Default
-
-       mov     eax, 1
-       cpuid
-       lea     rbx, [gf_vect_mad_sse WRT_OPT]
-       test    ecx, FLAG_CPUID1_ECX_SSE4_1
-       cmovne  arg1, rbx
-
-       and     ecx, (FLAG_CPUID1_ECX_AVX | FLAG_CPUID1_ECX_OSXSAVE)
-       cmp     ecx, (FLAG_CPUID1_ECX_AVX | FLAG_CPUID1_ECX_OSXSAVE)
-       lea     rbx, [gf_vect_mad_avx WRT_OPT]
-
-       jne     _done_gf_vect_mad_init
-       mov     rsi, rbx
-
-       ;; Try for AVX2
-       xor     ecx, ecx
-       mov     eax, 7
-       cpuid
-       test    ebx, FLAG_CPUID1_EBX_AVX2
-       lea     rbx, [gf_vect_mad_avx2 WRT_OPT]
-       cmovne  rsi, rbx
-
-       ;; Does it have xmm and ymm support
-       xor     ecx, ecx
-       xgetbv
-       and     eax, FLAG_XGETBV_EAX_XMM_YMM
-       cmp     eax, FLAG_XGETBV_EAX_XMM_YMM
-       je      _done_gf_vect_mad_init
-       lea     rsi, [gf_vect_mad_sse WRT_OPT]
-
-_done_gf_vect_mad_init:
-       pop     rdx
-       pop     rcx
-       pop     rbx
-       pop     rax
-%endif                 ;; END 32-bit check
-       mov     [gf_vect_mad_dispatched], arg1
-       pop     arg1
-       ret
-
-;;;       func                                 core, ver, snum
-slversion ec_encode_data,              00,   04,  0133
-slversion gf_vect_mul,                 00,   03,  0134
-slversion ec_encode_data_update,       00,   03,  0212
-slversion gf_vect_dot_prod,            00,   03,  0138
-slversion gf_vect_mad,                 00,   02,  0213

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_dot_prod_avx.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_dot_prod_avx.asm.s
deleted file mode 100644 (file)
index db1e1c5..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_dot_prod_avx.asm.s
+++ /dev/null
@@ -1,337 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_2vect_dot_prod_avx(len, vec, *g_tbls, **buffs, **dests);
-;;;
-
-%include "reg_sizes.asm"
-
-%ifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
-
- %define tmp   r11
- %define tmp2  r10
- %define tmp3  r9
- %define tmp4  r12             ; must be saved and restored
- %define return rax
- %macro  SLDR 2
- %endmacro
- %define SSTR SLDR
- %define PS 8
- %define LOG_PS 3
-
- %define func(x) x:
- %macro FUNC_SAVE 0
-       push    r12
- %endmacro
- %macro FUNC_RESTORE 0
-       pop     r12
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0   rcx
- %define arg1   rdx
- %define arg2   r8
- %define arg3   r9
-
- %define arg4   r12            ; must be saved, loaded and restored
- %define tmp    r11
- %define tmp2   r10
- %define tmp3   r13            ; must be saved and restored
- %define tmp4   r14            ; must be saved and restored
- %define return rax
- %macro  SLDR 2
- %endmacro
- %define SSTR SLDR
- %define PS     8
- %define LOG_PS 3
- %define stack_size  3*16 + 3*8        ; must be an odd multiple of 8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
-
- %define func(x) proc_frame x
- %macro FUNC_SAVE 0
-       alloc_stack     stack_size
-       save_xmm128     xmm6, 0*16
-       save_xmm128     xmm7, 1*16
-       save_xmm128     xmm8, 2*16
-       save_reg        r12,  3*16 + 0*8
-       save_reg        r13,  3*16 + 1*8
-       save_reg        r14,  3*16 + 2*8
-       end_prolog
-       mov     arg4, arg(4)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       vmovdqa xmm6, [rsp + 0*16]
-       vmovdqa xmm7, [rsp + 1*16]
-       vmovdqa xmm8, [rsp + 2*16]
-       mov     r12,  [rsp + 3*16 + 0*8]
-       mov     r13,  [rsp + 3*16 + 1*8]
-       mov     r14,  [rsp + 3*16 + 2*8]
-       add     rsp, stack_size
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, elf32
-
-;;;================== High Address;
-;;;    arg4
-;;;    arg3
-;;;    arg2
-;;;    arg1
-;;;    arg0
-;;;    return
-;;;<================= esp of caller
-;;;    ebp
-;;;<================= ebp = esp
-;;;    var0
-;;;    esi
-;;;    edi
-;;;    ebx
-;;;<================= esp of callee
-;;;
-;;;================== Low Address;
-
- %define PS 4
- %define LOG_PS 2
- %define func(x) x:
- %define arg(x) [ebp + PS*2 + PS*x]
- %define var(x) [ebp - PS - PS*x]
-
- %define trans   ecx
- %define trans2  esi
- %define arg0    trans         ;trans and trans2 are for the variables in stack
- %define arg0_m  arg(0)
- %define arg1    ebx
- %define arg2    arg2_m
- %define arg2_m  arg(2)
- %define arg3    trans
- %define arg3_m  arg(3)
- %define arg4    trans
- %define arg4_m  arg(4)
- %define tmp    edx
- %define tmp2    edi
- %define tmp3    trans2
- %define tmp4    trans2
- %define tmp4_m  var(0)
- %define return  eax
- %macro SLDR 2 ;; stack load/restore
-       mov %1, %2
- %endmacro
- %define SSTR SLDR
-
- %macro FUNC_SAVE 0
-       push    ebp
-       mov     ebp, esp
-       sub     esp, PS*1       ;1 local variable
-       push    esi
-       push    edi
-       push    ebx
-       mov     arg1, arg(1)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       pop     ebx
-       pop     edi
-       pop     esi
-       add     esp, PS*1       ;1 local variable
-       pop     ebp
- %endmacro
-
-%endif ; output formats
-
-%define len   arg0
-%define vec   arg1
-%define mul_array arg2
-%define        src   arg3
-%define dest1  arg4
-
-%define vec_i tmp2
-%define ptr   tmp3
-%define dest2 tmp4
-%define pos   return
-
- %ifidn PS,4                           ;32-bit code
-       %define  len_m  arg0_m
-       %define  src_m  arg3_m
-       %define  dest1_m arg4_m
-       %define  dest2_m tmp4_m
- %endif
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR vmovdqu
- %define XSTR vmovdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR vmovdqa
-  %define XSTR vmovdqa
- %else
-  %define XLDR vmovntdqa
-  %define XSTR vmovntdq
- %endif
-%endif
-
-%ifidn PS,8                    ; 64-bit code
- default rel
-  [bits 64]
-%endif
-
-section .text
-
-%ifidn PS,8                    ;64-bit code
- %define xmask0f   xmm8
- %define xgft1_lo  xmm7
- %define xgft1_hi  xmm6
- %define xgft2_lo  xmm5
- %define xgft2_hi  xmm4
-
- %define x0     xmm0
- %define xtmpa  xmm1
- %define xp1    xmm2
- %define xp2    xmm3
-%else                          ;32-bit code
- %define xmask0f   xmm4
- %define xgft1_lo  xmm7
- %define xgft1_hi  xmm6
- %define xgft2_lo  xgft1_lo
- %define xgft2_hi  xgft1_hi
-
- %define x0     xmm0
- %define xtmpa  xmm1
- %define xp1    xmm2
- %define xp2    xmm3
-%endif
-
-align 16
-global gf_2vect_dot_prod_avx:function
-
-func(gf_2vect_dot_prod_avx)
-       FUNC_SAVE
-       SLDR    len, len_m
-       sub     len, 16
-       SSTR    len_m, len
-       jl      .return_fail
-       xor     pos, pos
-       vmovdqa xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
-       SLDR    dest1, dest1_m
-       mov     dest2, [dest1+PS]
-       SSTR    dest2_m, dest2
-       mov     dest1, [dest1]
-       SSTR    dest1_m, dest1
-
-.loop16
-       vpxor   xp1, xp1
-       vpxor   xp2, xp2
-       mov     tmp, mul_array
-       xor     vec_i, vec_i
-
-.next_vect
-       SLDR    src, src_m
-       mov     ptr, [src+vec_i]
-
-       vmovdqu xgft1_lo, [tmp]         ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
-       vmovdqu xgft1_hi, [tmp+16]      ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
- %ifidn PS,8                           ; 64-bit code
-       vmovdqu xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-       vmovdqu xgft2_hi, [tmp+vec*(32/PS)+16]  ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
-       add     tmp, 32
-       add     vec_i, PS
- %endif
-       XLDR    x0, [ptr+pos]           ;Get next source vector
-
-       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-
-       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
-       vpxor   xp1, xgft1_hi           ;xp1 += partial
-
- %ifidn PS,4                           ; 32-bit code
-       vmovdqu xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-       vmovdqu xgft2_hi, [tmp+vec*(32/PS)+16]  ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
-       add     tmp, 32
-       add     vec_i, PS
- %endif
-       vpshufb xgft2_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft2_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft2_hi, xgft2_lo      ;GF add high and low partials
-       vpxor   xp2, xgft2_hi           ;xp2 += partial
-
-       cmp     vec_i, vec
-       jl      .next_vect
-
-       SLDR    dest1, dest1_m
-       SLDR    dest2, dest2_m
-       XSTR    [dest1+pos], xp1
-       XSTR    [dest2+pos], xp2
-
-       SLDR    len, len_m
-       add     pos, 16                 ;Loop on 16 bytes at a time
-       cmp     pos, len
-       jle     .loop16
-
-       lea     tmp, [len + 16]
-       cmp     pos, tmp
-       je      .return_pass
-
-       ;; Tail len
-       mov     pos, len        ;Overlapped offset length-16
-       jmp     .loop16         ;Do one more overlap pass
-
-.return_pass:
-       mov     return, 0
-       FUNC_RESTORE
-       ret
-
-.return_fail:
-       mov     return, 1
-       FUNC_RESTORE
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-mask0f: ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-
-;;;       func                  core, ver, snum
-slversion gf_2vect_dot_prod_avx, 02,  05,  0191

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_dot_prod_avx2.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_dot_prod_avx2.asm.s
deleted file mode 100644 (file)
index 0387893..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_dot_prod_avx2.asm.s
+++ /dev/null
@@ -1,356 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_2vect_dot_prod_avx2(len, vec, *g_tbls, **buffs, **dests);
-;;;
-
-%include "reg_sizes.asm"
-
-%ifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
-
- %define tmp   r11
- %define tmp.w r11d
- %define tmp.b r11b
- %define tmp2  r10
- %define tmp3  r9
- %define tmp4  r12             ; must be saved and restored
- %define return rax
- %macro  SLDR   2
- %endmacro
- %define SSTR   SLDR
- %define PS     8
- %define LOG_PS 3
-
- %define func(x) x:
- %macro FUNC_SAVE 0
-       push    r12
- %endmacro
- %macro FUNC_RESTORE 0
-       pop     r12
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0   rcx
- %define arg1   rdx
- %define arg2   r8
- %define arg3   r9
-
- %define arg4   r12            ; must be saved, loaded and restored
- %define tmp    r11
- %define tmp.w  r11d
- %define tmp.b  r11b
- %define tmp2   r10
- %define tmp3   r13            ; must be saved and restored
- %define tmp4   r14            ; must be saved and restored
- %define return rax
- %macro  SLDR   2
- %endmacro
- %define SSTR   SLDR
- %define PS     8
- %define LOG_PS 3
- %define stack_size  3*16 + 3*8        ; must be an odd multiple of 8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
-
- %define func(x) proc_frame x
- %macro FUNC_SAVE 0
-       alloc_stack     stack_size
-       vmovdqa [rsp + 0*16], xmm6
-       vmovdqa [rsp + 1*16], xmm7
-       vmovdqa [rsp + 2*16], xmm8
-       save_reg        r12,  3*16 + 0*8
-       save_reg        r13,  3*16 + 1*8
-       save_reg        r14,  3*16 + 2*8
-       end_prolog
-       mov     arg4, arg(4)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       vmovdqa xmm6, [rsp + 0*16]
-       vmovdqa xmm7, [rsp + 1*16]
-       vmovdqa xmm8, [rsp + 2*16]
-       mov     r12,  [rsp + 3*16 + 0*8]
-       mov     r13,  [rsp + 3*16 + 1*8]
-       mov     r14,  [rsp + 3*16 + 2*8]
-       add     rsp, stack_size
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, elf32
-
-;;;================== High Address;
-;;;    arg4
-;;;    arg3
-;;;    arg2
-;;;    arg1
-;;;    arg0
-;;;    return
-;;;<================= esp of caller
-;;;    ebp
-;;;<================= ebp = esp
-;;;    var0
-;;;    esi
-;;;    edi
-;;;    ebx
-;;;<================= esp of callee
-;;;
-;;;================== Low Address;
-
- %define PS 4
- %define LOG_PS 2
- %define func(x) x:
- %define arg(x) [ebp + PS*2 + PS*x]
- %define var(x) [ebp - PS - PS*x]
-
- %define trans   ecx
- %define trans2  esi
- %define arg0    trans                 ;trans and trans2 are for the variables in stack
- %define arg0_m  arg(0)
- %define arg1    ebx
- %define arg2    arg2_m
- %define arg2_m  arg(2)
- %define arg3    trans
- %define arg3_m  arg(3)
- %define arg4    trans
- %define arg4_m  arg(4)
- %define tmp    edx
- %define tmp.w   edx
- %define tmp.b   dl
- %define tmp2    edi
- %define tmp3    trans2
- %define tmp4    trans2
- %define tmp4_m  var(0)
- %define return  eax
- %macro SLDR    2                      ;stack load/restore
-       mov %1, %2
- %endmacro
- %define SSTR SLDR
-
- %macro FUNC_SAVE 0
-       push    ebp
-       mov     ebp, esp
-       sub     esp, PS*1               ;1 local variable
-       push    esi
-       push    edi
-       push    ebx
-       mov     arg1, arg(1)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       pop     ebx
-       pop     edi
-       pop     esi
-       add     esp, PS*1               ;1 local variable
-       pop     ebp
- %endmacro
-
-%endif ; output formats
-
-%define len   arg0
-%define vec   arg1
-%define mul_array arg2
-%define        src   arg3
-%define dest1 arg4
-
-%define vec_i tmp2
-%define ptr   tmp3
-%define dest2 tmp4
-%define pos   return
-
-%ifidn PS,4                            ;32-bit code
- %define  len_m   arg0_m
- %define  src_m   arg3_m
- %define  dest1_m arg4_m
- %define  dest2_m tmp4_m
-%endif
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR vmovdqu
- %define XSTR vmovdqu
-%else
-
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR vmovdqa
-  %define XSTR vmovdqa
- %else
-  %define XLDR vmovntdqa
-  %define XSTR vmovntdq
- %endif
-%endif
-
-%ifidn PS,8                            ;64-bit code
- default rel
- [bits 64]
-%endif
-
-section .text
-
-%ifidn PS,8                            ;64-bit code
- %define xmask0f   ymm8
- %define xmask0fx  xmm8
- %define xgft1_lo  ymm7
- %define xgft1_hi  ymm6
- %define xgft2_lo  ymm5
- %define xgft2_hi  ymm4
-
- %define x0     ymm0
- %define xtmpa  ymm1
- %define xp1    ymm2
- %define xp2    ymm3
-%else                                  ;32-bit code
- %define xmask0f   ymm7
- %define xmask0fx  xmm7
- %define xgft1_lo  ymm5
- %define xgft1_hi  ymm4
- %define xgft2_lo  xgft1_lo
- %define xgft2_hi  xgft1_hi
-
- %define x0     ymm0
- %define xtmpa  ymm1
- %define xp1    ymm2
- %define xp2    ymm3
-
-%endif
-
-align 16
-global gf_2vect_dot_prod_avx2:function
-
-func(gf_2vect_dot_prod_avx2)
-       FUNC_SAVE
-       SLDR    len, len_m
-       sub     len, 32
-       SSTR    len_m, len
-       jl      .return_fail
-       xor     pos, pos
-       mov     tmp.b, 0x0f
-       vpinsrb xmask0fx, xmask0fx, tmp.w, 0
-       vpbroadcastb xmask0f, xmask0fx  ;Construct mask 0x0f0f0f...
-
-       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
-       SLDR    dest1, dest1_m
-       mov     dest2, [dest1+PS]
-       SSTR    dest2_m, dest2
-       mov     dest1, [dest1]
-       SSTR    dest1_m, dest1
-
-.loop32
-       vpxor   xp1, xp1
-       vpxor   xp2, xp2
-       mov     tmp, mul_array
-       xor     vec_i, vec_i
-
-.next_vect
-       SLDR    src, src_m
-       mov     ptr, [src+vec_i]
-
-       vmovdqu xgft1_lo, [tmp]         ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
-                                       ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
-       vperm2i128 xgft1_hi, xgft1_lo, xgft1_lo, 0x11 ; swapped to hi | hi
-       vperm2i128 xgft1_lo, xgft1_lo, xgft1_lo, 0x00 ; swapped to lo | lo
- %ifidn PS,8                           ; 64-bit code
-       vmovdqu xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-                                               ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
-       vperm2i128 xgft2_hi, xgft2_lo, xgft2_lo, 0x11 ; swapped to hi | hi
-       vperm2i128 xgft2_lo, xgft2_lo, xgft2_lo, 0x00 ; swapped to lo | lo
-
-       XLDR    x0, [ptr+pos]           ;Get next source vector
-       add     tmp, 32
-       add     vec_i, PS
- %else
-       XLDR    x0, [ptr+pos]           ;Get next source vector
- %endif
-
-       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-
-       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
-       vpxor   xp1, xgft1_hi           ;xp1 += partial
-
- %ifidn PS,4                           ; 32-bit code
-       vmovdqu xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-                                               ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
-       vperm2i128 xgft2_hi, xgft2_lo, xgft2_lo, 0x11 ; swapped to hi | hi
-       vperm2i128 xgft2_lo, xgft2_lo, xgft2_lo, 0x00 ; swapped to lo | lo
-       add     tmp, 32
-       add     vec_i, PS
- %endif
-       vpshufb xgft2_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft2_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft2_hi, xgft2_lo      ;GF add high and low partials
-       vpxor   xp2, xgft2_hi           ;xp2 += partial
-
-       cmp     vec_i, vec
-       jl      .next_vect
-
-       SLDR    dest1, dest1_m
-       SLDR    dest2, dest2_m
-       XSTR    [dest1+pos], xp1
-       XSTR    [dest2+pos], xp2
-
-       SLDR    len, len_m
-       add     pos, 32                 ;Loop on 32 bytes at a time
-       cmp     pos, len
-       jle     .loop32
-
-       lea     tmp, [len + 32]
-       cmp     pos, tmp
-       je      .return_pass
-
-       ;; Tail len
-       mov     pos, len        ;Overlapped offset length-16
-       jmp     .loop32         ;Do one more overlap pass
-
-.return_pass:
-       mov     return, 0
-       FUNC_RESTORE
-       ret
-
-.return_fail:
-       mov     return, 1
-       FUNC_RESTORE
-       ret
-
-endproc_frame
-
-section .data
-
-;;;       func                   core, ver, snum
-slversion gf_2vect_dot_prod_avx2, 04,  05,  0196

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_dot_prod_sse.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_dot_prod_sse.asm.s
deleted file mode 100644 (file)
index 95dd92a..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_dot_prod_sse.asm.s
+++ /dev/null
@@ -1,339 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_2vect_dot_prod_sse(len, vec, *g_tbls, **buffs, **dests);
-;;;
-
-%include "reg_sizes.asm"
-
-%ifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
-
- %define tmp   r11
- %define tmp2  r10
- %define tmp3  r9
- %define tmp4  r12             ; must be saved and restored
- %define return rax
- %macro  SLDR 2
- %endmacro
- %define SSTR SLDR
- %define PS 8
- %define LOG_PS 3
-
- %define func(x) x:
- %macro FUNC_SAVE 0
-       push    r12
- %endmacro
- %macro FUNC_RESTORE 0
-       pop     r12
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0   rcx
- %define arg1   rdx
- %define arg2   r8
- %define arg3   r9
-
- %define arg4   r12            ; must be saved, loaded and restored
- %define tmp    r11
- %define tmp2   r10
- %define tmp3   r13            ; must be saved and restored
- %define tmp4   r14            ; must be saved and restored
- %define return rax
- %macro  SLDR 2
- %endmacro
- %define SSTR SLDR
- %define PS     8
- %define LOG_PS 3
- %define stack_size  3*16 + 3*8        ; must be an odd multiple of 8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
-
- %define func(x) proc_frame x
- %macro FUNC_SAVE 0
-       alloc_stack     stack_size
-       save_xmm128     xmm6, 0*16
-       save_xmm128     xmm7, 1*16
-       save_xmm128     xmm8, 2*16
-       save_reg        r12,  3*16 + 0*8
-       save_reg        r13,  3*16 + 1*8
-       save_reg        r14,  3*16 + 2*8
-       end_prolog
-       mov     arg4, arg(4)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       movdqa  xmm6, [rsp + 0*16]
-       movdqa  xmm7, [rsp + 1*16]
-       movdqa  xmm8, [rsp + 2*16]
-       mov     r12,  [rsp + 3*16 + 0*8]
-       mov     r13,  [rsp + 3*16 + 1*8]
-       mov     r14,  [rsp + 3*16 + 2*8]
-       add     rsp, stack_size
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, elf32
-
-;;;================== High Address;
-;;;    arg4
-;;;    arg3
-;;;    arg2
-;;;    arg1
-;;;    arg0
-;;;    return
-;;;<================= esp of caller
-;;;    ebp
-;;;<================= ebp = esp
-;;;    var0
-;;;    esi
-;;;    edi
-;;;    ebx
-;;;<================= esp of callee
-;;;
-;;;================== Low Address;
-
- %define PS 4
- %define LOG_PS 2
- %define func(x) x:
- %define arg(x) [ebp + PS*2 + PS*x]
- %define var(x) [ebp - PS - PS*x]
-
- %define trans   ecx
- %define trans2  esi
- %define arg0    trans                 ;trans and trans2 are for the variables in stack
- %define arg0_m  arg(0)
- %define arg1    ebx
- %define arg2    arg2_m
- %define arg2_m  arg(2)
- %define arg3    trans
- %define arg3_m  arg(3)
- %define arg4    trans
- %define arg4_m  arg(4)
- %define tmp    edx
- %define tmp2    edi
- %define tmp3    trans2
- %define tmp4    trans2
- %define tmp4_m  var(0)
- %define return  eax
- %macro SLDR 2 ;; stack load/restore
-       mov %1, %2
- %endmacro
- %define SSTR SLDR
-
- %macro FUNC_SAVE 0
-       push    ebp
-       mov     ebp, esp
-       sub     esp, PS*1               ;1 local variable
-       push    esi
-       push    edi
-       push    ebx
-       mov     arg1, arg(1)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       pop     ebx
-       pop     edi
-       pop     esi
-       add     esp, PS*1               ;1 local variable
-       pop     ebp
- %endmacro
-
-%endif ; output formats
-
-%define len   arg0
-%define vec   arg1
-%define mul_array arg2
-%define        src   arg3
-%define dest1  arg4
-
-%define vec_i tmp2
-%define ptr   tmp3
-%define dest2 tmp4
-%define pos   return
-
- %ifidn PS,4                           ;32-bit code
-       %define  len_m   arg0_m
-       %define  src_m   arg3_m
-       %define  dest1_m arg4_m
-       %define  dest2_m tmp4_m
- %endif
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR movdqu
- %define XSTR movdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR movdqa
-  %define XSTR movdqa
- %else
-  %define XLDR movntdqa
-  %define XSTR movntdq
- %endif
-%endif
-
-%ifidn PS,8                            ;64-bit code
- default rel
-  [bits 64]
-%endif
-
-section .text
-
-%ifidn PS,8                            ;64-bit code
- %define xmask0f   xmm8
- %define xgft1_lo  xmm7
- %define xgft1_hi  xmm6
- %define xgft2_lo  xmm5
- %define xgft2_hi  xmm4
-
- %define x0     xmm0
- %define xtmpa  xmm1
- %define xp1    xmm2
- %define xp2    xmm3
-%else                                  ;32-bit code
- %define xmask0f   xmm4
- %define xgft1_lo  xmm7
- %define xgft1_hi  xmm6
- %define xgft2_lo  xgft1_lo
- %define xgft2_hi  xgft1_hi
-
- %define x0     xmm0
- %define xtmpa  xmm1
- %define xp1    xmm2
- %define xp2    xmm3
-%endif
-
-align 16
-global gf_2vect_dot_prod_sse:function
-
-func(gf_2vect_dot_prod_sse)
-       FUNC_SAVE
-       SLDR    len, len_m
-       sub     len, 16
-       SSTR    len_m, len
-       jl      .return_fail
-       xor     pos, pos
-       movdqa  xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
-       SLDR    dest1, dest1_m
-       mov     dest2, [dest1+PS]
-       SSTR    dest2_m, dest2
-       mov     dest1, [dest1]
-       SSTR    dest1_m, dest1
-
-.loop16
-       pxor    xp1, xp1
-       pxor    xp2, xp2
-       mov     tmp, mul_array
-       xor     vec_i, vec_i
-
-.next_vect
-       SLDR    src, src_m
-       mov     ptr, [src+vec_i]
-
-       movdqu  xgft1_lo, [tmp]         ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
-       movdqu  xgft1_hi, [tmp+16]      ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
- %ifidn PS,8                           ;64-bit code
-       movdqu  xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-       movdqu  xgft2_hi, [tmp+vec*(32/PS)+16]  ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
-       add     tmp, 32
-       add     vec_i, PS
- %endif
-       XLDR    x0, [ptr+pos]           ;Get next source vector
-
-       movdqa  xtmpa, x0               ;Keep unshifted copy of src
-       psraw   x0, 4                   ;Shift to put high nibble into bits 4-0
-       pand    x0, xmask0f             ;Mask high src nibble in bits 4-0
-       pand    xtmpa, xmask0f          ;Mask low src nibble in bits 4-0
-
-       pshufb  xgft1_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft1_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft1_hi, xgft1_lo      ;GF add high and low partials
-       pxor    xp1, xgft1_hi           ;xp1 += partial
-
- %ifidn PS,4                           ;32-bit code
-       movdqu  xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-       movdqu  xgft2_hi, [tmp+vec*(32/PS)+16]  ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
-
-       add     tmp, 32
-       add     vec_i, PS
- %endif
-       pshufb  xgft2_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft2_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft2_hi, xgft2_lo      ;GF add high and low partials
-       pxor    xp2, xgft2_hi           ;xp2 += partial
-
-       cmp     vec_i, vec
-       jl      .next_vect
-
-       SLDR    dest1, dest1_m
-       SLDR    dest2, dest2_m
-       XSTR    [dest1+pos], xp1
-       XSTR    [dest2+pos], xp2
-
-       SLDR    len, len_m
-       add     pos, 16                 ;Loop on 16 bytes at a time
-       cmp     pos, len
-       jle     .loop16
-
-       lea     tmp, [len + 16]
-       cmp     pos, tmp
-       je      .return_pass
-
-       ;; Tail len
-       mov     pos, len        ;Overlapped offset length-16
-       jmp     .loop16         ;Do one more overlap pass
-
-.return_pass:
-       mov     return, 0
-       FUNC_RESTORE
-       ret
-
-.return_fail:
-       mov     return, 1
-       FUNC_RESTORE
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-mask0f: ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-
-;;;       func                  core, ver, snum
-slversion gf_2vect_dot_prod_sse, 00,  04,  0062

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_mad_avx.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_mad_avx.asm.s
deleted file mode 100644 (file)
index e182381..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_mad_avx.asm.s
+++ /dev/null
@@ -1,236 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_2vect_mad_avx(len, vec, vec_i, mul_array, src, dest);
-;;;
-
-%include "reg_sizes.asm"
-
-%define PS 8
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0  rcx
- %define arg0.w ecx
- %define arg1  rdx
- %define arg2  r8
- %define arg3  r9
- %define arg4  r12
- %define arg5  r15
- %define tmp   r11
- %define tmp2   r10
- %define return rax
- %define return.w eax
- %define stack_size 16*9 + 3*8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
- %define func(x) proc_frame x
-
-%macro FUNC_SAVE 0
-       sub     rsp, stack_size
-       movdqa  [rsp+16*0],xmm6
-       movdqa  [rsp+16*1],xmm7
-       movdqa  [rsp+16*2],xmm8
-       movdqa  [rsp+16*3],xmm9
-       movdqa  [rsp+16*4],xmm10
-       movdqa  [rsp+16*5],xmm11
-       movdqa  [rsp+16*6],xmm12
-       movdqa  [rsp+16*7],xmm13
-       movdqa  [rsp+16*8],xmm14
-       save_reg        r12,  9*16 + 0*8
-       save_reg        r15,  9*16 + 1*8
-       end_prolog
-       mov     arg4, arg(4)
-       mov     arg5, arg(5)
-%endmacro
-
-%macro FUNC_RESTORE 0
-       movdqa  xmm6, [rsp+16*0]
-       movdqa  xmm7, [rsp+16*1]
-       movdqa  xmm8, [rsp+16*2]
-       movdqa  xmm9, [rsp+16*3]
-       movdqa  xmm10, [rsp+16*4]
-       movdqa  xmm11, [rsp+16*5]
-       movdqa  xmm12, [rsp+16*6]
-       movdqa  xmm13, [rsp+16*7]
-       movdqa  xmm14, [rsp+16*8]
-       mov     r12,  [rsp + 9*16 + 0*8]
-       mov     r15,  [rsp + 9*16 + 1*8]
-       add     rsp, stack_size
-%endmacro
-
-%elifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg0.w edi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
- %define tmp   r11
- %define tmp2   r10
- %define return rax
- %define return.w eax
-
- %define func(x) x:
- %define FUNC_SAVE
- %define FUNC_RESTORE
-%endif
-
-;;; gf_2vect_mad_avx(len, vec, vec_i, mul_array, src, dest)
-%define len   arg0
-%define len.w arg0.w
-%define vec    arg1
-%define vec_i    arg2
-%define mul_array arg3
-%define        src   arg4
-%define dest1 arg5
-%define pos   return
-%define pos.w return.w
-
-%define dest2 tmp2
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR vmovdqu
- %define XSTR vmovdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR vmovdqa
-  %define XSTR vmovdqa
- %else
-  %define XLDR vmovntdqa
-  %define XSTR vmovntdq
- %endif
-%endif
-
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f  xmm14
-%define xgft1_lo  xmm13
-%define xgft1_hi  xmm12
-%define xgft2_lo  xmm11
-%define xgft2_hi  xmm10
-
-%define x0      xmm0
-%define xtmpa   xmm1
-%define xtmph1  xmm2
-%define xtmpl1  xmm3
-%define xtmph2  xmm4
-%define xtmpl2  xmm5
-%define xd1     xmm6
-%define xd2     xmm7
-%define xtmpd1  xmm8
-%define xtmpd2  xmm9
-
-
-align 16
-global gf_2vect_mad_avx:function
-
-func(gf_2vect_mad_avx)
-       FUNC_SAVE
-       sub     len, 16
-       jl      .return_fail
-
-       xor     pos, pos
-       vmovdqa xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-       sal     vec_i, 5                ;Multiply by 32
-       sal     vec, 5
-       lea     tmp, [mul_array + vec_i]
-       vmovdqu xgft1_lo, [tmp]         ;Load array Ax{00}, Ax{01}, Ax{02}, ...
-       vmovdqu xgft1_hi, [tmp+16]      ; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
-       vmovdqu xgft2_lo, [tmp+vec]     ;Load array Bx{00}, Bx{01}, Bx{02}, ...
-       vmovdqu xgft2_hi, [tmp+vec+16]  ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
-
-       mov     dest2, [dest1+PS]
-       mov     dest1, [dest1]
-
-       XLDR    xtmpd1, [dest1+len]     ;backup the last 16 bytes in dest
-       XLDR    xtmpd2, [dest2+len]     ;backup the last 16 bytes in dest
-
-.loop16
-       XLDR    xd1, [dest1+pos]                ;Get next dest vector
-       XLDR    xd2, [dest2+pos]                ;Get next dest vector
-.loop16_overlap:
-       XLDR    x0, [src+pos]           ;Get next source vector
-
-       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-
-       vpshufb xtmph1, xgft1_hi, x0    ;Lookup mul table of high nibble
-       vpshufb xtmpl1, xgft1_lo, xtmpa ;Lookup mul table of low nibble
-       vpxor   xtmph1, xtmph1, xtmpl1 ;GF add high and low partials
-       vpxor   xd1, xd1, xtmph1        ;xd1 += partial
-
-       vpshufb xtmph2, xgft2_hi, x0    ;Lookup mul table of high nibble
-       vpshufb xtmpl2, xgft2_lo, xtmpa ;Lookup mul table of low nibble
-       vpxor   xtmph2, xtmph2, xtmpl2 ;GF add high and low partials
-       vpxor   xd2, xd2, xtmph2        ;xd2 += partial
-
-       XSTR    [dest1+pos], xd1
-       XSTR    [dest2+pos], xd2
-
-       add     pos, 16                 ;Loop on 16 bytes at a time
-       cmp     pos, len
-       jle     .loop16
-
-       lea     tmp, [len + 16]
-       cmp     pos, tmp
-       je      .return_pass
-
-       ;; Tail len
-       mov     pos, len        ;Overlapped offset length-16
-       vmovdqa xd1, xtmpd1     ;Restore xd1
-       vmovdqa xd2, xtmpd2     ;Restore xd2
-       jmp     .loop16_overlap ;Do one more overlap pass
-
-.return_pass:
-       mov     return, 0
-       FUNC_RESTORE
-       ret
-
-.return_fail:
-       mov     return, 1
-       FUNC_RESTORE
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-mask0f: ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-
-;;;       func             core, ver, snum
-slversion gf_2vect_mad_avx, 02,  01,  0204

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_mad_avx2.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_mad_avx2.asm.s
deleted file mode 100644 (file)
index 03902f4..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_mad_avx2.asm.s
+++ /dev/null
@@ -1,247 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_2vect_mad_avx2(len, vec, vec_i, mul_array, src, dest);
-;;;
-
-%include "reg_sizes.asm"
-
-%define PS 8
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0   rcx
- %define arg0.w ecx
- %define arg1  rdx
- %define arg2  r8
- %define arg3  r9
- %define arg4  r12
- %define arg5  r15
-
- %define tmp    r11
- %define tmp.w  r11d
- %define tmp.b  r11b
- %define tmp2   r10
- %define return rax
- %define return.w eax
- %define stack_size  16*9 + 3*8        ; must be an odd multiple of 8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
-
- %define func(x) proc_frame x
- %macro FUNC_SAVE 0
-       sub     rsp, stack_size
-       vmovdqa [rsp+16*0],xmm6
-       vmovdqa [rsp+16*1],xmm7
-       vmovdqa [rsp+16*2],xmm8
-       vmovdqa [rsp+16*3],xmm9
-       vmovdqa [rsp+16*4],xmm10
-       vmovdqa [rsp+16*5],xmm11
-       vmovdqa [rsp+16*6],xmm12
-       vmovdqa [rsp+16*7],xmm13
-       vmovdqa [rsp+16*8],xmm14
-       save_reg        r12,  9*16 + 0*8
-       save_reg        r15,  9*16 + 1*8
-       end_prolog
-       mov     arg4, arg(4)
-       mov     arg5, arg(5)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       vmovdqa xmm6, [rsp+16*0]
-       vmovdqa xmm7, [rsp+16*1]
-       vmovdqa xmm8, [rsp+16*2]
-       vmovdqa xmm9, [rsp+16*3]
-       vmovdqa xmm10, [rsp+16*4]
-       vmovdqa xmm11, [rsp+16*5]
-       vmovdqa xmm12, [rsp+16*6]
-       vmovdqa xmm13, [rsp+16*7]
-       vmovdqa xmm14, [rsp+16*8]
-       mov     r12,  [rsp + 9*16 + 0*8]
-       mov     r15,  [rsp + 9*16 + 1*8]
-       add     rsp, stack_size
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg0.w edi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
-
- %define tmp   r11
- %define tmp.w r11d
- %define tmp.b r11b
- %define tmp2   r10
- %define return rax
- %define return.w eax
-
- %define func(x) x:
- %define FUNC_SAVE
- %define FUNC_RESTORE
-%endif
-
-;;; gf_2vect_mad_avx2(len, vec, vec_i, mul_array, src, dest)
-%define len   arg0
-%define len.w arg0.w
-%define vec    arg1
-%define vec_i    arg2
-%define mul_array arg3
-%define        src   arg4
-%define dest1 arg5
-%define pos   return
-%define pos.w return.w
-
-%define dest2 tmp2
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR vmovdqu
- %define XSTR vmovdqu
-%else
-
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR vmovdqa
-  %define XSTR vmovdqa
- %else
-  %define XLDR vmovntdqa
-  %define XSTR vmovntdq
- %endif
-%endif
-
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f   ymm14
-%define xmask0fx  xmm14
-%define xgft1_lo  ymm13
-%define xgft1_hi  ymm12
-%define xgft2_lo  ymm11
-%define xgft2_hi  ymm10
-
-%define x0      ymm0
-%define xtmpa   ymm1
-%define xtmph1  ymm2
-%define xtmpl1  ymm3
-%define xtmph2  ymm4
-%define xtmpl2  ymm5
-%define xd1     ymm6
-%define xd2     ymm7
-%define xtmpd1  ymm8
-%define xtmpd2  ymm9
-
-align 16
-global gf_2vect_mad_avx2:function
-
-func(gf_2vect_mad_avx2)
-       FUNC_SAVE
-       sub     len, 32
-       jl      .return_fail
-       xor     pos, pos
-       mov     tmp.b, 0x0f
-       vpinsrb xmask0fx, xmask0fx, tmp.w, 0
-       vpbroadcastb xmask0f, xmask0fx  ;Construct mask 0x0f0f0f...
-
-       sal     vec_i, 5                ;Multiply by 32
-       sal     vec, 5
-       lea     tmp, [mul_array + vec_i]
-       vmovdqu xgft1_lo, [tmp]         ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
-                                       ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
-       vmovdqu xgft2_lo, [tmp+vec]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-                                       ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
-
-       vperm2i128 xgft1_hi, xgft1_lo, xgft1_lo, 0x11 ; swapped to hi | hi
-       vperm2i128 xgft1_lo, xgft1_lo, xgft1_lo, 0x00 ; swapped to lo | lo
-       vperm2i128 xgft2_hi, xgft2_lo, xgft2_lo, 0x11 ; swapped to hi | hi
-       vperm2i128 xgft2_lo, xgft2_lo, xgft2_lo, 0x00 ; swapped to lo | lo
-       mov     dest2, [dest1+PS]       ; reuse mul_array
-       mov     dest1, [dest1]
-
-       XLDR    xtmpd1, [dest1+len]     ;backup the last 16 bytes in dest
-       XLDR    xtmpd2, [dest2+len]     ;backup the last 16 bytes in dest
-
-.loop32
-       XLDR    xd1, [dest1+pos]                ;Get next dest vector
-       XLDR    xd2, [dest2+pos]                ;Get next dest vector
-.loop32_overlap:
-       XLDR    x0, [src+pos]           ;Get next source vector
-
-       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-
-       vpshufb xtmph1, xgft1_hi, x0    ;Lookup mul table of high nibble
-       vpshufb xtmpl1, xgft1_lo, xtmpa ;Lookup mul table of low nibble
-       vpxor   xtmph1, xtmph1, xtmpl1 ;GF add high and low partials
-       vpxor   xd1, xd1, xtmph1        ;xd1 += partial
-
-       vpshufb xtmph2, xgft2_hi, x0    ;Lookup mul table of high nibble
-       vpshufb xtmpl2, xgft2_lo, xtmpa ;Lookup mul table of low nibble
-       vpxor   xtmph2, xtmph2, xtmpl2 ;GF add high and low partials
-       vpxor   xd2, xd2, xtmph2        ;xd2 += partial
-
-       XSTR    [dest1+pos], xd1
-       XSTR    [dest2+pos], xd2
-
-       add     pos, 32                 ;Loop on 32 bytes at a time
-       cmp     pos, len
-       jle     .loop32
-
-       lea     tmp, [len + 32]
-       cmp     pos, tmp
-       je      .return_pass
-
-       ;; Tail len
-       mov     pos, len        ;Overlapped offset length-32
-       vmovdqa xd1, xtmpd1     ;Restore xd1
-       vmovdqa xd2, xtmpd2     ;Restore xd2
-       jmp     .loop32_overlap ;Do one more overlap pass
-
-.return_pass:
-       mov     return, 0
-       FUNC_RESTORE
-       ret
-
-.return_fail:
-       mov     return, 1
-       FUNC_RESTORE
-       ret
-
-endproc_frame
-
-section .data
-
-;;;       func              core, ver, snum
-slversion gf_2vect_mad_avx2, 04,  01,  0205

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_mad_sse.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_mad_sse.asm.s
deleted file mode 100644 (file)
index 2e82c5a..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_mad_sse.asm.s
+++ /dev/null
@@ -1,239 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_2vect_mad_sse(len, vec, vec_i, mul_array, src, dest);
-;;;
-
-%include "reg_sizes.asm"
-
-%define PS 8
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0  rcx
- %define arg0.w ecx
- %define arg1  rdx
- %define arg2  r8
- %define arg3  r9
- %define arg4  r12
- %define arg5  r15
- %define tmp   r11
- %define tmp2   r10
- %define return rax
- %define return.w eax
- %define stack_size 16*9 + 3*8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
- %define func(x) proc_frame x
-
-%macro FUNC_SAVE 0
-       sub     rsp, stack_size
-       movdqa  [rsp+16*0],xmm6
-       movdqa  [rsp+16*1],xmm7
-       movdqa  [rsp+16*2],xmm8
-       movdqa  [rsp+16*3],xmm9
-       movdqa  [rsp+16*4],xmm10
-       movdqa  [rsp+16*5],xmm11
-       movdqa  [rsp+16*6],xmm12
-       movdqa  [rsp+16*7],xmm13
-       movdqa  [rsp+16*8],xmm14
-       save_reg        r12,  9*16 + 0*8
-       save_reg        r15,  9*16 + 1*8
-       end_prolog
-       mov     arg4, arg(4)
-       mov     arg5, arg(5)
-%endmacro
-
-%macro FUNC_RESTORE 0
-       movdqa  xmm6, [rsp+16*0]
-       movdqa  xmm7, [rsp+16*1]
-       movdqa  xmm8, [rsp+16*2]
-       movdqa  xmm9, [rsp+16*3]
-       movdqa  xmm10, [rsp+16*4]
-       movdqa  xmm11, [rsp+16*5]
-       movdqa  xmm12, [rsp+16*6]
-       movdqa  xmm13, [rsp+16*7]
-       movdqa  xmm14, [rsp+16*8]
-       mov     r12,  [rsp + 9*16 + 0*8]
-       mov     r15,  [rsp + 9*16 + 1*8]
-       add     rsp, stack_size
-%endmacro
-
-%elifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg0.w edi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
- %define tmp   r11
- %define tmp2   r10
- %define return rax
- %define return.w eax
-
- %define func(x) x:
- %define FUNC_SAVE
- %define FUNC_RESTORE
-%endif
-
-;;; gf_2vect_mad_sse(len, vec, vec_i, mul_array, src, dest)
-%define len   arg0
-%define len.w arg0.w
-%define vec    arg1
-%define vec_i    arg2
-%define mul_array arg3
-%define        src   arg4
-%define dest1  arg5
-%define pos   return
-%define pos.w return.w
-
-%define dest2 tmp2
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR movdqu
- %define XSTR movdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR movdqa
-  %define XSTR movdqa
- %else
-  %define XLDR movntdqa
-  %define XSTR movntdq
- %endif
-%endif
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f  xmm14
-%define xgft1_lo  xmm13
-%define xgft1_hi  xmm12
-%define xgft2_lo  xmm11
-%define xgft2_hi  xmm10
-
-%define x0      xmm0
-%define xtmpa   xmm1
-%define xtmph1  xmm2
-%define xtmpl1  xmm3
-%define xtmph2  xmm4
-%define xtmpl2  xmm5
-%define xd1     xmm6
-%define xd2     xmm7
-%define xtmpd1  xmm8
-%define xtmpd2  xmm9
-
-
-align 16
-global gf_2vect_mad_sse:function
-func(gf_2vect_mad_sse)
-       FUNC_SAVE
-       sub     len, 16
-       jl      .return_fail
-
-       xor     pos, pos
-       movdqa  xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-       sal     vec_i, 5                ;Multiply by 32
-       sal     vec, 5
-       lea     tmp, [mul_array + vec_i]
-       movdqu  xgft1_lo,[tmp]          ;Load array Ax{00}, Ax{01}, Ax{02}, ...
-       movdqu  xgft1_hi, [tmp+16]      ; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
-       movdqu  xgft2_lo, [tmp+vec]     ;Load array Bx{00}, Bx{01}, Bx{02}, ...
-       movdqu  xgft2_hi, [tmp+vec+16]  ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
-       mov     dest2, [dest1+PS]
-       mov     dest1, [dest1]
-
-       XLDR    xtmpd1, [dest1+len]     ;backup the last 16 bytes in dest
-       XLDR    xtmpd2, [dest2+len]     ;backup the last 16 bytes in dest
-
-.loop16:
-       XLDR    xd1, [dest1+pos]                ;Get next dest vector
-       XLDR    xd2, [dest2+pos]                ;Get next dest vector
-.loop16_overlap:
-       XLDR    x0, [src+pos]           ;Get next source vector
-       movdqa  xtmph1, xgft1_hi                ;Reload const array registers
-       movdqa  xtmpl1, xgft1_lo
-       movdqa  xtmph2, xgft2_hi                ;Reload const array registers
-       movdqa  xtmpl2, xgft2_lo
-       movdqa  xtmpa, x0               ;Keep unshifted copy of src
-       psraw   x0, 4                   ;Shift to put high nibble into bits 4-0
-       pand    x0, xmask0f             ;Mask high src nibble in bits 4-0
-       pand    xtmpa, xmask0f          ;Mask low src nibble in bits 4-0
-
-       pshufb  xtmph1, x0              ;Lookup mul table of high nibble
-       pshufb  xtmpl1, xtmpa           ;Lookup mul table of low nibble
-       pxor    xtmph1, xtmpl1          ;GF add high and low partials
-       pxor    xd1, xtmph1
-
-       pshufb  xtmph2, x0              ;Lookup mul table of high nibble
-       pshufb  xtmpl2, xtmpa           ;Lookup mul table of low nibble
-       pxor    xtmph2, xtmpl2          ;GF add high and low partials
-       pxor    xd2, xtmph2
-
-       XSTR    [dest1+pos], xd1        ;Store result
-       XSTR    [dest2+pos], xd2        ;Store result
-
-       add     pos, 16                 ;Loop on 16 bytes at a time
-       cmp     pos, len
-       jle     .loop16
-
-       lea     tmp, [len + 16]
-       cmp     pos, tmp
-       je      .return_pass
-
-       ;; Tail len
-       mov     pos, len        ;Overlapped offset length-16
-       movdqa  xd1, xtmpd1     ;Restore xd1
-       movdqa  xd2, xtmpd2     ;Restore xd2
-       jmp     .loop16_overlap ;Do one more overlap pass
-
-.return_pass:
-       FUNC_RESTORE
-       mov     return, 0
-       ret
-
-.return_fail:
-       FUNC_RESTORE
-       mov     return, 1
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-
-mask0f:
-       ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-
-;;;       func             core, ver, snum
-slversion gf_2vect_mad_sse, 00,  01,  0203

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_dot_prod_avx.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_dot_prod_avx.asm.s
deleted file mode 100644 (file)
index 33fc198..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_dot_prod_avx.asm.s
+++ /dev/null
@@ -1,377 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_3vect_dot_prod_avx(len, vec, *g_tbls, **buffs, **dests);
-;;;
-
-%include "reg_sizes.asm"
-
-%ifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
-
- %define tmp   r11
- %define tmp2  r10
- %define tmp3  r13             ; must be saved and restored
- %define tmp4  r12             ; must be saved and restored
- %define return rax
- %macro  SLDR 2
- %endmacro
- %define SSTR SLDR
- %define PS 8
- %define LOG_PS 3
-
- %define func(x) x:
- %macro FUNC_SAVE 0
-       push    r12
-       push    r13
- %endmacro
- %macro FUNC_RESTORE 0
-       pop     r13
-       pop     r12
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0   rcx
- %define arg1   rdx
- %define arg2   r8
- %define arg3   r9
-
- %define arg4   r12            ; must be saved, loaded and restored
- %define arg5   r15            ; must be saved and restored
- %define tmp    r11
- %define tmp2   r10
- %define tmp3   r13            ; must be saved and restored
- %define tmp4   r14            ; must be saved and restored
- %define return rax
- %macro  SLDR 2
- %endmacro
- %define SSTR SLDR
- %define PS     8
- %define LOG_PS 3
- %define stack_size  6*16 + 5*8        ; must be an odd multiple of 8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
-
- %define func(x) proc_frame x
- %macro FUNC_SAVE 0
-       alloc_stack     stack_size
-       save_xmm128     xmm6, 0*16
-       save_xmm128     xmm7, 1*16
-       save_xmm128     xmm8, 2*16
-       save_xmm128     xmm9, 3*16
-       save_xmm128     xmm10, 4*16
-       save_xmm128     xmm11, 5*16
-       save_reg        r12,  6*16 + 0*8
-       save_reg        r13,  6*16 + 1*8
-       save_reg        r14,  6*16 + 2*8
-       save_reg        r15,  6*16 + 3*8
-       end_prolog
-       mov     arg4, arg(4)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       vmovdqa xmm6, [rsp + 0*16]
-       vmovdqa xmm7, [rsp + 1*16]
-       vmovdqa xmm8, [rsp + 2*16]
-       vmovdqa xmm9, [rsp + 3*16]
-       vmovdqa xmm10, [rsp + 4*16]
-       vmovdqa xmm11, [rsp + 5*16]
-       mov     r12,  [rsp + 6*16 + 0*8]
-       mov     r13,  [rsp + 6*16 + 1*8]
-       mov     r14,  [rsp + 6*16 + 2*8]
-       mov     r15,  [rsp + 6*16 + 3*8]
-       add     rsp, stack_size
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, elf32
-
-;;;================== High Address;
-;;;    arg4
-;;;    arg3
-;;;    arg2
-;;;    arg1
-;;;    arg0
-;;;    return
-;;;<================= esp of caller
-;;;    ebp
-;;;<================= ebp = esp
-;;;    var0
-;;;    var1
-;;;    esi
-;;;    edi
-;;;    ebx
-;;;<================= esp of callee
-;;;
-;;;================== Low Address;
-
- %define PS 4
- %define LOG_PS 2
- %define func(x) x:
- %define arg(x) [ebp + PS*2 + PS*x]
- %define var(x) [ebp - PS - PS*x]
-
- %define trans   ecx
- %define trans2  esi
- %define arg0    trans         ;trans and trans2 are for the variables in stack
- %define arg0_m  arg(0)
- %define arg1    ebx
- %define arg2    arg2_m
- %define arg2_m  arg(2)
- %define arg3    trans
- %define arg3_m  arg(3)
- %define arg4    trans
- %define arg4_m  arg(4)
- %define arg5   trans2
- %define tmp    edx
- %define tmp2    edi
- %define tmp3    trans2
- %define tmp3_m  var(0)
- %define tmp4    trans2
- %define tmp4_m  var(1)
- %define return  eax
- %macro SLDR 2 ;; stack load/restore
-       mov %1, %2
- %endmacro
- %define SSTR SLDR
-
- %macro FUNC_SAVE 0
-       push    ebp
-       mov     ebp, esp
-       sub     esp, PS*2               ;2 local variables
-       push    esi
-       push    edi
-       push    ebx
-       mov     arg1, arg(1)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       pop     ebx
-       pop     edi
-       pop     esi
-       add     esp, PS*2               ;2 local variables
-       pop     ebp
- %endmacro
-
-%endif ; output formats
-
-%define len   arg0
-%define vec   arg1
-%define mul_array arg2
-%define        src   arg3
-%define dest1  arg4
-%define ptr   arg5
-
-%define vec_i tmp2
-%define dest2 tmp3
-%define dest3 tmp4
-%define pos   return
-
- %ifidn PS,4                           ;32-bit code
-       %define  len_m  arg0_m
-       %define  src_m  arg3_m
-       %define  dest1_m arg4_m
-       %define  dest2_m tmp3_m
-       %define  dest3_m tmp4_m
- %endif
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR vmovdqu
- %define XSTR vmovdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR vmovdqa
-  %define XSTR vmovdqa
- %else
-  %define XLDR vmovntdqa
-  %define XSTR vmovntdq
- %endif
-%endif
-
-%ifidn PS,8                    ; 64-bit code
- default rel
-  [bits 64]
-%endif
-
-
-section .text
-
-%ifidn PS,8                    ;64-bit code
- %define xmask0f   xmm11
- %define xgft1_lo  xmm10
- %define xgft1_hi  xmm9
- %define xgft2_lo  xmm8
- %define xgft2_hi  xmm7
- %define xgft3_lo  xmm6
- %define xgft3_hi  xmm5
-
- %define x0     xmm0
- %define xtmpa  xmm1
- %define xp1    xmm2
- %define xp2    xmm3
- %define xp3    xmm4
-%else
- %define xmask0f   xmm7
- %define xgft1_lo  xmm6
- %define xgft1_hi  xmm5
- %define xgft2_lo  xgft1_lo
- %define xgft2_hi  xgft1_hi
- %define xgft3_lo  xgft1_lo
- %define xgft3_hi  xgft1_hi
-
- %define x0     xmm0
- %define xtmpa  xmm1
- %define xp1    xmm2
- %define xp2    xmm3
- %define xp3    xmm4
-%endif
-
-align 16
-global gf_3vect_dot_prod_avx:function
-func(gf_3vect_dot_prod_avx)
-       FUNC_SAVE
-       SLDR    len, len_m
-       sub     len, 16
-       SSTR    len_m, len
-       jl      .return_fail
-       xor     pos, pos
-       vmovdqa xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
-       SLDR    dest1, dest1_m
-       mov     dest2, [dest1+PS]
-       SSTR    dest2_m, dest2
-       mov     dest3, [dest1+2*PS]
-       SSTR    dest3_m, dest3
-       mov     dest1, [dest1]
-       SSTR    dest1_m, dest1
-
-.loop16:
-       vpxor   xp1, xp1
-       vpxor   xp2, xp2
-       vpxor   xp3, xp3
-       mov     tmp, mul_array
-       xor     vec_i, vec_i
-
-.next_vect:
-       SLDR    src, src_m
-       mov     ptr, [src+vec_i]
-
-       vmovdqu xgft1_lo, [tmp]         ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
-       vmovdqu xgft1_hi, [tmp+16]      ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
- %ifidn PS,8                           ; 64-bit code
-       vmovdqu xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-       vmovdqu xgft2_hi, [tmp+vec*(32/PS)+16]  ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
-       vmovdqu xgft3_lo, [tmp+vec*(64/PS)]     ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
-       vmovdqu xgft3_hi, [tmp+vec*(64/PS)+16]  ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
-       add     tmp, 32
-       add     vec_i, PS
- %endif
-       XLDR    x0, [ptr+pos]           ;Get next source vector
-
-       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-
-       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
-       vpxor   xp1, xgft1_hi           ;xp1 += partial
-
- %ifidn PS,4                           ; 32-bit code
-       vmovdqu xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-       vmovdqu xgft2_hi, [tmp+vec*(32/PS)+16]  ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
- %endif
-       vpshufb xgft2_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft2_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft2_hi, xgft2_lo      ;GF add high and low partials
-       vpxor   xp2, xgft2_hi           ;xp2 += partial
-
- %ifidn PS,4                           ; 32-bit code
-       sal     vec, 1
-       vmovdqu xgft3_lo, [tmp+vec*(32/PS)]     ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
-       vmovdqu xgft3_hi, [tmp+vec*(32/PS)+16]  ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
-       sar     vec, 1
-       add     tmp, 32
-       add     vec_i, PS
- %endif
-       vpshufb xgft3_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft3_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft3_hi, xgft3_lo      ;GF add high and low partials
-       vpxor   xp3, xgft3_hi           ;xp3 += partial
-
-       cmp     vec_i, vec
-       jl      .next_vect
-
-       SLDR    dest1, dest1_m
-       SLDR    dest2, dest2_m
-       XSTR    [dest1+pos], xp1
-       XSTR    [dest2+pos], xp2
-       SLDR    dest3, dest3_m
-       XSTR    [dest3+pos], xp3
-
-       SLDR    len, len_m
-       add     pos, 16                 ;Loop on 16 bytes at a time
-       cmp     pos, len
-       jle     .loop16
-
-       lea     tmp, [len + 16]
-       cmp     pos, tmp
-       je      .return_pass
-
-       ;; Tail len
-       mov     pos, len        ;Overlapped offset length-16
-       jmp     .loop16         ;Do one more overlap pass
-
-.return_pass:
-       mov     return, 0
-       FUNC_RESTORE
-       ret
-
-.return_fail:
-       mov     return, 1
-       FUNC_RESTORE
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-mask0f: ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-
-;;;       func                  core, ver, snum
-slversion gf_3vect_dot_prod_avx, 02,  05,  0192

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_dot_prod_avx2.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_dot_prod_avx2.asm.s
deleted file mode 100644 (file)
index 23c46a7..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_dot_prod_avx2.asm.s
+++ /dev/null
@@ -1,397 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_3vect_dot_prod_avx2(len, vec, *g_tbls, **buffs, **dests);
-;;;
-
-%include "reg_sizes.asm"
-
-%ifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
-
- %define tmp   r11
- %define tmp.w r11d
- %define tmp.b r11b
- %define tmp2  r10
- %define tmp3  r13             ; must be saved and restored
- %define tmp4  r12             ; must be saved and restored
- %define return rax
- %macro  SLDR   2
- %endmacro
- %define SSTR   SLDR
- %define PS     8
- %define LOG_PS 3
-
- %define func(x) x:
- %macro FUNC_SAVE 0
-       push    r12
-       push    r13
- %endmacro
- %macro FUNC_RESTORE 0
-       pop     r13
-       pop     r12
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0   rcx
- %define arg1   rdx
- %define arg2   r8
- %define arg3   r9
-
- %define arg4   r12            ; must be saved, loaded and restored
- %define arg5   r15            ; must be saved and restored
- %define tmp    r11
- %define tmp.w  r11d
- %define tmp.b  r11b
- %define tmp2   r10
- %define tmp3   r13            ; must be saved and restored
- %define tmp4   r14            ; must be saved and restored
- %define return rax
- %macro  SLDR   2
- %endmacro
- %define SSTR   SLDR
- %define PS     8
- %define LOG_PS 3
- %define stack_size  6*16 + 5*8        ; must be an odd multiple of 8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
-
- %define func(x) proc_frame x
- %macro FUNC_SAVE 0
-       alloc_stack     stack_size
-       vmovdqa [rsp + 0*16], xmm6
-       vmovdqa [rsp + 1*16], xmm7
-       vmovdqa [rsp + 2*16], xmm8
-       vmovdqa [rsp + 3*16], xmm9
-       vmovdqa [rsp + 4*16], xmm10
-       vmovdqa [rsp + 5*16], xmm11
-       save_reg        r12,  6*16 + 0*8
-       save_reg        r13,  6*16 + 1*8
-       save_reg        r14,  6*16 + 2*8
-       save_reg        r15,  6*16 + 3*8
-       end_prolog
-       mov     arg4, arg(4)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       vmovdqa xmm6, [rsp + 0*16]
-       vmovdqa xmm7, [rsp + 1*16]
-       vmovdqa xmm8, [rsp + 2*16]
-       vmovdqa xmm9, [rsp + 3*16]
-       vmovdqa xmm10, [rsp + 4*16]
-       vmovdqa xmm11, [rsp + 5*16]
-       mov     r12,  [rsp + 6*16 + 0*8]
-       mov     r13,  [rsp + 6*16 + 1*8]
-       mov     r14,  [rsp + 6*16 + 2*8]
-       mov     r15,  [rsp + 6*16 + 3*8]
-       add     rsp, stack_size
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, elf32
-
-;;;================== High Address;
-;;;    arg4
-;;;    arg3
-;;;    arg2
-;;;    arg1
-;;;    arg0
-;;;    return
-;;;<================= esp of caller
-;;;    ebp
-;;;<================= ebp = esp
-;;;    var0
-;;;    var1
-;;;    esi
-;;;    edi
-;;;    ebx
-;;;<================= esp of callee
-;;;
-;;;================== Low Address;
-
- %define PS 4
- %define LOG_PS 2
- %define func(x) x:
- %define arg(x) [ebp + PS*2 + PS*x]
- %define var(x) [ebp - PS - PS*x]
-
- %define trans   ecx
- %define trans2  esi
- %define arg0    trans                 ;trans and trans2 are for the variables in stack
- %define arg0_m  arg(0)
- %define arg1    ebx
- %define arg2    arg2_m
- %define arg2_m  arg(2)
- %define arg3    trans
- %define arg3_m  arg(3)
- %define arg4    trans
- %define arg4_m  arg(4)
- %define arg5   trans2
- %define tmp    edx
- %define tmp.w   edx
- %define tmp.b   dl
- %define tmp2    edi
- %define tmp3    trans2
- %define tmp3_m  var(0)
- %define tmp4    trans2
- %define tmp4_m  var(1)
- %define return  eax
- %macro SLDR     2                     ;stack load/restore
-       mov %1, %2
- %endmacro
- %define SSTR SLDR
-
- %macro FUNC_SAVE 0
-       push    ebp
-       mov     ebp, esp
-       sub     esp, PS*2               ;2 local variables
-       push    esi
-       push    edi
-       push    ebx
-       mov     arg1, arg(1)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       pop     ebx
-       pop     edi
-       pop     esi
-       add     esp, PS*2               ;2 local variables
-       pop     ebp
- %endmacro
-
-%endif ; output formats
-
-%define len   arg0
-%define vec   arg1
-%define mul_array arg2
-%define        src   arg3
-%define dest1 arg4
-%define ptr   arg5
-
-%define vec_i tmp2
-%define dest2 tmp3
-%define dest3 tmp4
-%define pos   return
-
-%ifidn PS,4                            ;32-bit code
- %define  len_m   arg0_m
- %define  src_m   arg3_m
- %define  dest1_m arg4_m
- %define  dest2_m tmp3_m
- %define  dest3_m tmp4_m
-%endif
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR vmovdqu
- %define XSTR vmovdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR vmovdqa
-  %define XSTR vmovdqa
- %else
-  %define XLDR vmovntdqa
-  %define XSTR vmovntdq
- %endif
-%endif
-
-%ifidn PS,8                            ;64-bit code
- default rel
- [bits 64]
-%endif
-
-section .text
-
-%ifidn PS,8                            ;64-bit code
- %define xmask0f   ymm11
- %define xmask0fx  xmm11
- %define xgft1_lo  ymm10
- %define xgft1_hi  ymm9
- %define xgft2_lo  ymm8
- %define xgft2_hi  ymm7
- %define xgft3_lo  ymm6
- %define xgft3_hi  ymm5
-
- %define x0     ymm0
- %define xtmpa  ymm1
- %define xp1    ymm2
- %define xp2    ymm3
- %define xp3    ymm4
-%else
- %define xmask0f   ymm7
- %define xmask0fx  xmm7
- %define xgft1_lo  ymm6
- %define xgft1_hi  ymm5
- %define xgft2_lo  xgft1_lo
- %define xgft2_hi  xgft1_hi
- %define xgft3_lo  xgft1_lo
- %define xgft3_hi  xgft1_hi
-
- %define x0     ymm0
- %define xtmpa  ymm1
- %define xp1    ymm2
- %define xp2    ymm3
- %define xp3    ymm4
-
-%endif
-
-align 16
-global gf_3vect_dot_prod_avx2:function
-func(gf_3vect_dot_prod_avx2)
-       FUNC_SAVE
-       SLDR    len, len_m
-       sub     len, 32
-       SSTR    len_m, len
-       jl      .return_fail
-       xor     pos, pos
-       mov     tmp.b, 0x0f
-       vpinsrb xmask0fx, xmask0fx, tmp.w, 0
-       vpbroadcastb xmask0f, xmask0fx  ;Construct mask 0x0f0f0f...
-
-       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
-       SLDR    dest1, dest1_m
-       mov     dest2, [dest1+PS]
-       SSTR    dest2_m, dest2
-       mov     dest3, [dest1+2*PS]
-       SSTR    dest3_m, dest3
-       mov     dest1, [dest1]
-       SSTR    dest1_m, dest1
-
-.loop32:
-       vpxor   xp1, xp1
-       vpxor   xp2, xp2
-       vpxor   xp3, xp3
-       mov     tmp, mul_array
-       xor     vec_i, vec_i
-
-.next_vect:
-       SLDR    src, src_m
-       mov     ptr, [src+vec_i]
-
-       vmovdqu xgft1_lo, [tmp]         ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
-                                       ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
-       vperm2i128 xgft1_hi, xgft1_lo, xgft1_lo, 0x11 ; swapped to hi | hi
-       vperm2i128 xgft1_lo, xgft1_lo, xgft1_lo, 0x00 ; swapped to lo | lo
- %ifidn PS,8                           ; 64-bit code
-       vmovdqu    xgft2_lo, [tmp+vec*(32/PS)]  ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-                                               ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
-       vperm2i128 xgft2_hi, xgft2_lo, xgft2_lo, 0x11 ; swapped to hi | hi
-       vperm2i128 xgft2_lo, xgft2_lo, xgft2_lo, 0x00 ; swapped to lo | lo
-
-       vmovdqu    xgft3_lo, [tmp+vec*(64/PS)]  ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
-                                               ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
-       vperm2i128 xgft3_hi, xgft3_lo, xgft3_lo, 0x11 ; swapped to hi | hi
-       vperm2i128 xgft3_lo, xgft3_lo, xgft3_lo, 0x00 ; swapped to lo | lo
-
-       add     tmp, 32
-       add     vec_i, PS
- %endif
-       XLDR    x0, [ptr+pos]           ;Get next source vector
-
-       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-
-       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
-       vpxor   xp1, xgft1_hi           ;xp1 += partial
-
- %ifidn PS,4                           ; 32-bit code
-       vmovdqu xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-                                               ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
-       vperm2i128 xgft2_hi, xgft2_lo, xgft2_lo, 0x11 ; swapped to hi | hi
-       vperm2i128 xgft2_lo, xgft2_lo, xgft2_lo, 0x00 ; swapped to lo | lo
- %endif
-       vpshufb    xgft2_hi, x0         ;Lookup mul table of high nibble
-       vpshufb    xgft2_lo, xtmpa              ;Lookup mul table of low nibble
-       vpxor      xgft2_hi, xgft2_lo   ;GF add high and low partials
-       vpxor      xp2, xgft2_hi                ;xp2 += partial
-
- %ifidn PS,4                           ; 32-bit code
-       sal     vec, 1
-       vmovdqu xgft3_lo, [tmp+vec*(32/PS)]     ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
-                                               ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
-       vperm2i128 xgft3_hi, xgft3_lo, xgft3_lo, 0x11 ; swapped to hi | hi
-       vperm2i128 xgft3_lo, xgft3_lo, xgft3_lo, 0x00 ; swapped to lo | lo
-       sar     vec, 1
-       add     tmp, 32
-       add     vec_i, PS
- %endif
-       vpshufb xgft3_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft3_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft3_hi, xgft3_lo      ;GF add high and low partials
-       vpxor   xp3, xgft3_hi           ;xp3 += partial
-
-       cmp     vec_i, vec
-       jl      .next_vect
-
-       SLDR    dest1, dest1_m
-       SLDR    dest2, dest2_m
-       XSTR    [dest1+pos], xp1
-       XSTR    [dest2+pos], xp2
-       SLDR    dest3, dest3_m
-       XSTR    [dest3+pos], xp3
-
-       SLDR    len, len_m
-       add     pos, 32                 ;Loop on 32 bytes at a time
-       cmp     pos, len
-       jle     .loop32
-
-       lea     tmp, [len + 32]
-       cmp     pos, tmp
-       je      .return_pass
-
-       ;; Tail len
-       mov     pos, len        ;Overlapped offset length-16
-       jmp     .loop32         ;Do one more overlap pass
-
-.return_pass:
-       mov     return, 0
-       FUNC_RESTORE
-       ret
-
-.return_fail:
-       mov     return, 1
-       FUNC_RESTORE
-       ret
-
-endproc_frame
-
-section .data
-
-;;;       func                   core, ver, snum
-slversion gf_3vect_dot_prod_avx2, 04,  05,  0197

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_dot_prod_sse.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_dot_prod_sse.asm.s
deleted file mode 100644 (file)
index a082fb8..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_dot_prod_sse.asm.s
+++ /dev/null
@@ -1,378 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_3vect_dot_prod_sse(len, vec, *g_tbls, **buffs, **dests);
-;;;
-
-%include "reg_sizes.asm"
-
-%ifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
-
- %define tmp   r11
- %define tmp2  r10
- %define tmp3  r13             ; must be saved and restored
- %define tmp4  r12             ; must be saved and restored
- %define return rax
- %macro  SLDR 2
- %endmacro
- %define SSTR SLDR
- %define PS 8
- %define LOG_PS 3
-
- %define func(x) x:
- %macro FUNC_SAVE 0
-       push    r12
-       push    r13
- %endmacro
- %macro FUNC_RESTORE 0
-       pop     r13
-       pop     r12
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0   rcx
- %define arg1   rdx
- %define arg2   r8
- %define arg3   r9
-
- %define arg4   r12            ; must be saved, loaded and restored
- %define arg5   r15            ; must be saved and restored
- %define tmp    r11
- %define tmp2   r10
- %define tmp3   r13            ; must be saved and restored
- %define tmp4   r14            ; must be saved and restored
- %define return rax
- %macro  SLDR 2
- %endmacro
- %define SSTR SLDR
- %define PS     8
- %define LOG_PS 3
- %define stack_size  6*16 + 5*8        ; must be an odd multiple of 8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
-
- %define func(x) proc_frame x
- %macro FUNC_SAVE 0
-       alloc_stack     stack_size
-       save_xmm128     xmm6, 0*16
-       save_xmm128     xmm7, 1*16
-       save_xmm128     xmm8, 2*16
-       save_xmm128     xmm9, 3*16
-       save_xmm128     xmm10, 4*16
-       save_xmm128     xmm11, 5*16
-       save_reg        r12,  6*16 + 0*8
-       save_reg        r13,  6*16 + 1*8
-       save_reg        r14,  6*16 + 2*8
-       save_reg        r15,  6*16 + 3*8
-       end_prolog
-       mov     arg4, arg(4)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       movdqa  xmm6, [rsp + 0*16]
-       movdqa  xmm7, [rsp + 1*16]
-       movdqa  xmm8, [rsp + 2*16]
-       movdqa  xmm9, [rsp + 3*16]
-       movdqa  xmm10, [rsp + 4*16]
-       movdqa  xmm11, [rsp + 5*16]
-       mov     r12,  [rsp + 6*16 + 0*8]
-       mov     r13,  [rsp + 6*16 + 1*8]
-       mov     r14,  [rsp + 6*16 + 2*8]
-       mov     r15,  [rsp + 6*16 + 3*8]
-       add     rsp, stack_size
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, elf32
-
-;;;================== High Address;
-;;;    arg4
-;;;    arg3
-;;;    arg2
-;;;    arg1
-;;;    arg0
-;;;    return
-;;;<================= esp of caller
-;;;    ebp
-;;;<================= ebp = esp
-;;;    var0
-;;;    var1
-;;;    esi
-;;;    edi
-;;;    ebx
-;;;<================= esp of callee
-;;;
-;;;================== Low Address;
-
- %define PS 4
- %define LOG_PS 2
- %define func(x) x:
- %define arg(x) [ebp + PS*2 + PS*x]
- %define var(x) [ebp - PS - PS*x]
-
- %define trans  ecx
- %define trans2  esi
- %define arg0   trans          ;trans and trans2 are for the variables in stack
- %define arg0_m         arg(0)
- %define arg1   ebx
- %define arg2   arg2_m
- %define arg2_m         arg(2)
- %define arg3   trans
- %define arg3_m         arg(3)
- %define arg4   trans
- %define arg4_m         arg(4)
- %define arg5   trans2
- %define tmp    edx
- %define tmp2   edi
- %define tmp3   trans2
- %define tmp3_m         var(0)
- %define tmp4   trans2
- %define tmp4_m         var(1)
- %define return         eax
- %macro SLDR 2 ;; stack load/restore
-       mov %1, %2
- %endmacro
- %define SSTR SLDR
-
- %macro FUNC_SAVE 0
-       push    ebp
-       mov     ebp, esp
-       sub     esp, PS*2               ;2 local variables
-       push    esi
-       push    edi
-       push    ebx
-       mov     arg1, arg(1)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       pop     ebx
-       pop     edi
-       pop     esi
-       add     esp, PS*2               ;2 local variables
-       pop     ebp
- %endmacro
-
-%endif ; output formats
-
-%define len   arg0
-%define vec   arg1
-%define mul_array arg2
-%define        src   arg3
-%define dest1  arg4
-%define ptr   arg5
-
-%define vec_i tmp2
-%define dest2 tmp3
-%define dest3 tmp4
-%define pos   return
-
- %ifidn PS,4                           ;32-bit code
-       %define  len_m  arg0_m
-       %define  src_m  arg3_m
-       %define  dest1_m arg4_m
-       %define  dest2_m tmp3_m
-       %define  dest3_m tmp4_m
- %endif
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR movdqu
- %define XSTR movdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR movdqa
-  %define XSTR movdqa
- %else
-  %define XLDR movntdqa
-  %define XSTR movntdq
- %endif
-%endif
-
-%ifidn PS,8                            ; 64-bit code
- default rel
-  [bits 64]
-%endif
-
-
-section .text
-
-%ifidn PS,8                            ;64-bit code
- %define xmask0f   xmm11
- %define xgft1_lo  xmm2
- %define xgft1_hi  xmm3
- %define xgft2_lo  xmm4
- %define xgft2_hi  xmm7
- %define xgft3_lo  xmm6
- %define xgft3_hi  xmm5
-
- %define x0     xmm0
- %define xtmpa  xmm1
- %define xp1    xmm10
- %define xp2    xmm9
- %define xp3    xmm8
-%else
- %define xmask0f   xmm7
- %define xgft1_lo  xmm6
- %define xgft1_hi  xmm5
- %define xgft2_lo  xgft1_lo
- %define xgft2_hi  xgft1_hi
- %define xgft3_lo  xgft1_lo
- %define xgft3_hi  xgft1_hi
-
- %define x0     xmm0
- %define xtmpa  xmm1
- %define xp1    xmm2
- %define xp2    xmm3
- %define xp3    xmm4
-%endif
-
-align 16
-global gf_3vect_dot_prod_sse:function
-func(gf_3vect_dot_prod_sse)
-       FUNC_SAVE
-       SLDR    len, len_m
-       sub     len, 16
-       SSTR    len_m, len
-       jl      .return_fail
-       xor     pos, pos
-       movdqa  xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
-       SLDR    dest1, dest1_m
-       mov     dest2, [dest1+PS]
-       SSTR    dest2_m, dest2
-       mov     dest3, [dest1+2*PS]
-       SSTR    dest3_m, dest3
-       mov     dest1, [dest1]
-       SSTR    dest1_m, dest1
-
-.loop16:
-       pxor    xp1, xp1
-       pxor    xp2, xp2
-       pxor    xp3, xp3
-       mov     tmp, mul_array
-       xor     vec_i, vec_i
-
-.next_vect:
-       SLDR src, src_m
-       mov     ptr, [src+vec_i]
-
-       movdqu  xgft1_lo, [tmp]         ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
-       movdqu  xgft1_hi, [tmp+16]      ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
- %ifidn PS,8                           ;64-bit code
-       movdqu  xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-       movdqu  xgft2_hi, [tmp+vec*(32/PS)+16]  ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
-       movdqu  xgft3_lo, [tmp+vec*(64/PS)]     ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
-       movdqu  xgft3_hi, [tmp+vec*(64/PS)+16]  ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
-       add     tmp, 32
-       add     vec_i, PS
- %endif
-       XLDR    x0, [ptr+pos]           ;Get next source vector
-
-       movdqa  xtmpa, x0               ;Keep unshifted copy of src
-       psraw   x0, 4                   ;Shift to put high nibble into bits 4-0
-       pand    x0, xmask0f             ;Mask high src nibble in bits 4-0
-       pand    xtmpa, xmask0f          ;Mask low src nibble in bits 4-0
-
-       pshufb  xgft1_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft1_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft1_hi, xgft1_lo      ;GF add high and low partials
-       pxor    xp1, xgft1_hi           ;xp1 += partial
-
- %ifidn PS,4                           ;32-bit code
-       movdqu  xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-       movdqu  xgft2_hi, [tmp+vec*(32/PS)+16]  ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
- %endif
-       pshufb  xgft2_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft2_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft2_hi, xgft2_lo      ;GF add high and low partials
-       pxor    xp2, xgft2_hi           ;xp2 += partial
-
- %ifidn PS,4                           ;32-bit code
-       sal     vec, 1
-       movdqu  xgft3_lo, [tmp+vec*(32/PS)]     ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
-       movdqu  xgft3_hi, [tmp+vec*(32/PS)+16]  ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
-       sar     vec, 1
-       add     tmp, 32
-       add     vec_i, PS
- %endif
-       pshufb  xgft3_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft3_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft3_hi, xgft3_lo      ;GF add high and low partials
-       pxor    xp3, xgft3_hi           ;xp3 += partial
-
-       cmp     vec_i, vec
-       jl      .next_vect
-
-       SLDR    dest1, dest1_m
-       SLDR    dest2, dest2_m
-       XSTR    [dest1+pos], xp1
-       XSTR    [dest2+pos], xp2
-       SLDR    dest3, dest3_m
-       XSTR    [dest3+pos], xp3
-
-       SLDR    len, len_m
-       add     pos, 16                 ;Loop on 16 bytes at a time
-       cmp     pos, len
-       jle     .loop16
-
-       lea     tmp, [len + 16]
-       cmp     pos, tmp
-       je      .return_pass
-
-       ;; Tail len
-       mov     pos, len        ;Overlapped offset length-16
-       jmp     .loop16         ;Do one more overlap pass
-
-.return_pass:
-       mov     return, 0
-       FUNC_RESTORE
-       ret
-
-.return_fail:
-       mov     return, 1
-       FUNC_RESTORE
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-mask0f: ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-
-;;;       func                  core, ver, snum
-slversion gf_3vect_dot_prod_sse, 00,  06,  0063

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_mad_avx.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_mad_avx.asm.s
deleted file mode 100644 (file)
index ed25d6a..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_mad_avx.asm.s
+++ /dev/null
@@ -1,288 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_3vect_mad_avx(len, vec, vec_i, mul_array, src, dest);
-;;;
-
-%include "reg_sizes.asm"
-
-%define PS 8
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0  rcx
- %define arg0.w ecx
- %define arg1  rdx
- %define arg2  r8
- %define arg3  r9
- %define arg4  r12
- %define arg5  r15
- %define tmp   r11
- %define return rax
- %define return.w eax
- %define stack_size 16*10 + 3*8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
- %define func(x) proc_frame x
-
-%macro FUNC_SAVE 0
-       sub     rsp, stack_size
-       vmovdqa [rsp+16*0],xmm6
-       vmovdqa [rsp+16*1],xmm7
-       vmovdqa [rsp+16*2],xmm8
-       vmovdqa [rsp+16*3],xmm9
-       vmovdqa [rsp+16*4],xmm10
-       vmovdqa [rsp+16*5],xmm11
-       vmovdqa [rsp+16*6],xmm12
-       vmovdqa [rsp+16*7],xmm13
-       vmovdqa [rsp+16*8],xmm14
-       vmovdqa [rsp+16*9],xmm15
-       save_reg        r12,  10*16 + 0*8
-       save_reg        r15,  10*16 + 1*8
-       end_prolog
-       mov     arg4, arg(4)
-       mov     arg5, arg(5)
-%endmacro
-
-%macro FUNC_RESTORE 0
-       vmovdqa xmm6, [rsp+16*0]
-       vmovdqa xmm7, [rsp+16*1]
-       vmovdqa xmm8, [rsp+16*2]
-       vmovdqa xmm9, [rsp+16*3]
-       vmovdqa xmm10, [rsp+16*4]
-       vmovdqa xmm11, [rsp+16*5]
-       vmovdqa xmm12, [rsp+16*6]
-       vmovdqa xmm13, [rsp+16*7]
-       vmovdqa xmm14, [rsp+16*8]
-       vmovdqa xmm15, [rsp+16*9]
-       mov     r12,  [rsp + 10*16 + 0*8]
-       mov     r15,  [rsp + 10*16 + 1*8]
-       add     rsp, stack_size
-%endmacro
-
-%elifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg0.w edi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
- %define tmp   r11
- %define return rax
- %define return.w eax
-
- %define func(x) x:
- %define FUNC_SAVE
- %define FUNC_RESTORE
-%endif
-
-;;; gf_3vect_mad_avx(len, vec, vec_i, mul_array, src, dest)
-%define len   arg0
-%define len.w arg0.w
-%define vec    arg1
-%define vec_i    arg2
-%define mul_array arg3
-%define        src   arg4
-%define dest1 arg5
-%define pos   return
-%define pos.w return.w
-
-%define dest2 mul_array
-%define dest3 vec_i
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR vmovdqu
- %define XSTR vmovdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR vmovdqa
-  %define XSTR vmovdqa
- %else
-  %define XLDR vmovntdqa
-  %define XSTR vmovntdq
- %endif
-%endif
-
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f  xmm15
-%define xgft1_lo  xmm14
-%define xgft1_hi  xmm13
-%define xgft2_lo  xmm12
-%define xgft2_hi  xmm11
-%define xgft3_lo  xmm10
-%define xgft3_hi  xmm9
-
-%define x0      xmm0
-%define xtmpa   xmm1
-%define xtmph1  xmm2
-%define xtmpl1  xmm3
-%define xtmph2  xmm4
-%define xtmpl2  xmm5
-%define xtmph3  xmm6
-%define xtmpl3  xmm7
-%define xd1     xmm8
-%define xd2     xtmpl1
-%define xd3     xtmph1
-
-align 16
-global gf_3vect_mad_avx:function
-func(gf_3vect_mad_avx)
-       FUNC_SAVE
-       sub     len, 16
-       jl      .return_fail
-       xor     pos, pos
-       vmovdqa xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-
-       sal     vec_i, 5                ;Multiply by 32
-       sal     vec, 5
-       lea     tmp, [mul_array + vec_i]
-       vmovdqu xgft1_lo, [tmp]         ;Load array Ax{00}, Ax{01}, Ax{02}, ...
-       vmovdqu xgft1_hi, [tmp+16]      ; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
-       vmovdqu xgft2_lo, [tmp+vec]     ;Load array Bx{00}, Bx{01}, Bx{02}, ...
-       vmovdqu xgft2_hi, [tmp+vec+16]  ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
-       vmovdqu xgft3_lo, [tmp+2*vec]   ;Load array Cx{00}, Cx{01}, Cx{02}, ...
-       vmovdqu xgft3_hi, [tmp+2*vec+16]; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
-       mov     dest2, [dest1+PS]       ; reuse mul_array
-       mov     dest3, [dest1+2*PS]     ; reuse vec_i
-       mov     dest1, [dest1]
-
-.loop16:
-       XLDR    x0, [src+pos]           ;Get next source vector
-       XLDR    xd1, [dest1+pos]                ;Get next dest vector
-
-       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-
-       ; dest1
-       vpshufb xtmph1, xgft1_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xtmpl1, xgft1_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xtmph1, xtmph1, xtmpl1          ;GF add high and low partials
-       vpxor   xd1, xd1, xtmph1                ;xd1 += partial
-
-       XLDR    xd2, [dest2+pos]        ;reuse xtmpl1. Get next dest vector
-       XLDR    xd3, [dest3+pos]        ;reuse xtmph1. Get next dest vector
-
-       ; dest2
-       vpshufb xtmph2, xgft2_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xtmpl2, xgft2_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xtmph2, xtmph2, xtmpl2          ;GF add high and low partials
-       vpxor   xd2, xd2, xtmph2                ;xd2 += partial
-
-       ; dest3
-       vpshufb xtmph3, xgft3_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xtmpl3, xgft3_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xtmph3, xtmph3, xtmpl3          ;GF add high and low partials
-       vpxor   xd3, xd3, xtmph3                ;xd3 += partial
-
-       XSTR    [dest1+pos], xd1
-       XSTR    [dest2+pos], xd2
-       XSTR    [dest3+pos], xd3
-
-       add     pos, 16                 ;Loop on 16 bytes at a time
-       cmp     pos, len
-       jle     .loop16
-
-       lea     tmp, [len + 16]
-       cmp     pos, tmp
-       je      .return_pass
-
-.lessthan16:
-       ;; Tail len
-       ;; Do one more overlap pass
-       mov     tmp, len                ;Overlapped offset length-16
-       XLDR    x0, [src+tmp]           ;Get next source vector
-       XLDR    xd1, [dest1+tmp]        ;Get next dest vector
-       XLDR    xd2, [dest2+tmp]        ;reuse xtmpl1. Get next dest vector
-       XLDR    xd3, [dest3+tmp]        ;reuse xtmph1. Get next dest vector
-
-       sub     len, pos
-
-       movdqa  xtmph3, [constip16]     ;Load const of i + 16
-       vpinsrb xtmpl3, xtmpl3, len.w, 15
-       vpshufb xtmpl3, xtmpl3, xmask0f         ;Broadcast len to all bytes
-       vpcmpgtb        xtmpl3, xtmpl3, xtmph3
-
-       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-
-       ; dest1
-       vpshufb xgft1_hi, xgft1_hi, x0          ;Lookup mul table of high nibble
-       vpshufb xgft1_lo, xgft1_lo, xtmpa       ;Lookup mul table of low nibble
-       vpxor   xgft1_hi, xgft1_hi, xgft1_lo    ;GF add high and low partials
-       vpand   xgft1_hi, xgft1_hi, xtmpl3
-       vpxor   xd1, xd1, xgft1_hi
-
-       ; dest2
-       vpshufb xgft2_hi, xgft2_hi, x0          ;Lookup mul table of high nibble
-       vpshufb xgft2_lo, xgft2_lo, xtmpa       ;Lookup mul table of low nibble
-       vpxor   xgft2_hi, xgft2_hi, xgft2_lo    ;GF add high and low partials
-       vpand   xgft2_hi, xgft2_hi, xtmpl3
-       vpxor   xd2, xd2, xgft2_hi
-
-       ; dest3
-       vpshufb xgft3_hi, xgft3_hi, x0          ;Lookup mul table of high nibble
-       vpshufb xgft3_lo, xgft3_lo, xtmpa       ;Lookup mul table of low nibble
-       vpxor   xgft3_hi, xgft3_hi, xgft3_lo    ;GF add high and low partials
-       vpand   xgft3_hi, xgft3_hi, xtmpl3
-       vpxor   xd3, xd3, xgft3_hi
-
-       XSTR    [dest1+tmp], xd1
-       XSTR    [dest2+tmp], xd2
-       XSTR    [dest3+tmp], xd3
-
-.return_pass:
-       mov     return, 0
-       FUNC_RESTORE
-       ret
-
-.return_fail:
-       mov     return, 1
-       FUNC_RESTORE
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-mask0f: ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-constip16:
-       ddq 0xf0f1f2f3f4f5f6f7f8f9fafbfcfdfeff
-
-;;;       func             core, ver, snum
-slversion gf_3vect_mad_avx, 02,  01,  0207

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_mad_avx2.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_mad_avx2.asm.s
deleted file mode 100644 (file)
index d0b9272..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_mad_avx2.asm.s
+++ /dev/null
@@ -1,317 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_3vect_mad_avx2(len, vec, vec_i, mul_array, src, dest);
-;;;
-
-%include "reg_sizes.asm"
-
-%define PS 8
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0   rcx
- %define arg0.w ecx
- %define arg1   rdx
- %define arg2   r8
- %define arg3   r9
- %define arg4   r12            ; must be saved, loaded and restored
- %define arg5   r15            ; must be saved and restored
-
- %define tmp    r11
- %define tmp.w  r11d
- %define tmp.b  r11b
- %define return rax
- %define return.w eax
- %define stack_size 16*10 + 3*8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
- %define func(x) proc_frame x
-
- %macro FUNC_SAVE 0
-       sub     rsp, stack_size
-       vmovdqa [rsp+16*0],xmm6
-       vmovdqa [rsp+16*1],xmm7
-       vmovdqa [rsp+16*2],xmm8
-       vmovdqa [rsp+16*3],xmm9
-       vmovdqa [rsp+16*4],xmm10
-       vmovdqa [rsp+16*5],xmm11
-       vmovdqa [rsp+16*6],xmm12
-       vmovdqa [rsp+16*7],xmm13
-       vmovdqa [rsp+16*8],xmm14
-       vmovdqa [rsp+16*9],xmm15
-       save_reg        r12,  10*16 + 0*8
-       save_reg        r15,  10*16 + 1*8
-       end_prolog
-       mov     arg4, arg(4)
-       mov     arg5, arg(5)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       vmovdqa xmm6, [rsp+16*0]
-       vmovdqa xmm7, [rsp+16*1]
-       vmovdqa xmm8, [rsp+16*2]
-       vmovdqa xmm9, [rsp+16*3]
-       vmovdqa xmm10, [rsp+16*4]
-       vmovdqa xmm11, [rsp+16*5]
-       vmovdqa xmm12, [rsp+16*6]
-       vmovdqa xmm13, [rsp+16*7]
-       vmovdqa xmm14, [rsp+16*8]
-       vmovdqa xmm15, [rsp+16*9]
-       mov     r12,  [rsp + 10*16 + 0*8]
-       mov     r15,  [rsp + 10*16 + 1*8]
-       add     rsp, stack_size
- %endmacro
-
-%elifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg0.w edi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
-
- %define tmp   r11
- %define tmp.w r11d
- %define tmp.b r11b
- %define return rax
- %define return.w eax
-
- %define func(x) x:
- %define FUNC_SAVE
- %define FUNC_RESTORE
-%endif
-
-;;; gf_3vect_mad_avx2(len, vec, vec_i, mul_array, src, dest)
-%define len   arg0
-%define len.w arg0.w
-%define vec    arg1
-%define vec_i    arg2
-%define mul_array arg3
-%define        src   arg4
-%define dest1 arg5
-%define pos   return
-%define pos.w return.w
-
-%define dest2 mul_array
-%define dest3 vec_i
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR vmovdqu
- %define XSTR vmovdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR vmovdqa
-  %define XSTR vmovdqa
- %else
-  %define XLDR vmovntdqa
-  %define XSTR vmovntdq
- %endif
-%endif
-
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f   ymm15
-%define xmask0fx  xmm15
-%define xgft1_lo  ymm14
-%define xgft1_hi  ymm13
-%define xgft2_lo  ymm12
-%define xgft3_lo  ymm11
-
-%define x0      ymm0
-%define xtmpa   ymm1
-%define xtmph1  ymm2
-%define xtmpl1  ymm3
-%define xtmph2  ymm4
-%define xtmpl2  ymm5
-%define xtmpl2x xmm5
-%define xtmph3  ymm6
-%define xtmpl3  ymm7
-%define xtmpl3x xmm7
-%define xd1     ymm8
-%define xd2     ymm9
-%define xd3     ymm10
-
-align 16
-global gf_3vect_mad_avx2:function
-func(gf_3vect_mad_avx2)
-       FUNC_SAVE
-       sub     len, 32
-       jl      .return_fail
-       xor     pos, pos
-       mov     tmp.b, 0x0f
-       vpinsrb xmask0fx, xmask0fx, tmp.w, 0
-       vpbroadcastb xmask0f, xmask0fx  ;Construct mask 0x0f0f0f...
-
-       sal     vec_i, 5                ;Multiply by 32
-       sal     vec, 5
-       lea     tmp, [mul_array + vec_i]
-
-       vmovdqu xgft1_lo, [tmp]         ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
-                                       ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
-       vperm2i128 xgft1_hi, xgft1_lo, xgft1_lo, 0x11 ; swapped to hi | hi
-       vperm2i128 xgft1_lo, xgft1_lo, xgft1_lo, 0x00 ; swapped to lo | lo
-
-       vmovdqu xgft2_lo, [tmp+vec]     ;Load array Bx{00}, Bx{01}, Bx{02}, ...
-                                       ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
-       vmovdqu xgft3_lo, [tmp+2*vec]   ;Load array Cx{00}, Cx{01}, Cx{02}, ...
-                                       ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
-       mov     dest2, [dest1+PS]       ; reuse mul_array
-       mov     dest3, [dest1+2*PS]     ; reuse vec_i
-       mov     dest1, [dest1]
-
-.loop32:
-       XLDR    x0, [src+pos]           ;Get next source vector
-       XLDR    xd1, [dest1+pos]                ;Get next dest vector
-       XLDR    xd2, [dest2+pos]                ;Get next dest vector
-       XLDR    xd3, [dest3+pos]                ;Get next dest vector
-       vperm2i128 xtmph2, xgft2_lo, xgft2_lo, 0x11 ; swapped to hi | hi
-       vperm2i128 xtmpl2, xgft2_lo, xgft2_lo, 0x00 ; swapped to lo | lo
-
-       vperm2i128 xtmph3, xgft3_lo, xgft3_lo, 0x11 ; swapped to hi | hi
-       vperm2i128 xtmpl3, xgft3_lo, xgft3_lo, 0x00 ; swapped to lo | lo
-
-       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-
-       ; dest1
-       vpshufb xtmph1, xgft1_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xtmpl1, xgft1_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xtmph1, xtmph1, xtmpl1          ;GF add high and low partials
-       vpxor   xd1, xd1, xtmph1                ;xd1 += partial
-
-       ; dest2
-       vpshufb xtmph2, x0              ;Lookup mul table of high nibble
-       vpshufb xtmpl2, xtmpa           ;Lookup mul table of low nibble
-       vpxor   xtmph2, xtmpl2          ;GF add high and low partials
-       vpxor   xd2, xtmph2             ;xd2 += partial
-
-       ; dest3
-       vpshufb xtmph3, x0              ;Lookup mul table of high nibble
-       vpshufb xtmpl3, xtmpa           ;Lookup mul table of low nibble
-       vpxor   xtmph3, xtmpl3          ;GF add high and low partials
-       vpxor   xd3, xtmph3             ;xd3 += partial
-
-       XSTR    [dest1+pos], xd1
-       XSTR    [dest2+pos], xd2
-       XSTR    [dest3+pos], xd3
-
-       add     pos, 32                 ;Loop on 32 bytes at a time
-       cmp     pos, len
-       jle     .loop32
-
-       lea     tmp, [len + 32]
-       cmp     pos, tmp
-       je      .return_pass
-
-.lessthan32:
-       ;; Tail len
-       ;; Do one more overlap pass
-       mov     tmp.b, 0x1f
-       vpinsrb xtmpl2x, xtmpl2x, tmp.w, 0
-       vpbroadcastb xtmpl2, xtmpl2x    ;Construct mask 0x1f1f1f...
-
-       mov     tmp, len                ;Overlapped offset length-32
-
-       XLDR    x0, [src+tmp]           ;Get next source vector
-       XLDR    xd1, [dest1+tmp]        ;Get next dest vector
-       XLDR    xd2, [dest2+tmp]        ;Get next dest vector
-       XLDR    xd3, [dest3+tmp]        ;Get next dest vector
-
-       sub     len, pos
-
-       vmovdqa xtmph3, [constip32]     ;Load const of i + 32
-       vpinsrb xtmpl3x, xtmpl3x, len.w, 15
-       vinserti128     xtmpl3, xtmpl3, xtmpl3x, 1 ;swapped to xtmpl3x | xtmpl3x
-       vpshufb xtmpl3, xtmpl3, xtmpl2  ;Broadcast len to all bytes. xtmpl2=0x1f1f1f...
-       vpcmpgtb        xtmpl3, xtmpl3, xtmph3
-
-       vperm2i128 xtmph2, xgft2_lo, xgft2_lo, 0x11 ; swapped to hi | hi
-       vperm2i128 xgft2_lo, xgft2_lo, xgft2_lo, 0x00 ; swapped to lo | lo
-
-       vperm2i128 xtmph3, xgft3_lo, xgft3_lo, 0x11 ; swapped to hi | hi
-       vperm2i128 xgft3_lo, xgft3_lo, xgft3_lo, 0x00 ; swapped to lo | lo
-
-       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-
-       ; dest1
-       vpshufb xtmph1, xgft1_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xtmpl1, xgft1_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xtmph1, xtmph1, xtmpl1          ;GF add high and low partials
-       vpand   xtmph1, xtmph1, xtmpl3
-       vpxor   xd1, xd1, xtmph1                ;xd1 += partial
-
-       ; dest2
-       vpshufb xtmph2, xtmph2, x0              ;Lookup mul table of high nibble
-       vpshufb xgft2_lo, xgft2_lo, xtmpa       ;Lookup mul table of low nibble
-       vpxor   xtmph2, xtmph2, xgft2_lo        ;GF add high and low partials
-       vpand   xtmph2, xtmph2, xtmpl3
-       vpxor   xd2, xd2, xtmph2                ;xd2 += partial
-
-       ; dest3
-       vpshufb xtmph3, xtmph3, x0              ;Lookup mul table of high nibble
-       vpshufb xgft3_lo, xgft3_lo, xtmpa       ;Lookup mul table of low nibble
-       vpxor   xtmph3, xtmph3, xgft3_lo        ;GF add high and low partials
-       vpand   xtmph3, xtmph3, xtmpl3
-       vpxor   xd3, xd3, xtmph3                ;xd3 += partial
-
-       XSTR    [dest1+tmp], xd1
-       XSTR    [dest2+tmp], xd2
-       XSTR    [dest3+tmp], xd3
-
-.return_pass:
-       mov     return, 0
-       FUNC_RESTORE
-       ret
-
-.return_fail:
-       mov     return, 1
-       FUNC_RESTORE
-       ret
-
-endproc_frame
-
-section .data
-
-align 32
-constip32:
-       ddq 0xf0f1f2f3f4f5f6f7f8f9fafbfcfdfeff
-       ddq 0xe0e1e2e3e4e5e6e7e8e9eaebecedeeef
-
-;;;       func              core, ver, snum
-slversion gf_3vect_mad_avx2, 04,  01,  0208

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_mad_sse.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_mad_sse.asm.s
deleted file mode 100644 (file)
index a06eb3d..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_mad_sse.asm.s
+++ /dev/null
@@ -1,298 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_3vect_mad_sse(len, vec, vec_i, mul_array, src, dest);
-;;;
-
-%include "reg_sizes.asm"
-
-%define PS 8
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0  rcx
- %define arg0.w ecx
- %define arg1  rdx
- %define arg2  r8
- %define arg3  r9
- %define arg4  r12
- %define arg5  r15
- %define tmp   r11
- %define return rax
- %define return.w eax
- %define stack_size 16*10 + 3*8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
- %define func(x) proc_frame x
-
-%macro FUNC_SAVE 0
-       sub     rsp, stack_size
-       movdqa  [rsp+16*0],xmm6
-       movdqa  [rsp+16*1],xmm7
-       movdqa  [rsp+16*2],xmm8
-       movdqa  [rsp+16*3],xmm9
-       movdqa  [rsp+16*4],xmm10
-       movdqa  [rsp+16*5],xmm11
-       movdqa  [rsp+16*6],xmm12
-       movdqa  [rsp+16*7],xmm13
-       movdqa  [rsp+16*8],xmm14
-       movdqa  [rsp+16*9],xmm15
-       save_reg        r12,  10*16 + 0*8
-       save_reg        r15,  10*16 + 1*8
-       end_prolog
-       mov     arg4, arg(4)
-       mov     arg5, arg(5)
-%endmacro
-
-%macro FUNC_RESTORE 0
-       movdqa  xmm6, [rsp+16*0]
-       movdqa  xmm7, [rsp+16*1]
-       movdqa  xmm8, [rsp+16*2]
-       movdqa  xmm9, [rsp+16*3]
-       movdqa  xmm10, [rsp+16*4]
-       movdqa  xmm11, [rsp+16*5]
-       movdqa  xmm12, [rsp+16*6]
-       movdqa  xmm13, [rsp+16*7]
-       movdqa  xmm14, [rsp+16*8]
-       movdqa  xmm15, [rsp+16*9]
-       mov     r12,  [rsp + 10*16 + 0*8]
-       mov     r15,  [rsp + 10*16 + 1*8]
-       add     rsp, stack_size
-%endmacro
-
-%elifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg0.w edi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
- %define tmp   r11
- %define return rax
- %define return.w eax
-
- %define func(x) x:
- %define FUNC_SAVE
- %define FUNC_RESTORE
-%endif
-
-;;; gf_3vect_mad_sse(len, vec, vec_i, mul_array, src, dest)
-%define len   arg0
-%define len.w arg0.w
-%define vec    arg1
-%define vec_i    arg2
-%define mul_array arg3
-%define        src   arg4
-%define dest1  arg5
-%define pos   return
-%define pos.w return.w
-
-%define dest2 mul_array
-%define dest3 vec_i
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR movdqu
- %define XSTR movdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR movdqa
-  %define XSTR movdqa
- %else
-  %define XLDR movntdqa
-  %define XSTR movntdq
- %endif
-%endif
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f  xmm15
-%define xgft1_lo  xmm14
-%define xgft1_hi  xmm13
-%define xgft2_lo  xmm12
-%define xgft2_hi  xmm11
-%define xgft3_lo  xmm10
-%define xgft3_hi  xmm9
-
-%define x0      xmm0
-%define xtmpa   xmm1
-%define xtmph1  xmm2
-%define xtmpl1  xmm3
-%define xtmph2  xmm4
-%define xtmpl2  xmm5
-%define xtmph3  xmm6
-%define xtmpl3  xmm7
-%define xd1     xmm8
-%define xd2     xtmpl1
-%define xd3     xtmph1
-
-align 16
-global gf_3vect_mad_sse:function
-func(gf_3vect_mad_sse)
-       FUNC_SAVE
-       sub     len, 16
-       jl      .return_fail
-       xor     pos, pos
-       movdqa  xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-       sal     vec_i, 5                ;Multiply by 32
-       sal     vec, 5
-       lea     tmp, [mul_array + vec_i]
-
-       movdqu  xgft1_lo, [tmp]         ;Load array Ax{00}, Ax{01}, Ax{02}, ...
-       movdqu  xgft1_hi, [tmp+16]      ; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
-       movdqu  xgft2_lo, [tmp+vec]     ;Load array Bx{00}, Bx{01}, Bx{02}, ...
-       movdqu  xgft2_hi, [tmp+vec+16]  ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
-       movdqu  xgft3_lo, [tmp+2*vec]   ;Load array Cx{00}, Cx{01}, Cx{02}, ...
-       movdqu  xgft3_hi, [tmp+2*vec+16]        ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
-       mov     dest2, [dest1+PS]       ; reuse mul_array
-       mov     dest3, [dest1+2*PS]     ; reuse vec_i
-       mov     dest1, [dest1]
-
-.loop16:
-       XLDR    x0, [src+pos]           ;Get next source vector
-       movdqa  xtmph1, xgft1_hi        ;Reload const array registers
-       movdqa  xtmpl1, xgft1_lo
-       movdqa  xtmph2, xgft2_hi        ;Reload const array registers
-       movdqa  xtmpl2, xgft2_lo
-       movdqa  xtmph3, xgft3_hi        ;Reload const array registers
-       movdqa  xtmpl3, xgft3_lo
-
-       XLDR    xd1, [dest1+pos]        ;Get next dest vector
-
-       movdqa  xtmpa, x0               ;Keep unshifted copy of src
-       psraw   x0, 4                   ;Shift to put high nibble into bits 4-0
-       pand    x0, xmask0f             ;Mask high src nibble in bits 4-0
-       pand    xtmpa, xmask0f          ;Mask low src nibble in bits 4-0
-
-       ; dest1
-       pshufb  xtmph1, x0              ;Lookup mul table of high nibble
-       pshufb  xtmpl1, xtmpa           ;Lookup mul table of low nibble
-       pxor    xtmph1, xtmpl1          ;GF add high and low partials
-       pxor    xd1, xtmph1
-
-       XLDR    xd2, [dest2+pos]        ;reuse xtmpl1. Get next dest vector
-       XLDR    xd3, [dest3+pos]        ;reuse xtmph1. Get next dest vector
-
-       ; dest2
-       pshufb  xtmph2, x0              ;Lookup mul table of high nibble
-       pshufb  xtmpl2, xtmpa           ;Lookup mul table of low nibble
-       pxor    xtmph2, xtmpl2          ;GF add high and low partials
-       pxor    xd2, xtmph2
-
-       ; dest3
-       pshufb  xtmph3, x0              ;Lookup mul table of high nibble
-       pshufb  xtmpl3, xtmpa           ;Lookup mul table of low nibble
-       pxor    xtmph3, xtmpl3          ;GF add high and low partials
-       pxor    xd3, xtmph3
-
-       XSTR    [dest1+pos], xd1        ;Store result
-       XSTR    [dest2+pos], xd2        ;Store result
-       XSTR    [dest3+pos], xd3        ;Store result
-
-       add     pos, 16                 ;Loop on 16 bytes at a time
-       cmp     pos, len
-       jle     .loop16
-
-       lea     tmp, [len + 16]
-       cmp     pos, tmp
-       je      .return_pass
-
-.lessthan16:
-       ;; Tail len
-       ;; Do one more overlap pass
-       mov     tmp, len                ;Overlapped offset length-16
-
-       XLDR    x0, [src+tmp]           ;Get next source vector
-       XLDR    xd1, [dest1+tmp]        ;Get next dest vector
-       XLDR    xd2, [dest2+tmp]        ;reuse xtmpl1. Get next dest vector
-       XLDR    xd3, [dest3+tmp]        ;reuse xtmph1. Get next dest vector
-
-       sub     len, pos
-
-       movdqa  xtmph3, [constip16]     ;Load const of i + 16
-       pinsrb  xtmpl3, len.w, 15
-       pshufb  xtmpl3, xmask0f         ;Broadcast len to all bytes
-       pcmpgtb xtmpl3, xtmph3
-
-       movdqa  xtmpa, x0               ;Keep unshifted copy of src
-       psraw   x0, 4                   ;Shift to put high nibble into bits 4-0
-       pand    x0, xmask0f             ;Mask high src nibble in bits 4-0
-       pand    xtmpa, xmask0f          ;Mask low src nibble in bits 4-0
-
-       ; dest1
-       pshufb  xgft1_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft1_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft1_hi, xgft1_lo      ;GF add high and low partials
-       pand    xgft1_hi, xtmpl3
-       pxor    xd1, xgft1_hi
-
-       ; dest2
-       pshufb  xgft2_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft2_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft2_hi, xgft2_lo      ;GF add high and low partials
-       pand    xgft2_hi, xtmpl3
-       pxor    xd2, xgft2_hi
-
-       ; dest3
-       pshufb  xgft3_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft3_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft3_hi, xgft3_lo      ;GF add high and low partials
-       pand    xgft3_hi, xtmpl3
-       pxor    xd3, xgft3_hi
-
-       XSTR    [dest1+tmp], xd1        ;Store result
-       XSTR    [dest2+tmp], xd2        ;Store result
-       XSTR    [dest3+tmp], xd3        ;Store result
-
-.return_pass:
-       FUNC_RESTORE
-       mov     return, 0
-       ret
-
-.return_fail:
-       FUNC_RESTORE
-       mov     return, 1
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-
-mask0f:
-       ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-constip16:
-       ddq 0xf0f1f2f3f4f5f6f7f8f9fafbfcfdfeff
-
-;;;       func             core, ver, snum
-slversion gf_3vect_mad_sse, 00,  01,  0206

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_dot_prod_avx.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_dot_prod_avx.asm.s
deleted file mode 100644 (file)
index 9863012..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_dot_prod_avx.asm.s
+++ /dev/null
@@ -1,441 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_4vect_dot_prod_avx(len, vec, *g_tbls, **buffs, **dests);
-;;;
-
-%include "reg_sizes.asm"
-
-%ifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
-
- %define tmp   r11
- %define tmp2  r10
- %define tmp3  r13             ; must be saved and restored
- %define tmp4  r12             ; must be saved and restored
- %define tmp5  r14             ; must be saved and restored
- %define tmp6  r15             ; must be saved and restored
- %define return rax
- %macro  SLDR   2
- %endmacro
- %define SSTR   SLDR
- %define PS     8
- %define LOG_PS 3
-
- %define func(x) x:
- %macro FUNC_SAVE 0
-       push    r12
-       push    r13
-       push    r14
-       push    r15
- %endmacro
- %macro FUNC_RESTORE 0
-       pop     r15
-       pop     r14
-       pop     r13
-       pop     r12
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0   rcx
- %define arg1   rdx
- %define arg2   r8
- %define arg3   r9
-
- %define arg4   r12            ; must be saved, loaded and restored
- %define arg5   r15            ; must be saved and restored
- %define tmp    r11
- %define tmp2   r10
- %define tmp3   r13            ; must be saved and restored
- %define tmp4   r14            ; must be saved and restored
- %define tmp5   rdi            ; must be saved and restored
- %define tmp6   rsi            ; must be saved and restored
- %define return rax
- %macro  SLDR   2
- %endmacro
- %define SSTR   SLDR
- %define PS     8
- %define LOG_PS 3
- %define stack_size  9*16 + 7*8                ; must be an odd multiple of 8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
-
- %define func(x) proc_frame x
- %macro FUNC_SAVE 0
-       alloc_stack     stack_size
-       save_xmm128     xmm6, 0*16
-       save_xmm128     xmm7, 1*16
-       save_xmm128     xmm8, 2*16
-       save_xmm128     xmm9, 3*16
-       save_xmm128     xmm10, 4*16
-       save_xmm128     xmm11, 5*16
-       save_xmm128     xmm12, 6*16
-       save_xmm128     xmm13, 7*16
-       save_xmm128     xmm14, 8*16
-       save_reg        r12,  9*16 + 0*8
-       save_reg        r13,  9*16 + 1*8
-       save_reg        r14,  9*16 + 2*8
-       save_reg        r15,  9*16 + 3*8
-       save_reg        rdi,  9*16 + 4*8
-       save_reg        rsi,  9*16 + 5*8
-       end_prolog
-       mov     arg4, arg(4)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       vmovdqa xmm6, [rsp + 0*16]
-       vmovdqa xmm7, [rsp + 1*16]
-       vmovdqa xmm8, [rsp + 2*16]
-       vmovdqa xmm9, [rsp + 3*16]
-       vmovdqa xmm10, [rsp + 4*16]
-       vmovdqa xmm11, [rsp + 5*16]
-       vmovdqa xmm12, [rsp + 6*16]
-       vmovdqa xmm13, [rsp + 7*16]
-       vmovdqa xmm14, [rsp + 8*16]
-       mov     r12,  [rsp + 9*16 + 0*8]
-       mov     r13,  [rsp + 9*16 + 1*8]
-       mov     r14,  [rsp + 9*16 + 2*8]
-       mov     r15,  [rsp + 9*16 + 3*8]
-       mov     rdi,  [rsp + 9*16 + 4*8]
-       mov     rsi,  [rsp + 9*16 + 5*8]
-       add     rsp, stack_size
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, elf32
-
-;;;================== High Address;
-;;;    arg4
-;;;    arg3
-;;;    arg2
-;;;    arg1
-;;;    arg0
-;;;    return
-;;;<================= esp of caller
-;;;    ebp
-;;;<================= ebp = esp
-;;;    var0
-;;;    var1
-;;;    var2
-;;;    var3
-;;;    esi
-;;;    edi
-;;;    ebx
-;;;<================= esp of callee
-;;;
-;;;================== Low Address;
-
- %define PS     4
- %define LOG_PS 2
- %define func(x) x:
- %define arg(x) [ebp + PS*2 + PS*x]
- %define var(x) [ebp - PS - PS*x]
-
- %define trans  ecx
- %define trans2  esi
- %define arg0   trans          ;trans and trans2 are for the variables in stack
- %define arg0_m         arg(0)
- %define arg1   ebx
- %define arg2   arg2_m
- %define arg2_m         arg(2)
- %define arg3   trans
- %define arg3_m         arg(3)
- %define arg4   trans
- %define arg4_m         arg(4)
- %define arg5   trans2
- %define tmp    edx
- %define tmp2   edi
- %define tmp3   trans2
- %define tmp3_m         var(0)
- %define tmp4   trans2
- %define tmp4_m         var(1)
- %define tmp5   trans2
- %define tmp5_m         var(2)
- %define tmp6   trans2
- %define tmp6_m         var(3)
- %define return         eax
- %macro SLDR 2                         ;stack load/restore
-       mov %1, %2
- %endmacro
- %define SSTR SLDR
-
- %macro FUNC_SAVE 0
-       push    ebp
-       mov     ebp, esp
-       sub     esp, PS*4               ;4 local variables
-       push    esi
-       push    edi
-       push    ebx
-       mov     arg1, arg(1)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       pop     ebx
-       pop     edi
-       pop     esi
-       add     esp, PS*4               ;4 local variables
-       pop     ebp
- %endmacro
-
-%endif ; output formats
-
-%define len    arg0
-%define vec    arg1
-%define mul_array arg2
-%define        src    arg3
-%define dest1  arg4
-%define ptr    arg5
-%define vec_i  tmp2
-%define dest2  tmp3
-%define dest3  tmp4
-%define dest4  tmp5
-%define vskip3 tmp6
-%define pos    return
-
- %ifidn PS,4                           ;32-bit code
-       %define  len_m  arg0_m
-       %define  src_m  arg3_m
-       %define  dest1_m arg4_m
-       %define  dest2_m tmp3_m
-       %define  dest3_m tmp4_m
-       %define  dest4_m tmp5_m
-       %define  vskip3_m tmp6_m
- %endif
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR vmovdqu
- %define XSTR vmovdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR vmovdqa
-  %define XSTR vmovdqa
- %else
-  %define XLDR vmovntdqa
-  %define XSTR vmovntdq
- %endif
-%endif
-
-%ifidn PS,8                            ; 64-bit code
- default rel
-  [bits 64]
-%endif
-
-
-section .text
-
-%ifidn PS,8                            ;64-bit code
- %define xmask0f   xmm14
- %define xgft1_lo  xmm13
- %define xgft1_hi  xmm12
- %define xgft2_lo  xmm11
- %define xgft2_hi  xmm10
- %define xgft3_lo  xmm9
- %define xgft3_hi  xmm8
- %define xgft4_lo  xmm7
- %define xgft4_hi  xmm6
-
- %define x0     xmm0
- %define xtmpa  xmm1
- %define xp1    xmm2
- %define xp2    xmm3
- %define xp3    xmm4
- %define xp4    xmm5
-%else
- %define xmm_trans xmm7                        ;reuse xmask0f and xgft1_lo
- %define xmask0f   xmm_trans
- %define xgft1_lo  xmm_trans
- %define xgft1_hi  xmm6
- %define xgft2_lo  xgft1_lo
- %define xgft2_hi  xgft1_hi
- %define xgft3_lo  xgft1_lo
- %define xgft3_hi  xgft1_hi
- %define xgft4_lo  xgft1_lo
- %define xgft4_hi  xgft1_hi
-
- %define x0     xmm0
- %define xtmpa  xmm1
- %define xp1    xmm2
- %define xp2    xmm3
- %define xp3    xmm4
- %define xp4    xmm5
-%endif
-align 16
-global gf_4vect_dot_prod_avx:function
-func(gf_4vect_dot_prod_avx)
-       FUNC_SAVE
-       SLDR    len, len_m
-       sub     len, 16
-       SSTR    len_m, len
-       jl      .return_fail
-       xor     pos, pos
-       vmovdqa xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-       mov     vskip3, vec
-       imul    vskip3, 96
-       SSTR    vskip3_m, vskip3
-       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
-       SLDR    dest1, dest1_m
-       mov     dest2, [dest1+PS]
-       SSTR    dest2_m, dest2
-       mov     dest3, [dest1+2*PS]
-       SSTR    dest3_m, dest3
-       mov     dest4, [dest1+3*PS]
-       SSTR    dest4_m, dest4
-       mov     dest1, [dest1]
-       SSTR    dest1_m, dest1
-
-.loop16:
-       vpxor   xp1, xp1
-       vpxor   xp2, xp2
-       vpxor   xp3, xp3
-       vpxor   xp4, xp4
-       mov     tmp, mul_array
-       xor     vec_i, vec_i
-
-.next_vect:
-       SLDR    src, src_m
-       mov     ptr, [src+vec_i]
-
- %ifidn PS,8                           ;64-bit code
-       vmovdqu xgft1_lo, [tmp]                 ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
-       vmovdqu xgft1_hi, [tmp+16]              ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
-       vmovdqu xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-       vmovdqu xgft2_hi, [tmp+vec*(32/PS)+16]  ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
-       vmovdqu xgft3_lo, [tmp+vec*(64/PS)]     ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
-       vmovdqu xgft3_hi, [tmp+vec*(64/PS)+16]  ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
-       vmovdqu xgft4_lo, [tmp+vskip3]          ;Load array Dx{00}, Dx{01}, ..., Dx{0f}
-       vmovdqu xgft4_hi, [tmp+vskip3+16]       ;     "     Dx{00}, Dx{10}, ..., Dx{f0}
-
-       XLDR    x0,     [ptr+pos]       ;Get next source vector
-       add     tmp, 32
-       add     vec_i, PS
-
-       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
- %else                                 ;32-bit code
-       XLDR    x0, [ptr+pos]           ;Get next source vector
-       vmovdqa xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-
-       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-
-       vmovdqu xgft1_lo, [tmp]                 ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
-       vmovdqu xgft1_hi, [tmp+16]              ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
- %endif
-
-       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
-       vpxor   xp1, xgft1_hi           ;xp1 += partial
-
- %ifidn PS,4                           ;32-bit code
-       vmovdqu xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-       vmovdqu xgft2_hi, [tmp+vec*(32/PS)+16]  ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
- %endif
-       vpshufb xgft2_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft2_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft2_hi, xgft2_lo      ;GF add high and low partials
-       vpxor   xp2, xgft2_hi           ;xp2 += partial
-
- %ifidn PS,4                           ;32-bit code
-       sal     vec, 1
-       vmovdqu xgft3_lo, [tmp+vec*(32/PS)]     ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
-       vmovdqu xgft3_hi, [tmp+vec*(32/PS)+16]  ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
-       sar     vec, 1
- %endif
-       vpshufb xgft3_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft3_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft3_hi, xgft3_lo      ;GF add high and low partials
-       vpxor   xp3, xgft3_hi           ;xp3 += partial
-
- %ifidn PS,4                           ;32-bit code
-       SLDR    vskip3, vskip3_m
-       vmovdqu xgft4_lo, [tmp+vskip3]          ;Load array Dx{00}, Dx{01}, ..., Dx{0f}
-       vmovdqu xgft4_hi, [tmp+vskip3+16]       ;     "     Dx{00}, Dx{10}, ..., Dx{f0}
-       add     tmp, 32
-       add     vec_i, PS
- %endif
-       vpshufb xgft4_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft4_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft4_hi, xgft4_lo      ;GF add high and low partials
-       vpxor   xp4, xgft4_hi           ;xp4 += partial
-
-       cmp     vec_i, vec
-       jl      .next_vect
-
-       SLDR    dest1, dest1_m
-       SLDR    dest2, dest2_m
-       XSTR    [dest1+pos], xp1
-       XSTR    [dest2+pos], xp2
-       SLDR    dest3, dest3_m
-       XSTR    [dest3+pos], xp3
-       SLDR    dest4, dest4_m
-       XSTR    [dest4+pos], xp4
-
-       SLDR    len, len_m
-       add     pos, 16                 ;Loop on 16 bytes at a time
-       cmp     pos, len
-       jle     .loop16
-
-       lea     tmp, [len + 16]
-       cmp     pos, tmp
-       je      .return_pass
-
-       ;; Tail len
-       mov     pos, len        ;Overlapped offset length-16
-       jmp     .loop16         ;Do one more overlap pass
-
-.return_pass:
-       mov     return, 0
-       FUNC_RESTORE
-       ret
-
-.return_fail:
-       mov     return, 1
-       FUNC_RESTORE
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-mask0f:        ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-
-;;;       func                  core, ver, snum
-slversion gf_4vect_dot_prod_avx, 02,  05,  0193

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_dot_prod_avx2.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_dot_prod_avx2.asm.s
deleted file mode 100644 (file)
index 95aa8eb..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_dot_prod_avx2.asm.s
+++ /dev/null
@@ -1,460 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_4vect_dot_prod_avx2(len, vec, *g_tbls, **buffs, **dests);
-;;;
-
-%include "reg_sizes.asm"
-
-%ifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
-
- %define tmp   r11
- %define tmp.w r11d
- %define tmp.b r11b
- %define tmp2  r10
- %define tmp3  r13             ; must be saved and restored
- %define tmp4  r12             ; must be saved and restored
- %define tmp5  r14             ; must be saved and restored
- %define tmp6  r15             ; must be saved and restored
- %define return rax
- %macro  SLDR   2
- %endmacro
- %define SSTR   SLDR
- %define PS     8
- %define LOG_PS 3
-
- %define func(x) x:
- %macro FUNC_SAVE 0
-       push    r12
-       push    r13
-       push    r14
-       push    r15
- %endmacro
- %macro FUNC_RESTORE 0
-       pop     r15
-       pop     r14
-       pop     r13
-       pop     r12
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0   rcx
- %define arg1   rdx
- %define arg2   r8
- %define arg3   r9
-
- %define arg4   r12            ; must be saved, loaded and restored
- %define arg5   r15            ; must be saved and restored
- %define tmp    r11
- %define tmp.w  r11d
- %define tmp.b  r11b
- %define tmp2   r10
- %define tmp3   r13            ; must be saved and restored
- %define tmp4   r14            ; must be saved and restored
- %define tmp5   rdi            ; must be saved and restored
- %define tmp6   rsi            ; must be saved and restored
- %define return rax
- %macro  SLDR   2
- %endmacro
- %define SSTR   SLDR
- %define PS     8
- %define LOG_PS 3
- %define stack_size  9*16 + 7*8                ; must be an odd multiple of 8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
-
- %define func(x) proc_frame x
- %macro FUNC_SAVE 0
-       alloc_stack     stack_size
-       vmovdqa [rsp + 0*16], xmm6
-       vmovdqa [rsp + 1*16], xmm7
-       vmovdqa [rsp + 2*16], xmm8
-       vmovdqa [rsp + 3*16], xmm9
-       vmovdqa [rsp + 4*16], xmm10
-       vmovdqa [rsp + 5*16], xmm11
-       vmovdqa [rsp + 6*16], xmm12
-       vmovdqa [rsp + 7*16], xmm13
-       vmovdqa [rsp + 8*16], xmm14
-       save_reg        r12,  9*16 + 0*8
-       save_reg        r13,  9*16 + 1*8
-       save_reg        r14,  9*16 + 2*8
-       save_reg        r15,  9*16 + 3*8
-       save_reg        rdi,  9*16 + 4*8
-       save_reg        rsi,  9*16 + 5*8
-       end_prolog
-       mov     arg4, arg(4)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       vmovdqa xmm6, [rsp + 0*16]
-       vmovdqa xmm7, [rsp + 1*16]
-       vmovdqa xmm8, [rsp + 2*16]
-       vmovdqa xmm9, [rsp + 3*16]
-       vmovdqa xmm10, [rsp + 4*16]
-       vmovdqa xmm11, [rsp + 5*16]
-       vmovdqa xmm12, [rsp + 6*16]
-       vmovdqa xmm13, [rsp + 7*16]
-       vmovdqa xmm14, [rsp + 8*16]
-       mov     r12,  [rsp + 9*16 + 0*8]
-       mov     r13,  [rsp + 9*16 + 1*8]
-       mov     r14,  [rsp + 9*16 + 2*8]
-       mov     r15,  [rsp + 9*16 + 3*8]
-       mov     rdi,  [rsp + 9*16 + 4*8]
-       mov     rsi,  [rsp + 9*16 + 5*8]
-       add     rsp, stack_size
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, elf32
-
-;;;================== High Address;
-;;;    arg4
-;;;    arg3
-;;;    arg2
-;;;    arg1
-;;;    arg0
-;;;    return
-;;;<================= esp of caller
-;;;    ebp
-;;;<================= ebp = esp
-;;;    var0
-;;;    var1
-;;;    var2
-;;;    var3
-;;;    esi
-;;;    edi
-;;;    ebx
-;;;<================= esp of callee
-;;;
-;;;================== Low Address;
-
- %define PS     4
- %define LOG_PS 2
- %define func(x) x:
- %define arg(x) [ebp + PS*2 + PS*x]
- %define var(x) [ebp - PS - PS*x]
-
- %define trans  ecx
- %define trans2  esi
- %define arg0   trans          ;trans and trans2 are for the variables in stack
- %define arg0_m         arg(0)
- %define arg1   ebx
- %define arg2   arg2_m
- %define arg2_m         arg(2)
- %define arg3   trans
- %define arg3_m         arg(3)
- %define arg4   trans
- %define arg4_m         arg(4)
- %define arg5   trans2
- %define tmp    edx
- %define tmp.w   edx
- %define tmp.b   dl
- %define tmp2   edi
- %define tmp3   trans2
- %define tmp3_m         var(0)
- %define tmp4   trans2
- %define tmp4_m         var(1)
- %define tmp5   trans2
- %define tmp5_m         var(2)
- %define tmp6   trans2
- %define tmp6_m         var(3)
- %define return         eax
- %macro SLDR 2                         ;stack load/restore
-       mov %1, %2
- %endmacro
- %define SSTR SLDR
-
- %macro FUNC_SAVE 0
-       push    ebp
-       mov     ebp, esp
-       sub     esp, PS*4               ;4 local variables
-       push    esi
-       push    edi
-       push    ebx
-       mov     arg1, arg(1)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       pop     ebx
-       pop     edi
-       pop     esi
-       add     esp, PS*4               ;4 local variables
-       pop     ebp
- %endmacro
-
-%endif ; output formats
-
-%define len    arg0
-%define vec    arg1
-%define mul_array arg2
-%define        src    arg3
-%define dest1  arg4
-%define ptr    arg5
-%define vec_i  tmp2
-%define dest2  tmp3
-%define dest3  tmp4
-%define dest4  tmp5
-%define vskip3 tmp6
-%define pos    return
-
- %ifidn PS,4                           ;32-bit code
-       %define  len_m  arg0_m
-       %define  src_m  arg3_m
-       %define  dest1_m arg4_m
-       %define  dest2_m tmp3_m
-       %define  dest3_m tmp4_m
-       %define  dest4_m tmp5_m
-       %define  vskip3_m tmp6_m
- %endif
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR vmovdqu
- %define XSTR vmovdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR vmovdqa
-  %define XSTR vmovdqa
- %else
-  %define XLDR vmovntdqa
-  %define XSTR vmovntdq
- %endif
-%endif
-
-%ifidn PS,8                            ;64-bit code
- default rel
-  [bits 64]
-%endif
-
-
-section .text
-
-%ifidn PS,8                            ;64-bit code
- %define xmask0f   ymm14
- %define xmask0fx  xmm14
- %define xgft1_lo  ymm13
- %define xgft1_hi  ymm12
- %define xgft2_lo  ymm11
- %define xgft2_hi  ymm10
- %define xgft3_lo  ymm9
- %define xgft3_hi  ymm8
- %define xgft4_lo  ymm7
- %define xgft4_hi  ymm6
-
- %define x0     ymm0
- %define xtmpa  ymm1
- %define xp1    ymm2
- %define xp2    ymm3
- %define xp3    ymm4
- %define xp4    ymm5
-%else
- %define ymm_trans ymm7                        ;reuse xmask0f and xgft1_hi
- %define xmask0f   ymm_trans
- %define xmask0fx  xmm7
- %define xgft1_lo  ymm6
- %define xgft1_hi  ymm_trans
- %define xgft2_lo  xgft1_lo
- %define xgft2_hi  xgft1_hi
- %define xgft3_lo  xgft1_lo
- %define xgft3_hi  xgft1_hi
- %define xgft4_lo  xgft1_lo
- %define xgft4_hi  xgft1_hi
-
- %define x0     ymm0
- %define xtmpa  ymm1
- %define xp1    ymm2
- %define xp2    ymm3
- %define xp3    ymm4
- %define xp4    ymm5
-%endif
-align 16
-global gf_4vect_dot_prod_avx2:function
-func(gf_4vect_dot_prod_avx2)
-       FUNC_SAVE
-       SLDR    len, len_m
-       sub     len, 32
-       SSTR    len_m, len
-       jl      .return_fail
-       xor     pos, pos
-       mov     tmp.b, 0x0f
-       vpinsrb xmask0fx, xmask0fx, tmp.w, 0
-       vpbroadcastb xmask0f, xmask0fx  ;Construct mask 0x0f0f0f...
-       mov     vskip3, vec
-       imul    vskip3, 96
-       SSTR    vskip3_m, vskip3
-       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
-       SLDR    dest1, dest1_m
-       mov     dest2, [dest1+PS]
-       SSTR    dest2_m, dest2
-       mov     dest3, [dest1+2*PS]
-       SSTR    dest3_m, dest3
-       mov     dest4, [dest1+3*PS]
-       SSTR    dest4_m, dest4
-       mov     dest1, [dest1]
-       SSTR    dest1_m, dest1
-
-.loop32:
-       vpxor   xp1, xp1
-       vpxor   xp2, xp2
-       vpxor   xp3, xp3
-       vpxor   xp4, xp4
-       mov     tmp, mul_array
-       xor     vec_i, vec_i
-
-.next_vect:
-       SLDR    src, src_m
-       mov     ptr, [src+vec_i]
-       XLDR    x0, [ptr+pos]           ;Get next source vector
-
-       add     vec_i, PS
- %ifidn PS,8                           ;64-bit code
-       vpand   xgft4_lo, x0, xmask0f   ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-       vperm2i128 xtmpa, xgft4_lo, x0, 0x30    ;swap xtmpa from 1lo|2lo to 1lo|2hi
-       vperm2i128 x0, xgft4_lo, x0, 0x12       ;swap x0 from    1hi|2hi to 1hi|2lo
-
-       vmovdqu xgft1_lo, [tmp]                 ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
-                                               ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
-       vmovdqu xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-                                               ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
-       vmovdqu xgft3_lo, [tmp+vec*(64/PS)]     ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
-                                               ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
-       vmovdqu xgft4_lo, [tmp+vskip3]          ;Load array Dx{00}, Dx{01}, ..., Dx{0f}
-                                               ;     "     Dx{00}, Dx{10}, ..., Dx{f0}
-
-       vperm2i128 xgft1_hi, xgft1_lo, xgft1_lo, 0x01 ; swapped to hi | lo
-       vperm2i128 xgft2_hi, xgft2_lo, xgft2_lo, 0x01 ; swapped to hi | lo
-       vperm2i128 xgft3_hi, xgft3_lo, xgft3_lo, 0x01 ; swapped to hi | lo
-       vperm2i128 xgft4_hi, xgft4_lo, xgft4_lo, 0x01 ; swapped to hi | lo
-       add     tmp, 32
- %else                                 ;32-bit code
-       mov     cl, 0x0f                ;use ecx as a temp variable
-       vpinsrb xmask0fx, xmask0fx, ecx, 0
-       vpbroadcastb xmask0f, xmask0fx  ;Construct mask 0x0f0f0f...
-
-       vpand   xgft4_lo, x0, xmask0f   ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-       vperm2i128 xtmpa, xgft4_lo, x0, 0x30    ;swap xtmpa from 1lo|2lo to 1lo|2hi
-       vperm2i128 x0, xgft4_lo, x0, 0x12       ;swap x0 from    1hi|2hi to 1hi|2lo
-
-       vmovdqu xgft1_lo, [tmp]                 ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
-                                               ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
-       vperm2i128 xgft1_hi, xgft1_lo, xgft1_lo, 0x01 ; swapped to hi | lo
- %endif
-
-       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
-       vpxor   xp1, xgft1_hi           ;xp1 += partial
-
- %ifidn PS,4                           ; 32-bit code
-       vmovdqu xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-                                               ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
-       vperm2i128 xgft2_hi, xgft2_lo, xgft2_lo, 0x01 ; swapped to hi | lo
- %endif
-       vpshufb xgft2_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft2_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft2_hi, xgft2_lo      ;GF add high and low partials
-       vpxor   xp2, xgft2_hi           ;xp2 += partial
-
- %ifidn PS,4                           ; 32-bit code
-       sal     vec, 1
-       vmovdqu xgft3_lo, [tmp+vec*(32/PS)]     ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
-                                               ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
-       vperm2i128 xgft3_hi, xgft3_lo, xgft3_lo, 0x01 ; swapped to hi | lo
-       sar     vec, 1
- %endif
-       vpshufb xgft3_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft3_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft3_hi, xgft3_lo      ;GF add high and low partials
-       vpxor   xp3, xgft3_hi           ;xp3 += partial
-
- %ifidn PS,4                           ; 32-bit code
-       SLDR    vskip3, vskip3_m
-       vmovdqu xgft4_lo, [tmp+vskip3]          ;Load array Dx{00}, Dx{01}, ..., Dx{0f}
-                                               ;     "     DX{00}, Dx{10}, ..., Dx{f0}
-       vperm2i128 xgft4_hi, xgft4_lo, xgft4_lo, 0x01 ; swapped to hi | lo
-       add     tmp, 32
- %endif
-       vpshufb xgft4_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft4_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft4_hi, xgft4_lo      ;GF add high and low partials
-       vpxor   xp4, xgft4_hi           ;xp4 += partial
-
-       cmp     vec_i, vec
-       jl      .next_vect
-
-       SLDR    dest1, dest1_m
-       SLDR    dest2, dest2_m
-       XSTR    [dest1+pos], xp1
-       XSTR    [dest2+pos], xp2
-       SLDR    dest3, dest3_m
-       XSTR    [dest3+pos], xp3
-       SLDR    dest4, dest4_m
-       XSTR    [dest4+pos], xp4
-
-       SLDR    len, len_m
-       add     pos, 32                 ;Loop on 32 bytes at a time
-       cmp     pos, len
-       jle     .loop32
-
-       lea     tmp, [len + 32]
-       cmp     pos, tmp
-       je      .return_pass
-
-       ;; Tail len
-       mov     pos, len        ;Overlapped offset length-32
-       jmp     .loop32         ;Do one more overlap pass
-
-.return_pass:
-       mov     return, 0
-       FUNC_RESTORE
-       ret
-
-.return_fail:
-       mov     return, 1
-       FUNC_RESTORE
-       ret
-
-endproc_frame
-
-section .data
-
-;;;       func                   core, ver, snum
-slversion gf_4vect_dot_prod_avx2, 04,  05,  0198

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_dot_prod_sse.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_dot_prod_sse.asm.s
deleted file mode 100644 (file)
index 2867cca..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_dot_prod_sse.asm.s
+++ /dev/null
@@ -1,443 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_4vect_dot_prod_sse(len, vec, *g_tbls, **buffs, **dests);
-;;;
-
-%include "reg_sizes.asm"
-
-%ifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
-
- %define tmp   r11
- %define tmp2  r10
- %define tmp3  r13             ; must be saved and restored
- %define tmp4  r12             ; must be saved and restored
- %define tmp5  r14             ; must be saved and restored
- %define tmp6  r15             ; must be saved and restored
- %define return rax
- %macro  SLDR   2
- %endmacro
- %define SSTR   SLDR
- %define PS     8
- %define LOG_PS 3
-
- %define func(x) x:
- %macro FUNC_SAVE 0
-       push    r12
-       push    r13
-       push    r14
-       push    r15
- %endmacro
- %macro FUNC_RESTORE 0
-       pop     r15
-       pop     r14
-       pop     r13
-       pop     r12
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0   rcx
- %define arg1   rdx
- %define arg2   r8
- %define arg3   r9
-
- %define arg4   r12            ; must be saved, loaded and restored
- %define arg5   r15            ; must be saved and restored
- %define tmp    r11
- %define tmp2   r10
- %define tmp3   r13            ; must be saved and restored
- %define tmp4   r14            ; must be saved and restored
- %define tmp5   rdi            ; must be saved and restored
- %define tmp6   rsi            ; must be saved and restored
- %define return rax
- %macro  SLDR   2
- %endmacro
- %define SSTR   SLDR
- %define PS     8
- %define LOG_PS 3
- %define stack_size  9*16 + 7*8                ; must be an odd multiple of 8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
-
- %define func(x) proc_frame x
- %macro FUNC_SAVE 0
-       alloc_stack     stack_size
-       save_xmm128     xmm6, 0*16
-       save_xmm128     xmm7, 1*16
-       save_xmm128     xmm8, 2*16
-       save_xmm128     xmm9, 3*16
-       save_xmm128     xmm10, 4*16
-       save_xmm128     xmm11, 5*16
-       save_xmm128     xmm12, 6*16
-       save_xmm128     xmm13, 7*16
-       save_xmm128     xmm14, 8*16
-       save_reg        r12,  9*16 + 0*8
-       save_reg        r13,  9*16 + 1*8
-       save_reg        r14,  9*16 + 2*8
-       save_reg        r15,  9*16 + 3*8
-       save_reg        rdi,  9*16 + 4*8
-       save_reg        rsi,  9*16 + 5*8
-       end_prolog
-       mov     arg4, arg(4)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       movdqa  xmm6, [rsp + 0*16]
-       movdqa  xmm7, [rsp + 1*16]
-       movdqa  xmm8, [rsp + 2*16]
-       movdqa  xmm9, [rsp + 3*16]
-       movdqa  xmm10, [rsp + 4*16]
-       movdqa  xmm11, [rsp + 5*16]
-       movdqa  xmm12, [rsp + 6*16]
-       movdqa  xmm13, [rsp + 7*16]
-       movdqa  xmm14, [rsp + 8*16]
-       mov     r12,  [rsp + 9*16 + 0*8]
-       mov     r13,  [rsp + 9*16 + 1*8]
-       mov     r14,  [rsp + 9*16 + 2*8]
-       mov     r15,  [rsp + 9*16 + 3*8]
-       mov     rdi,  [rsp + 9*16 + 4*8]
-       mov     rsi,  [rsp + 9*16 + 5*8]
-       add     rsp, stack_size
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, elf32
-
-;;;================== High Address;
-;;;    arg4
-;;;    arg3
-;;;    arg2
-;;;    arg1
-;;;    arg0
-;;;    return
-;;;<================= esp of caller
-;;;    ebp
-;;;<================= ebp = esp
-;;;    var0
-;;;    var1
-;;;    var2
-;;;    var3
-;;;    esi
-;;;    edi
-;;;    ebx
-;;;<================= esp of callee
-;;;
-;;;================== Low Address;
-
- %define PS     4
- %define LOG_PS 2
- %define func(x) x:
- %define arg(x) [ebp + PS*2 + PS*x]
- %define var(x) [ebp - PS - PS*x]
-
- %define trans  ecx
- %define trans2  esi
- %define arg0   trans          ;trans and trans2 are for the variables in stack
- %define arg0_m         arg(0)
- %define arg1   ebx
- %define arg2   arg2_m
- %define arg2_m         arg(2)
- %define arg3   trans
- %define arg3_m         arg(3)
- %define arg4   trans
- %define arg4_m         arg(4)
- %define arg5   trans2
- %define tmp    edx
- %define tmp2   edi
- %define tmp3   trans2
- %define tmp3_m         var(0)
- %define tmp4   trans2
- %define tmp4_m         var(1)
- %define tmp5   trans2
- %define tmp5_m         var(2)
- %define tmp6   trans2
- %define tmp6_m         var(3)
- %define return         eax
- %macro SLDR 2                         ;stack load/restore
-       mov %1, %2
- %endmacro
- %define SSTR SLDR
-
- %macro FUNC_SAVE 0
-       push    ebp
-       mov     ebp, esp
-       sub     esp, PS*4               ;4 local variables
-       push    esi
-       push    edi
-       push    ebx
-       mov     arg1, arg(1)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       pop     ebx
-       pop     edi
-       pop     esi
-       add     esp, PS*4               ;4 local variables
-       pop     ebp
- %endmacro
-
-%endif ; output formats
-
-%define len    arg0
-%define vec    arg1
-%define mul_array arg2
-%define        src    arg3
-%define dest1  arg4
-%define ptr    arg5
-%define vec_i  tmp2
-%define dest2  tmp3
-%define dest3  tmp4
-%define dest4  tmp5
-%define vskip3 tmp6
-%define pos    return
-
- %ifidn PS,4                           ;32-bit code
-       %define  len_m  arg0_m
-       %define  src_m  arg3_m
-       %define  dest1_m arg4_m
-       %define  dest2_m tmp3_m
-       %define  dest3_m tmp4_m
-       %define  dest4_m tmp5_m
-       %define  vskip3_m tmp6_m
- %endif
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR movdqu
- %define XSTR movdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR movdqa
-  %define XSTR movdqa
- %else
-  %define XLDR movntdqa
-  %define XSTR movntdq
- %endif
-%endif
-
-%ifidn PS,8                            ; 64-bit code
- default rel
-  [bits 64]
-%endif
-
-
-section .text
-
-%ifidn PS,8                            ;64-bit code
- %define xmask0f   xmm14
- %define xgft1_lo  xmm2
- %define xgft1_hi  xmm3
- %define xgft2_lo  xmm11
- %define xgft2_hi  xmm4
- %define xgft3_lo  xmm9
- %define xgft3_hi  xmm5
- %define xgft4_lo  xmm7
- %define xgft4_hi  xmm6
-
- %define x0     xmm0
- %define xtmpa  xmm1
- %define xp1    xmm8
- %define xp2    xmm10
- %define xp3    xmm12
- %define xp4    xmm13
-%else
- %define xmm_trans xmm7                        ;reuse xmask0f and xgft1_lo
- %define xmask0f   xmm_trans
- %define xgft1_lo  xmm_trans
- %define xgft1_hi  xmm6
- %define xgft2_lo  xgft1_lo
- %define xgft2_hi  xgft1_hi
- %define xgft3_lo  xgft1_lo
- %define xgft3_hi  xgft1_hi
- %define xgft4_lo  xgft1_lo
- %define xgft4_hi  xgft1_hi
-
- %define x0     xmm0
- %define xtmpa  xmm1
- %define xp1    xmm2
- %define xp2    xmm3
- %define xp3    xmm4
- %define xp4    xmm5
-%endif
-align 16
-global gf_4vect_dot_prod_sse:function
-func(gf_4vect_dot_prod_sse)
-       FUNC_SAVE
-       SLDR    len, len_m
-       sub     len, 16
-       SSTR    len_m, len
-       jl      .return_fail
-       xor     pos, pos
-       movdqa  xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-       mov     vskip3,  vec
-       imul    vskip3,  96
-       SSTR    vskip3_m, vskip3
-       sal     vec,     LOG_PS         ;vec *= PS. Make vec_i count by PS
-       SLDR    dest1,   dest1_m
-       mov     dest2,   [dest1+PS]
-       SSTR    dest2_m, dest2
-       mov     dest3,   [dest1+2*PS]
-       SSTR    dest3_m, dest3
-       mov     dest4,   [dest1+3*PS]
-       SSTR    dest4_m, dest4
-       mov     dest1,   [dest1]
-       SSTR    dest1_m, dest1
-
-.loop16:
-       pxor    xp1, xp1
-       pxor    xp2, xp2
-       pxor    xp3, xp3
-       pxor    xp4, xp4
-       mov     tmp, mul_array
-       xor     vec_i, vec_i
-
-.next_vect:
-       SLDR    src, src_m
-       mov     ptr, [src+vec_i]
-
- %ifidn PS,8                           ;64-bit code
-       movdqu  xgft1_lo, [tmp]                 ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
-       movdqu  xgft1_hi, [tmp+16]              ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
-       movdqu  xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-       movdqu  xgft2_hi, [tmp+vec*(32/PS)+16]  ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
-       movdqu  xgft3_lo, [tmp+vec*(64/PS)]     ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
-       movdqu  xgft3_hi, [tmp+vec*(64/PS)+16]  ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
-       movdqu  xgft4_lo, [tmp+vskip3]          ;Load array Dx{00}, Dx{01}, ..., Dx{0f}
-       movdqu  xgft4_hi, [tmp+vskip3+16]       ;     "     Dx{00}, Dx{10}, ..., Dx{f0}
-
-       XLDR    x0,     [ptr+pos]       ;Get next source vector
-       add     tmp,    32
-       add     vec_i,  PS
-
-       movdqa  xtmpa, x0               ;Keep unshifted copy of src
-       psraw   x0, 4                   ;Shift to put high nibble into bits 4-0
-       pand    x0, xmask0f             ;Mask high src nibble in bits 4-0
-       pand    xtmpa,  xmask0f         ;Mask low src nibble in bits 4-0
- %else                                 ;32-bit code
-       XLDR    x0,      [ptr+pos]      ;Get next source vector
-       movdqa  xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-
-       movdqa  xtmpa,  x0              ;Keep unshifted copy of src
-       psraw   x0,     4               ;Shift to put high nibble into bits 4-0
-       pand    x0,     xmask0f         ;Mask high src nibble in bits 4-0
-       pand    xtmpa, xmask0f          ;Mask low src nibble in bits 4-0
-
-       movdqu  xgft1_lo, [tmp]                 ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
-       movdqu  xgft1_hi, [tmp+16]              ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
- %endif
-
-       pshufb  xgft1_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft1_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft1_hi, xgft1_lo      ;GF add high and low partials
-       pxor    xp1, xgft1_hi           ;xp1 += partial
-
- %ifidn PS,4                           ;32-bit code
-       movdqu  xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-       movdqu  xgft2_hi, [tmp+vec*(32/PS)+16]  ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
- %endif
-       pshufb  xgft2_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft2_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft2_hi, xgft2_lo      ;GF add high and low partials
-       pxor    xp2, xgft2_hi           ;xp2 += partial
-
- %ifidn PS,4                           ;32-bit code
-       sal     vec, 1
-       movdqu  xgft3_lo, [tmp+vec*(32/PS)]     ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
-       movdqu  xgft3_hi, [tmp+vec*(32/PS)+16]  ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
-       sar     vec, 1
- %endif
-       pshufb  xgft3_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft3_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft3_hi, xgft3_lo      ;GF add high and low partials
-       pxor    xp3, xgft3_hi           ;xp3 += partial
-
- %ifidn PS,4                           ;32-bit code
-       SLDR    vskip3, vskip3_m
-       movdqu  xgft4_lo, [tmp+vskip3]          ;Load array Dx{00}, Dx{01}, ..., Dx{0f}
-       movdqu  xgft4_hi, [tmp+vskip3+16]       ;     "     Dx{00}, Dx{10}, ..., Dx{f0}
-       add     tmp, 32
-       add     vec_i, PS
- %endif
-       pshufb  xgft4_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft4_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft4_hi, xgft4_lo      ;GF add high and low partials
-       pxor    xp4, xgft4_hi           ;xp4 += partial
-
-       cmp     vec_i, vec
-       jl      .next_vect
-
-       SLDR    dest1, dest1_m
-       SLDR    dest2, dest2_m
-       XSTR    [dest1+pos], xp1
-       XSTR    [dest2+pos], xp2
-       SLDR    dest3, dest3_m
-       XSTR    [dest3+pos], xp3
-       SLDR    dest4, dest4_m
-       XSTR    [dest4+pos], xp4
-
-       SLDR    len, len_m
-       add     pos, 16                 ;Loop on 16 bytes at a time
-       cmp     pos, len
-       jle     .loop16
-
-       lea     tmp, [len + 16]
-       cmp     pos, tmp
-       je      .return_pass
-
-       ;; Tail len
-       mov     pos, len        ;Overlapped offset length-16
-       jmp     .loop16         ;Do one more overlap pass
-
-.return_pass:
-       mov     return, 0
-       FUNC_RESTORE
-       ret
-
-.return_fail:
-       mov     return, 1
-       FUNC_RESTORE
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-mask0f:        ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-
-;;;       func                  core, ver, snum
-slversion gf_4vect_dot_prod_sse, 00,  06,  0064

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_mad_avx.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_mad_avx.asm.s
deleted file mode 100644 (file)
index 5b28916..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_mad_avx.asm.s
+++ /dev/null
@@ -1,336 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_4vect_mad_avx(len, vec, vec_i, mul_array, src, dest);
-;;;
-
-%include "reg_sizes.asm"
-
-%define PS 8
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0  rcx
- %define arg0.w ecx
- %define arg1  rdx
- %define arg2  r8
- %define arg3  r9
- %define arg4  r12
- %define arg5  r15
- %define tmp   r11
- %define tmp2   r10
- %define tmp3   r13
- %define return rax
- %define return.w eax
- %define stack_size 16*10 + 3*8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
- %define func(x) proc_frame x
-
-%macro FUNC_SAVE 0
-       sub     rsp, stack_size
-       movdqa  [rsp+16*0],xmm6
-       movdqa  [rsp+16*1],xmm7
-       movdqa  [rsp+16*2],xmm8
-       movdqa  [rsp+16*3],xmm9
-       movdqa  [rsp+16*4],xmm10
-       movdqa  [rsp+16*5],xmm11
-       movdqa  [rsp+16*6],xmm12
-       movdqa  [rsp+16*7],xmm13
-       movdqa  [rsp+16*8],xmm14
-       movdqa  [rsp+16*9],xmm15
-       save_reg        r12,  10*16 + 0*8
-       save_reg        r13,  10*16 + 1*8
-       save_reg        r15,  10*16 + 2*8
-       end_prolog
-       mov     arg4, arg(4)
-       mov     arg5, arg(5)
-%endmacro
-
-%macro FUNC_RESTORE 0
-       movdqa  xmm6, [rsp+16*0]
-       movdqa  xmm7, [rsp+16*1]
-       movdqa  xmm8, [rsp+16*2]
-       movdqa  xmm9, [rsp+16*3]
-       movdqa  xmm10, [rsp+16*4]
-       movdqa  xmm11, [rsp+16*5]
-       movdqa  xmm12, [rsp+16*6]
-       movdqa  xmm13, [rsp+16*7]
-       movdqa  xmm14, [rsp+16*8]
-       movdqa  xmm15, [rsp+16*9]
-       mov     r12,  [rsp + 10*16 + 0*8]
-       mov     r13,  [rsp + 10*16 + 1*8]
-       mov     r15,  [rsp + 10*16 + 2*8]
-       add     rsp, stack_size
-%endmacro
-
-%elifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg0.w edi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
- %define tmp   r11
- %define tmp2   r10
- %define tmp3   r12
- %define return rax
- %define return.w eax
-
- %define func(x) x:
- %macro FUNC_SAVE 0
-       push    r12
- %endmacro
- %macro FUNC_RESTORE 0
-       pop     r12
- %endmacro
-%endif
-
-;;; gf_4vect_mad_avx(len, vec, vec_i, mul_array, src, dest)
-%define len   arg0
-%define len.w arg0.w
-%define vec    arg1
-%define vec_i    arg2
-%define mul_array arg3
-%define        src   arg4
-%define dest1  arg5
-%define pos   return
-%define pos.w return.w
-
-%define dest2 mul_array
-%define dest3 tmp2
-%define dest4 vec_i
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR vmovdqu
- %define XSTR vmovdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR vmovdqa
-  %define XSTR vmovdqa
- %else
-  %define XLDR vmovntdqa
-  %define XSTR vmovntdq
- %endif
-%endif
-
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f  xmm15
-%define xgft3_hi xmm14
-%define xgft4_hi xmm13
-%define xgft4_lo xmm12
-
-%define x0      xmm0
-%define xtmpa   xmm1
-%define xtmph1  xmm2
-%define xtmpl1  xmm3
-%define xtmph2  xmm4
-%define xtmpl2  xmm5
-%define xtmph3  xmm6
-%define xtmpl3  xmm7
-%define xtmph4  xmm8
-%define xtmpl4  xmm9
-%define xd1     xmm10
-%define xd2     xmm11
-%define xd3     xtmph1
-%define xd4     xtmpl1
-
-align 16
-global gf_4vect_mad_avx:function
-func(gf_4vect_mad_avx)
-       FUNC_SAVE
-       sub     len, 16
-       jl      .return_fail
-       xor     pos, pos
-       vmovdqa xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-
-       mov     tmp, vec
-
-       sal     vec_i, 5                ;Multiply by 32
-       lea     tmp3, [mul_array + vec_i]
-
-       sal     tmp, 6                  ;Multiply by 64
-       vmovdqu xgft3_hi, [tmp3+tmp+16] ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
-       sal     vec, 5                  ;Multiply by 32
-       add     tmp, vec
-       vmovdqu xgft4_lo, [tmp3+tmp]    ;Load array Dx{00}, Dx{01}, Dx{02}, ...
-       vmovdqu xgft4_hi, [tmp3+tmp+16] ; " Dx{00}, Dx{10}, Dx{20}, ... , Dx{f0}
-
-       mov     dest2, [dest1+PS]               ; reuse mul_array
-       mov     dest3, [dest1+2*PS]
-       mov     dest4, [dest1+3*PS]             ; reuse vec_i
-       mov     dest1, [dest1]
-
-.loop16:
-       XLDR    x0, [src+pos]           ;Get next source vector
-       vmovdqu xtmph1, [tmp3+16]       ; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
-       vmovdqu xtmpl1, [tmp3]          ;Load array Ax{00}, Ax{01}, Ax{02}, ...
-       vmovdqu xtmph2, [tmp3+vec+16]   ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
-       vmovdqu xtmpl2, [tmp3+vec]      ;Load array Bx{00}, Bx{01}, Bx{02}, ...
-       vmovdqu xtmpl3, [tmp3+2*vec]    ;Load array Cx{00}, Cx{01}, Cx{02}, ...
-
-       XLDR    xd1, [dest1+pos]        ;Get next dest vector
-       XLDR    xd2, [dest2+pos]        ;Get next dest vector
-
-       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-
-       ; dest1
-       vpshufb xtmph1, xtmph1, x0              ;Lookup mul table of high nibble
-       vpshufb xtmpl1, xtmpl1, xtmpa           ;Lookup mul table of low nibble
-       vpxor   xtmph1, xtmph1, xtmpl1          ;GF add high and low partials
-       vpxor   xd1, xd1, xtmph1
-
-       XLDR    xd3, [dest3+pos]        ;Reuse xtmph1, Get next dest vector
-       XLDR    xd4, [dest4+pos]        ;Reuse xtmpl1, Get next dest vector
-
-       ; dest2
-       vpshufb xtmph2, xtmph2, x0              ;Lookup mul table of high nibble
-       vpshufb xtmpl2, xtmpl2, xtmpa           ;Lookup mul table of low nibble
-       vpxor   xtmph2, xtmph2, xtmpl2          ;GF add high and low partials
-       vpxor   xd2, xd2, xtmph2
-
-       ; dest3
-       vpshufb xtmph3, xgft3_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xtmpl3, xtmpl3, xtmpa           ;Lookup mul table of low nibble
-       vpxor   xtmph3, xtmph3, xtmpl3          ;GF add high and low partials
-       vpxor   xd3, xd3, xtmph3
-
-       ; dest4
-       vpshufb xtmph4, xgft4_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xtmpl4, xgft4_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xtmph4, xtmph4, xtmpl4          ;GF add high and low partials
-       vpxor   xd4, xd4, xtmph4
-
-       XSTR    [dest1+pos], xd1        ;Store result
-       XSTR    [dest2+pos], xd2        ;Store result
-       XSTR    [dest3+pos], xd3        ;Store result
-       XSTR    [dest4+pos], xd4        ;Store result
-
-       add     pos, 16                 ;Loop on 16 bytes at a time
-       cmp     pos, len
-       jle     .loop16
-
-       lea     tmp, [len + 16]
-       cmp     pos, tmp
-       je      .return_pass
-
-.lessthan16:
-       ;; Tail len
-       ;; Do one more overlap pass
-
-       mov     tmp, len        ;Overlapped offset length-16
-
-       XLDR    x0, [src+tmp]           ;Get next source vector
-
-       vmovdqu xtmph1, [tmp3+16]       ; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
-       vmovdqu xtmpl1, [tmp3]          ;Load array Ax{00}, Ax{01}, Ax{02}, ...
-       vmovdqu xtmph2, [tmp3+vec+16]   ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
-       vmovdqu xtmpl2, [tmp3+vec]      ;Load array Bx{00}, Bx{01}, Bx{02}, ...
-       vmovdqu xtmpl3, [tmp3+2*vec]    ;Load array Cx{00}, Cx{01}, Cx{02}, ...
-
-       XLDR    xd1, [dest1+tmp]        ;Get next dest vector
-       XLDR    xd2, [dest2+tmp]        ;Get next dest vector
-       XLDR    xtmph4, [dest3+tmp]     ;Get next dest vector
-
-       sub     len, pos
-
-       vmovdqa xtmpl4, [constip16]     ;Load const of i + 16
-       vpinsrb xtmph3, xtmph3, len.w, 15
-       vpshufb xtmph3, xtmph3, xmask0f         ;Broadcast len to all bytes
-       vpcmpgtb        xtmph3, xtmph3, xtmpl4
-
-       XLDR    xtmpl4, [dest4+tmp]     ;Get next dest vector
-
-       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-
-       ; dest1
-       vpshufb xtmph1, xtmph1, x0      ;Lookup mul table of high nibble
-       vpshufb xtmpl1, xtmpl1, xtmpa   ;Lookup mul table of low nibble
-       vpxor   xtmph1, xtmph1, xtmpl1  ;GF add high and low partials
-       vpand   xtmph1, xtmph1, xtmph3
-       vpxor   xd1, xd1, xtmph1
-
-       ; dest2
-       vpshufb xtmph2, xtmph2, x0      ;Lookup mul table of high nibble
-       vpshufb xtmpl2, xtmpl2, xtmpa   ;Lookup mul table of low nibble
-       vpxor   xtmph2, xtmph2, xtmpl2  ;GF add high and low partials
-       vpand   xtmph2, xtmph2, xtmph3
-       vpxor   xd2, xd2, xtmph2
-
-       ; dest3
-       vpshufb xgft3_hi, xgft3_hi, x0          ;Lookup mul table of high nibble
-       vpshufb xtmpl3, xtmpl3, xtmpa           ;Lookup mul table of low nibble
-       vpxor   xgft3_hi, xgft3_hi, xtmpl3      ;GF add high and low partials
-       vpand   xgft3_hi, xgft3_hi, xtmph3
-       vpxor   xtmph4, xtmph4, xgft3_hi
-
-       ; dest4
-       vpshufb xgft4_hi, xgft4_hi, x0          ;Lookup mul table of high nibble
-       vpshufb xgft4_lo, xgft4_lo, xtmpa       ;Lookup mul table of low nibble
-       vpxor   xgft4_hi, xgft4_hi, xgft4_lo    ;GF add high and low partials
-       vpand   xgft4_hi, xgft4_hi, xtmph3
-       vpxor   xtmpl4, xtmpl4, xgft4_hi
-
-       XSTR    [dest1+tmp], xd1        ;Store result
-       XSTR    [dest2+tmp], xd2        ;Store result
-       XSTR    [dest3+tmp], xtmph4     ;Store result
-       XSTR    [dest4+tmp], xtmpl4     ;Store result
-
-.return_pass:
-       mov     return, 0
-       FUNC_RESTORE
-       ret
-
-.return_fail:
-       mov     return, 1
-       FUNC_RESTORE
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-mask0f:        ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-constip16:
-       ddq 0xf0f1f2f3f4f5f6f7f8f9fafbfcfdfeff
-
-;;;       func             core, ver, snum
-slversion gf_4vect_mad_avx, 02,  01,  020a

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_mad_avx2.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_mad_avx2.asm.s
deleted file mode 100644 (file)
index 5df1f83..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_mad_avx2.asm.s
+++ /dev/null
@@ -1,342 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_4vect_mad_avx2(len, vec, vec_i, mul_array, src, dest);
-;;;
-
-%include "reg_sizes.asm"
-
-%define PS 8
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0  rcx
- %define arg0.w ecx
- %define arg1  rdx
- %define arg2  r8
- %define arg3  r9
- %define arg4  r12
- %define arg5  r15
- %define tmp    r11
- %define tmp.w  r11d
- %define tmp.b  r11b
- %define return rax
- %define return.w eax
- %define stack_size 16*10 + 3*8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
- %define func(x) proc_frame x
-
-%macro FUNC_SAVE 0
-       sub     rsp, stack_size
-       movdqa  [rsp+16*0],xmm6
-       movdqa  [rsp+16*1],xmm7
-       movdqa  [rsp+16*2],xmm8
-       movdqa  [rsp+16*3],xmm9
-       movdqa  [rsp+16*4],xmm10
-       movdqa  [rsp+16*5],xmm11
-       movdqa  [rsp+16*6],xmm12
-       movdqa  [rsp+16*7],xmm13
-       movdqa  [rsp+16*8],xmm14
-       movdqa  [rsp+16*9],xmm15
-       save_reg        r12,  10*16 + 0*8
-       save_reg        r15,  10*16 + 1*8
-       end_prolog
-       mov     arg4, arg(4)
-       mov     arg5, arg(5)
-%endmacro
-
-%macro FUNC_RESTORE 0
-       movdqa  xmm6, [rsp+16*0]
-       movdqa  xmm7, [rsp+16*1]
-       movdqa  xmm8, [rsp+16*2]
-       movdqa  xmm9, [rsp+16*3]
-       movdqa  xmm10, [rsp+16*4]
-       movdqa  xmm11, [rsp+16*5]
-       movdqa  xmm12, [rsp+16*6]
-       movdqa  xmm13, [rsp+16*7]
-       movdqa  xmm14, [rsp+16*8]
-       movdqa  xmm15, [rsp+16*9]
-       mov     r12,  [rsp + 10*16 + 0*8]
-       mov     r15,  [rsp + 10*16 + 1*8]
-       add     rsp, stack_size
-%endmacro
-
-%elifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg0.w edi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
- %define tmp   r11
- %define tmp.w r11d
- %define tmp.b r11b
- %define return rax
- %define return.w eax
-
- %define func(x) x:
- %define FUNC_SAVE
- %define FUNC_RESTORE
-%endif
-
-
-;;; gf_4vect_mad_avx2(len, vec, vec_i, mul_array, src, dest)
-%define len   arg0
-%define len.w arg0.w
-%define vec    arg1
-%define vec_i    arg2
-%define mul_array arg3
-%define        src   arg4
-%define dest1  arg5
-%define pos   return
-%define pos.w return.w
-
-%define dest2 mul_array
-%define dest3 vec
-%define dest4 vec_i
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR vmovdqu
- %define XSTR vmovdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR vmovdqa
-  %define XSTR vmovdqa
- %else
-  %define XLDR vmovntdqa
-  %define XSTR vmovntdq
- %endif
-%endif
-
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f   ymm15
-%define xmask0fx  xmm15
-%define xgft1_lo  ymm14
-%define xgft2_lo  ymm13
-%define xgft3_lo  ymm12
-%define xgft4_lo  ymm11
-
-%define x0      ymm0
-%define xtmpa   ymm1
-%define xtmpl   ymm2
-%define xtmplx  xmm2
-%define xtmph1  ymm3
-%define xtmph1x xmm3
-%define xtmph2  ymm4
-%define xtmph3  ymm5
-%define xtmph4  ymm6
-%define xd1     ymm7
-%define xd2     ymm8
-%define xd3     ymm9
-%define xd4     ymm10
-
-align 16
-global gf_4vect_mad_avx2:function
-func(gf_4vect_mad_avx2)
-       FUNC_SAVE
-       sub     len, 32
-       jl      .return_fail
-       xor     pos, pos
-       mov     tmp.b, 0x0f
-       vpinsrb xmask0fx, xmask0fx, tmp.w, 0
-       vpbroadcastb xmask0f, xmask0fx  ;Construct mask 0x0f0f0f...
-
-       sal     vec_i, 5                ;Multiply by 32
-       sal     vec, 5                  ;Multiply by 32
-       lea     tmp, [mul_array + vec_i]
-
-       vmovdqu xgft1_lo, [tmp] ;Load array Ax{00}, Ax{01}, Ax{02}, ...
-                                       ; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
-       vmovdqu xgft2_lo, [tmp+vec]     ;Load array Bx{00}, Bx{01}, Bx{02}, ...
-                                       ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
-       vmovdqu xgft3_lo, [tmp+2*vec]   ;Load array Cx{00}, Cx{01}, Cx{02}, ...
-                                       ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
-       add     tmp, vec
-       vmovdqu xgft4_lo, [tmp+2*vec]   ;Load array Dx{00}, Dx{01}, Dx{02}, ...
-                                       ; " Dx{00}, Dx{10}, Dx{20}, ... , Dx{f0}
-
-       mov     dest2, [dest1+PS]               ; reuse mul_array
-       mov     dest3, [dest1+2*PS]             ; reuse vec
-       mov     dest4, [dest1+3*PS]             ; reuse vec_i
-       mov     dest1, [dest1]
-
-.loop32:
-       XLDR    x0, [src+pos]           ;Get next source vector
-
-       XLDR    xd1, [dest1+pos]        ;Get next dest vector
-       XLDR    xd2, [dest2+pos]        ;Get next dest vector
-       XLDR    xd3, [dest3+pos]        ;Get next dest vector
-       XLDR    xd4, [dest4+pos]        ;reuse xtmpl1. Get next dest vector
-
-       vpand   xtmpl, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-
-       vperm2i128 xtmpa, xtmpl, x0, 0x30       ;swap xtmpa from 1lo|2lo to 1lo|2hi
-       vperm2i128 x0, xtmpl, x0, 0x12          ;swap x0 from    1hi|2hi to 1hi|2lo
-
-       vperm2i128 xtmph1, xgft1_lo, xgft1_lo, 0x01 ; swapped to hi | lo
-       vperm2i128 xtmph2, xgft2_lo, xgft2_lo, 0x01 ; swapped to hi | lo
-       vperm2i128 xtmph3, xgft3_lo, xgft3_lo, 0x01 ; swapped to hi | lo
-       vperm2i128 xtmph4, xgft4_lo, xgft4_lo, 0x01 ; swapped to hi | lo
-
-       ; dest1
-       vpshufb xtmph1, xtmph1, x0              ;Lookup mul table of high nibble
-       vpshufb xtmpl, xgft1_lo, xtmpa          ;Lookup mul table of low nibble
-       vpxor   xtmph1, xtmph1, xtmpl           ;GF add high and low partials
-       vpxor   xd1, xd1, xtmph1                ;xd1 += partial
-
-       ; dest2
-       vpshufb xtmph2, xtmph2, x0              ;Lookup mul table of high nibble
-       vpshufb xtmpl, xgft2_lo, xtmpa          ;Lookup mul table of low nibble
-       vpxor   xtmph2, xtmph2, xtmpl           ;GF add high and low partials
-       vpxor   xd2, xd2, xtmph2                ;xd2 += partial
-
-       ; dest3
-       vpshufb xtmph3, xtmph3, x0              ;Lookup mul table of high nibble
-       vpshufb xtmpl, xgft3_lo, xtmpa          ;Lookup mul table of low nibble
-       vpxor   xtmph3, xtmph3, xtmpl           ;GF add high and low partials
-       vpxor   xd3, xd3, xtmph3                ;xd3 += partial
-
-       ; dest4
-       vpshufb xtmph4, xtmph4, x0              ;Lookup mul table of high nibble
-       vpshufb xtmpl, xgft4_lo, xtmpa          ;Lookup mul table of low nibble
-       vpxor   xtmph4, xtmph4, xtmpl           ;GF add high and low partials
-       vpxor   xd4, xd4, xtmph4                ;xd4 += partial
-
-       XSTR    [dest1+pos], xd1
-       XSTR    [dest2+pos], xd2
-       XSTR    [dest3+pos], xd3
-       XSTR    [dest4+pos], xd4
-
-       add     pos, 32                 ;Loop on 32 bytes at a time
-       cmp     pos, len
-       jle     .loop32
-
-       lea     tmp, [len + 32]
-       cmp     pos, tmp
-       je      .return_pass
-
-.lessthan32:
-       ;; Tail len
-       ;; Do one more overlap pass
-       mov     tmp.b, 0x1f
-       vpinsrb xtmph1x, xtmph1x, tmp.w, 0
-       vpbroadcastb xtmph1, xtmph1x    ;Construct mask 0x1f1f1f...
-
-       mov     tmp, len                ;Overlapped offset length-32
-
-       XLDR    x0, [src+tmp]           ;Get next source vector
-
-       XLDR    xd1, [dest1+tmp]        ;Get next dest vector
-       XLDR    xd2, [dest2+tmp]        ;Get next dest vector
-       XLDR    xd3, [dest3+tmp]        ;Get next dest vector
-       XLDR    xd4, [dest4+tmp]        ;Get next dest vector
-
-       sub     len, pos
-
-       vmovdqa xtmph2, [constip32]     ;Load const of i + 32
-       vpinsrb xtmplx, xtmplx, len.w, 15
-       vinserti128     xtmpl, xtmpl, xtmplx, 1 ;swapped to xtmplx | xtmplx
-       vpshufb xtmpl, xtmpl, xtmph1    ;Broadcast len to all bytes. xtmph1=0x1f1f1f...
-       vpcmpgtb        xtmpl, xtmpl, xtmph2
-
-       vpand   xtmph1, x0, xmask0f     ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-
-       vperm2i128 xtmpa, xtmph1, x0, 0x30      ;swap xtmpa from 1lo|2lo to 1lo|2hi
-       vperm2i128 x0, xtmph1, x0, 0x12         ;swap x0 from    1hi|2hi to 1hi|2lo
-
-       vperm2i128 xtmph1, xgft1_lo, xgft1_lo, 0x01 ; swapped to hi | lo
-       vperm2i128 xtmph2, xgft2_lo, xgft2_lo, 0x01 ; swapped to hi | lo
-       vperm2i128 xtmph3, xgft3_lo, xgft3_lo, 0x01 ; swapped to hi | lo
-       vperm2i128 xtmph4, xgft4_lo, xgft4_lo, 0x01 ; swapped to hi | lo
-
-       ; dest1
-       vpshufb xtmph1, xtmph1, x0              ;Lookup mul table of high nibble
-       vpshufb xgft1_lo, xgft1_lo, xtmpa       ;Lookup mul table of low nibble
-       vpxor   xtmph1, xtmph1, xgft1_lo        ;GF add high and low partials
-       vpand   xtmph1, xtmph1, xtmpl
-       vpxor   xd1, xd1, xtmph1                ;xd1 += partial
-
-       ; dest2
-       vpshufb xtmph2, xtmph2, x0              ;Lookup mul table of high nibble
-       vpshufb xgft2_lo, xgft2_lo, xtmpa       ;Lookup mul table of low nibble
-       vpxor   xtmph2, xtmph2, xgft2_lo        ;GF add high and low partials
-       vpand   xtmph2, xtmph2, xtmpl
-       vpxor   xd2, xd2, xtmph2                ;xd2 += partial
-
-       ; dest3
-       vpshufb xtmph3, xtmph3, x0              ;Lookup mul table of high nibble
-       vpshufb xgft3_lo, xgft3_lo, xtmpa       ;Lookup mul table of low nibble
-       vpxor   xtmph3, xtmph3, xgft3_lo        ;GF add high and low partials
-       vpand   xtmph3, xtmph3, xtmpl
-       vpxor   xd3, xd3, xtmph3                ;xd3 += partial
-
-       ; dest4
-       vpshufb xtmph4, xtmph4, x0              ;Lookup mul table of high nibble
-       vpshufb xgft4_lo, xgft4_lo, xtmpa       ;Lookup mul table of low nibble
-       vpxor   xtmph4, xtmph4, xgft4_lo        ;GF add high and low partials
-       vpand   xtmph4, xtmph4, xtmpl
-       vpxor   xd4, xd4, xtmph4                ;xd4 += partial
-
-       XSTR    [dest1+tmp], xd1
-       XSTR    [dest2+tmp], xd2
-       XSTR    [dest3+tmp], xd3
-       XSTR    [dest4+tmp], xd4
-
-.return_pass:
-       mov     return, 0
-       FUNC_RESTORE
-       ret
-
-.return_fail:
-       mov     return, 1
-       FUNC_RESTORE
-       ret
-
-endproc_frame
-
-section .data
-align 32
-constip32:
-       ddq 0xf0f1f2f3f4f5f6f7f8f9fafbfcfdfeff
-       ddq 0xe0e1e2e3e4e5e6e7e8e9eaebecedeeef
-
-;;;       func              core, ver, snum
-slversion gf_4vect_mad_avx2, 04,  01,  020b

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_mad_sse.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_mad_sse.asm.s
deleted file mode 100644 (file)
index f753c13..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_mad_sse.asm.s
+++ /dev/null
@@ -1,342 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_4vect_mad_sse(len, vec, vec_i, mul_array, src, dest);
-;;;
-
-%include "reg_sizes.asm"
-
-%define PS 8
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0  rcx
- %define arg0.w ecx
- %define arg1  rdx
- %define arg2  r8
- %define arg3  r9
- %define arg4  r12
- %define arg5  r15
- %define tmp   r11
- %define tmp2   r10
- %define tmp3   r13
- %define return rax
- %define return.w eax
- %define stack_size 16*10 + 3*8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
- %define func(x) proc_frame x
-
-%macro FUNC_SAVE 0
-       sub     rsp, stack_size
-       movdqa  [rsp+16*0],xmm6
-       movdqa  [rsp+16*1],xmm7
-       movdqa  [rsp+16*2],xmm8
-       movdqa  [rsp+16*3],xmm9
-       movdqa  [rsp+16*4],xmm10
-       movdqa  [rsp+16*5],xmm11
-       movdqa  [rsp+16*6],xmm12
-       movdqa  [rsp+16*7],xmm13
-       movdqa  [rsp+16*8],xmm14
-       movdqa  [rsp+16*9],xmm15
-       save_reg        r12,  10*16 + 0*8
-       save_reg        r13,  10*16 + 1*8
-       save_reg        r15,  10*16 + 2*8
-       end_prolog
-       mov     arg4, arg(4)
-       mov     arg5, arg(5)
-%endmacro
-
-%macro FUNC_RESTORE 0
-       movdqa  xmm6, [rsp+16*0]
-       movdqa  xmm7, [rsp+16*1]
-       movdqa  xmm8, [rsp+16*2]
-       movdqa  xmm9, [rsp+16*3]
-       movdqa  xmm10, [rsp+16*4]
-       movdqa  xmm11, [rsp+16*5]
-       movdqa  xmm12, [rsp+16*6]
-       movdqa  xmm13, [rsp+16*7]
-       movdqa  xmm14, [rsp+16*8]
-       movdqa  xmm15, [rsp+16*9]
-       mov     r12,  [rsp + 10*16 + 0*8]
-       mov     r13,  [rsp + 10*16 + 1*8]
-       mov     r15,  [rsp + 10*16 + 2*8]
-       add     rsp, stack_size
-%endmacro
-
-%elifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg0.w edi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
- %define tmp   r11
- %define tmp2   r10
- %define tmp3   r12
- %define return rax
- %define return.w eax
-
- %define func(x) x:
- %macro FUNC_SAVE 0
-       push    r12
- %endmacro
- %macro FUNC_RESTORE 0
-       pop     r12
- %endmacro
-%endif
-
-;;; gf_4vect_mad_sse(len, vec, vec_i, mul_array, src, dest)
-%define len   arg0
-%define len.w arg0.w
-%define vec    arg1
-%define vec_i    arg2
-%define mul_array arg3
-%define        src   arg4
-%define dest1  arg5
-%define pos   return
-%define pos.w return.w
-
-%define dest2 mul_array
-%define dest3 tmp2
-%define dest4 vec_i
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR movdqu
- %define XSTR movdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR movdqa
-  %define XSTR movdqa
- %else
-  %define XLDR movntdqa
-  %define XSTR movntdq
- %endif
-%endif
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f  xmm15
-%define xgft3_hi xmm14
-%define xgft4_hi xmm13
-%define xgft4_lo xmm12
-
-%define x0      xmm0
-%define xtmpa   xmm1
-%define xtmph1  xmm2
-%define xtmpl1  xmm3
-%define xtmph2  xmm4
-%define xtmpl2  xmm5
-%define xtmph3  xmm6
-%define xtmpl3  xmm7
-%define xtmph4  xmm8
-%define xtmpl4  xmm9
-%define xd1     xmm10
-%define xd2     xmm11
-%define xd3     xtmph1
-%define xd4     xtmpl1
-
-align 16
-global gf_4vect_mad_sse:function
-func(gf_4vect_mad_sse)
-       FUNC_SAVE
-       sub     len, 16
-       jl      .return_fail
-       xor     pos, pos
-       movdqa  xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-       mov     tmp, vec
-
-       sal     vec_i, 5                ;Multiply by 32
-       lea     tmp3, [mul_array + vec_i]
-
-       sal     tmp, 6                  ;Multiply by 64
-
-       movdqu  xgft3_hi, [tmp3+tmp+16] ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
-       sal     vec, 5                  ;Multiply by 32
-       add     tmp, vec
-       movdqu  xgft4_lo, [tmp3+tmp]    ;Load array Dx{00}, Dx{01}, Dx{02}, ...
-       movdqu  xgft4_hi, [tmp3+tmp+16] ; " Dx{00}, Dx{10}, Dx{20}, ... , Dx{f0}
-
-       mov     dest2, [dest1+PS]               ; reuse mul_array
-       mov     dest3, [dest1+2*PS]
-       mov     dest4, [dest1+3*PS]             ; reuse vec_i
-       mov     dest1, [dest1]
-
-.loop16:
-       XLDR    x0, [src+pos]           ;Get next source vector
-       movdqu  xtmph1, [tmp3+16]       ; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
-       movdqu  xtmpl1, [tmp3]          ;Load array Ax{00}, Ax{01}, Ax{02}, ...
-       movdqu  xtmph2, [tmp3+vec+16]   ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
-       movdqu  xtmpl2, [tmp3+vec]      ;Load array Bx{00}, Bx{01}, Bx{02}, ...
-       movdqu  xtmpl3, [tmp3+2*vec]    ;Load array Cx{00}, Cx{01}, Cx{02}, ...
-
-       movdqa  xtmph3, xgft3_hi
-       movdqa  xtmpl4, xgft4_lo
-       movdqa  xtmph4, xgft4_hi
-
-       XLDR    xd1, [dest1+pos]        ;Get next dest vector
-       XLDR    xd2, [dest2+pos]        ;Get next dest vector
-
-       movdqa  xtmpa, x0               ;Keep unshifted copy of src
-       psraw   x0, 4                   ;Shift to put high nibble into bits 4-0
-       pand    x0, xmask0f             ;Mask high src nibble in bits 4-0
-       pand    xtmpa, xmask0f          ;Mask low src nibble in bits 4-0
-
-       ; dest1
-       pshufb  xtmph1, x0              ;Lookup mul table of high nibble
-       pshufb  xtmpl1, xtmpa           ;Lookup mul table of low nibble
-       pxor    xtmph1, xtmpl1          ;GF add high and low partials
-       pxor    xd1, xtmph1
-
-       XLDR    xd3, [dest3+pos]        ;Reuse xtmph1, Get next dest vector
-       XLDR    xd4, [dest4+pos]        ;Reuse xtmpl1, Get next dest vector
-
-       ; dest2
-       pshufb  xtmph2, x0              ;Lookup mul table of high nibble
-       pshufb  xtmpl2, xtmpa           ;Lookup mul table of low nibble
-       pxor    xtmph2, xtmpl2          ;GF add high and low partials
-       pxor    xd2, xtmph2
-
-       ; dest3
-       pshufb  xtmph3, x0              ;Lookup mul table of high nibble
-       pshufb  xtmpl3, xtmpa           ;Lookup mul table of low nibble
-       pxor    xtmph3, xtmpl3          ;GF add high and low partials
-       pxor    xd3, xtmph3
-
-       ; dest4
-       pshufb  xtmph4, x0              ;Lookup mul table of high nibble
-       pshufb  xtmpl4, xtmpa           ;Lookup mul table of low nibble
-       pxor    xtmph4, xtmpl4          ;GF add high and low partials
-       pxor    xd4, xtmph4
-
-       XSTR    [dest1+pos], xd1        ;Store result
-       XSTR    [dest2+pos], xd2        ;Store result
-       XSTR    [dest3+pos], xd3        ;Store result
-       XSTR    [dest4+pos], xd4        ;Store result
-
-       add     pos, 16                 ;Loop on 16 bytes at a time
-       cmp     pos, len
-       jle     .loop16
-
-       lea     tmp, [len + 16]
-       cmp     pos, tmp
-       je      .return_pass
-
-.lessthan16:
-       ;; Tail len
-       ;; Do one more overlap pass
-       mov     tmp, len        ;Overlapped offset length-16
-
-       XLDR    x0, [src+tmp]           ;Get next source vector
-
-       movdqu  xtmph1, [tmp3+16]       ; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
-       movdqu  xtmpl1, [tmp3]          ;Load array Ax{00}, Ax{01}, Ax{02}, ...
-       movdqu  xtmph2, [tmp3+vec+16]   ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
-       movdqu  xtmpl2, [tmp3+vec]      ;Load array Bx{00}, Bx{01}, Bx{02}, ...
-       movdqu  xtmpl3, [tmp3+2*vec]    ;Load array Cx{00}, Cx{01}, Cx{02}, ...
-
-       XLDR    xd1, [dest1+tmp]        ;Get next dest vector
-       XLDR    xd2, [dest2+tmp]        ;Get next dest vector
-       XLDR    xtmph4, [dest3+tmp]     ;Reuse xtmph1. Get next dest vector
-
-       sub     len, pos
-
-       movdqa  xtmpl4, [constip16]     ;Load const of i + 16
-       pinsrb  xtmph3, len.w, 15
-       pshufb  xtmph3, xmask0f         ;Broadcast len to all bytes
-       pcmpgtb xtmph3, xtmpl4
-
-       XLDR    xtmpl4, [dest4+tmp]     ;Get next dest vector
-
-       movdqa  xtmpa, x0               ;Keep unshifted copy of src
-       psraw   x0, 4                   ;Shift to put high nibble into bits 4-0
-       pand    x0, xmask0f             ;Mask high src nibble in bits 4-0
-       pand    xtmpa, xmask0f          ;Mask low src nibble in bits 4-0
-
-       ; dest1
-       pshufb  xtmph1, x0              ;Lookup mul table of high nibble
-       pshufb  xtmpl1, xtmpa           ;Lookup mul table of low nibble
-       pxor    xtmph1, xtmpl1          ;GF add high and low partials
-       pand    xtmph1, xtmph3
-       pxor    xd1, xtmph1
-
-       ; dest2
-       pshufb  xtmph2, x0              ;Lookup mul table of high nibble
-       pshufb  xtmpl2, xtmpa           ;Lookup mul table of low nibble
-       pxor    xtmph2, xtmpl2          ;GF add high and low partials
-       pand    xtmph2, xtmph3
-       pxor    xd2, xtmph2
-
-       ; dest3
-       pshufb  xgft3_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xtmpl3, xtmpa           ;Lookup mul table of low nibble
-       pxor    xgft3_hi, xtmpl3        ;GF add high and low partials
-       pand    xgft3_hi, xtmph3
-       pxor    xtmph4, xgft3_hi
-
-       ; dest4
-       pshufb  xgft4_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft4_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft4_hi, xgft4_lo      ;GF add high and low partials
-       pand    xgft4_hi, xtmph3
-       pxor    xtmpl4, xgft4_hi
-
-       XSTR    [dest1+tmp], xd1        ;Store result
-       XSTR    [dest2+tmp], xd2        ;Store result
-       XSTR    [dest3+tmp], xtmph4     ;Store result
-       XSTR    [dest4+tmp], xtmpl4     ;Store result
-
-.return_pass:
-       FUNC_RESTORE
-       mov     return, 0
-       ret
-
-.return_fail:
-       FUNC_RESTORE
-       mov     return, 1
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-
-mask0f:
-       ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-constip16:
-       ddq 0xf0f1f2f3f4f5f6f7f8f9fafbfcfdfeff
-
-;;;       func             core, ver, snum
-slversion gf_4vect_mad_sse, 00,  01,  0209

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_dot_prod_avx.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_dot_prod_avx.asm.s
deleted file mode 100644 (file)
index 41fd301..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_dot_prod_avx.asm.s
+++ /dev/null
@@ -1,303 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_5vect_dot_prod_avx(len, vec, *g_tbls, **buffs, **dests);
-;;;
-
-%include "reg_sizes.asm"
-
-%ifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
-
- %define tmp   r11
- %define tmp2  r10
- %define tmp3  r13             ; must be saved and restored
- %define tmp4  r12             ; must be saved and restored
- %define tmp5  r14             ; must be saved and restored
- %define tmp6  r15             ; must be saved and restored
- %define return rax
- %define PS 8
- %define LOG_PS 3
-
- %define func(x) x:
- %macro FUNC_SAVE 0
-       push    r12
-       push    r13
-       push    r14
-       push    r15
- %endmacro
- %macro FUNC_RESTORE 0
-       pop     r15
-       pop     r14
-       pop     r13
-       pop     r12
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0   rcx
- %define arg1   rdx
- %define arg2   r8
- %define arg3   r9
-
- %define arg4   r12            ; must be saved, loaded and restored
- %define arg5   r15            ; must be saved and restored
- %define tmp    r11
- %define tmp2   r10
- %define tmp3   r13            ; must be saved and restored
- %define tmp4   r14            ; must be saved and restored
- %define tmp5   rdi            ; must be saved and restored
- %define tmp6   rsi            ; must be saved and restored
- %define return rax
- %define PS     8
- %define LOG_PS 3
- %define stack_size  10*16 + 7*8               ; must be an odd multiple of 8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
-
- %define func(x) proc_frame x
- %macro FUNC_SAVE 0
-       alloc_stack     stack_size
-       save_xmm128     xmm6, 0*16
-       save_xmm128     xmm7, 1*16
-       save_xmm128     xmm8, 2*16
-       save_xmm128     xmm9, 3*16
-       save_xmm128     xmm10, 4*16
-       save_xmm128     xmm11, 5*16
-       save_xmm128     xmm12, 6*16
-       save_xmm128     xmm13, 7*16
-       save_xmm128     xmm14, 8*16
-       save_xmm128     xmm15, 9*16
-       save_reg        r12,  10*16 + 0*8
-       save_reg        r13,  10*16 + 1*8
-       save_reg        r14,  10*16 + 2*8
-       save_reg        r15,  10*16 + 3*8
-       save_reg        rdi,  10*16 + 4*8
-       save_reg        rsi,  10*16 + 5*8
-       end_prolog
-       mov     arg4, arg(4)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       vmovdqa xmm6, [rsp + 0*16]
-       vmovdqa xmm7, [rsp + 1*16]
-       vmovdqa xmm8, [rsp + 2*16]
-       vmovdqa xmm9, [rsp + 3*16]
-       vmovdqa xmm10, [rsp + 4*16]
-       vmovdqa xmm11, [rsp + 5*16]
-       vmovdqa xmm12, [rsp + 6*16]
-       vmovdqa xmm13, [rsp + 7*16]
-       vmovdqa xmm14, [rsp + 8*16]
-       vmovdqa xmm15, [rsp + 9*16]
-       mov     r12,  [rsp + 10*16 + 0*8]
-       mov     r13,  [rsp + 10*16 + 1*8]
-       mov     r14,  [rsp + 10*16 + 2*8]
-       mov     r15,  [rsp + 10*16 + 3*8]
-       mov     rdi,  [rsp + 10*16 + 4*8]
-       mov     rsi,  [rsp + 10*16 + 5*8]
-       add     rsp, stack_size
- %endmacro
-%endif
-
-%define len    arg0
-%define vec    arg1
-%define mul_array arg2
-%define        src    arg3
-%define dest   arg4
-%define ptr    arg5
-%define vec_i  tmp2
-%define dest1  tmp3
-%define dest2  tmp4
-%define vskip1 tmp5
-%define vskip3 tmp6
-%define pos    return
-
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR vmovdqu
- %define XSTR vmovdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR vmovdqa
-  %define XSTR vmovdqa
- %else
-  %define XLDR vmovntdqa
-  %define XSTR vmovntdq
- %endif
-%endif
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f   xmm15
-%define xgft1_lo  xmm14
-%define xgft1_hi  xmm13
-%define xgft2_lo  xmm12
-%define xgft2_hi  xmm11
-%define xgft3_lo  xmm10
-%define xgft3_hi  xmm9
-%define xgft4_lo  xmm8
-%define xgft4_hi  xmm7
-
-
-%define x0     xmm0
-%define xtmpa  xmm1
-%define xp1    xmm2
-%define xp2    xmm3
-%define xp3    xmm4
-%define xp4    xmm5
-%define xp5    xmm6
-
-align 16
-global gf_5vect_dot_prod_avx:function
-func(gf_5vect_dot_prod_avx)
-       FUNC_SAVE
-       sub     len, 16
-       jl      .return_fail
-       xor     pos, pos
-       vmovdqa xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-       mov     vskip1, vec
-       imul    vskip1, 32
-       mov     vskip3, vec
-       imul    vskip3, 96
-       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
-       mov     dest1, [dest]
-       mov     dest2, [dest+PS]
-
-
-.loop16:
-       mov     tmp, mul_array
-       xor     vec_i, vec_i
-       vpxor   xp1, xp1
-       vpxor   xp2, xp2
-       vpxor   xp3, xp3
-       vpxor   xp4, xp4
-       vpxor   xp5, xp5
-
-
-.next_vect:
-       mov     ptr, [src+vec_i]
-       add     vec_i, PS
-       XLDR    x0, [ptr+pos]           ;Get next source vector
-
-       vmovdqu xgft1_lo, [tmp]                 ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
-       vmovdqu xgft1_hi, [tmp+16]              ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
-       vmovdqu xgft2_lo, [tmp+vskip1*1]        ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-       vmovdqu xgft2_hi, [tmp+vskip1*1+16]     ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
-       vmovdqu xgft3_lo, [tmp+vskip1*2]        ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
-       vmovdqu xgft3_hi, [tmp+vskip1*2+16]     ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
-       vmovdqu xgft4_lo, [tmp+vskip3]          ;Load array Dx{00}, Dx{01}, ..., Dx{0f}
-       vmovdqu xgft4_hi, [tmp+vskip3+16]       ;     "     Dx{00}, Dx{10}, ..., Dx{f0}
-
-       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-
-       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
-       vpxor   xp1, xgft1_hi           ;xp1 += partial
-
-       vpshufb xgft2_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft2_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft2_hi, xgft2_lo      ;GF add high and low partials
-       vpxor   xp2, xgft2_hi           ;xp2 += partial
-
-       vmovdqu xgft1_lo, [tmp+vskip1*4]        ;Load array Ex{00}, Ex{01}, ..., Ex{0f}
-       vmovdqu xgft1_hi, [tmp+vskip1*4+16]     ;     "     Ex{00}, Ex{10}, ..., Ex{f0}
-       add     tmp, 32
-
-       vpshufb xgft3_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft3_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft3_hi, xgft3_lo      ;GF add high and low partials
-       vpxor   xp3, xgft3_hi           ;xp3 += partial
-
-       vpshufb xgft4_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft4_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft4_hi, xgft4_lo      ;GF add high and low partials
-       vpxor   xp4, xgft4_hi           ;xp4 += partial
-
-       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
-       vpxor   xp5, xgft1_hi           ;xp5 += partial
-
-       cmp     vec_i, vec
-       jl      .next_vect
-
-       mov     tmp, [dest+2*PS]
-       mov     ptr, [dest+3*PS]
-       mov     vec_i, [dest+4*PS]
-
-       XSTR    [dest1+pos], xp1
-       XSTR    [dest2+pos], xp2
-       XSTR    [tmp+pos], xp3
-       XSTR    [ptr+pos], xp4
-       XSTR    [vec_i+pos], xp5
-
-       add     pos, 16                 ;Loop on 16 bytes at a time
-       cmp     pos, len
-       jle     .loop16
-
-       lea     tmp, [len + 16]
-       cmp     pos, tmp
-       je      .return_pass
-
-       ;; Tail len
-       mov     pos, len        ;Overlapped offset length-16
-       jmp     .loop16         ;Do one more overlap pass
-
-.return_pass:
-       FUNC_RESTORE
-       mov     return, 0
-       ret
-
-.return_fail:
-       FUNC_RESTORE
-       mov     return, 1
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-mask0f:        ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-
-;;;       func                  core, ver, snum
-slversion gf_5vect_dot_prod_avx, 02,  04,  0194

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_dot_prod_avx2.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_dot_prod_avx2.asm.s
deleted file mode 100644 (file)
index 2698add..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_dot_prod_avx2.asm.s
+++ /dev/null
@@ -1,315 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_5vect_dot_prod_avx2(len, vec, *g_tbls, **buffs, **dests);
-;;;
-
-%include "reg_sizes.asm"
-
-%ifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
-
- %define tmp   r11
- %define tmp.w r11d
- %define tmp.b r11b
- %define tmp2  r10
- %define tmp3  r13             ; must be saved and restored
- %define tmp4  r12             ; must be saved and restored
- %define tmp5  r14             ; must be saved and restored
- %define tmp6  r15             ; must be saved and restored
- %define return rax
- %define PS 8
- %define LOG_PS 3
-
- %define func(x) x:
- %macro FUNC_SAVE 0
-       push    r12
-       push    r13
-       push    r14
-       push    r15
- %endmacro
- %macro FUNC_RESTORE 0
-       pop     r15
-       pop     r14
-       pop     r13
-       pop     r12
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0   rcx
- %define arg1   rdx
- %define arg2   r8
- %define arg3   r9
-
- %define arg4   r12            ; must be saved, loaded and restored
- %define arg5   r15            ; must be saved and restored
- %define tmp    r11
- %define tmp.w  r11d
- %define tmp.b  r11b
- %define tmp2   r10
- %define tmp3   r13            ; must be saved and restored
- %define tmp4   r14            ; must be saved and restored
- %define tmp5   rdi            ; must be saved and restored
- %define tmp6   rsi            ; must be saved and restored
- %define return rax
- %define PS     8
- %define LOG_PS 3
- %define stack_size  10*16 + 7*8               ; must be an odd multiple of 8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
-
- %define func(x) proc_frame x
- %macro FUNC_SAVE 0
-       alloc_stack     stack_size
-       vmovdqa [rsp + 0*16], xmm6
-       vmovdqa [rsp + 1*16], xmm7
-       vmovdqa [rsp + 2*16], xmm8
-       vmovdqa [rsp + 3*16], xmm9
-       vmovdqa [rsp + 4*16], xmm10
-       vmovdqa [rsp + 5*16], xmm11
-       vmovdqa [rsp + 6*16], xmm12
-       vmovdqa [rsp + 7*16], xmm13
-       vmovdqa [rsp + 8*16], xmm14
-       vmovdqa [rsp + 9*16], xmm15
-       save_reg        r12,  10*16 + 0*8
-       save_reg        r13,  10*16 + 1*8
-       save_reg        r14,  10*16 + 2*8
-       save_reg        r15,  10*16 + 3*8
-       save_reg        rdi,  10*16 + 4*8
-       save_reg        rsi,  10*16 + 5*8
-       end_prolog
-       mov     arg4, arg(4)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       vmovdqa xmm6, [rsp + 0*16]
-       vmovdqa xmm7, [rsp + 1*16]
-       vmovdqa xmm8, [rsp + 2*16]
-       vmovdqa xmm9, [rsp + 3*16]
-       vmovdqa xmm10, [rsp + 4*16]
-       vmovdqa xmm11, [rsp + 5*16]
-       vmovdqa xmm12, [rsp + 6*16]
-       vmovdqa xmm13, [rsp + 7*16]
-       vmovdqa xmm14, [rsp + 8*16]
-       vmovdqa xmm15, [rsp + 9*16]
-       mov     r12,  [rsp + 10*16 + 0*8]
-       mov     r13,  [rsp + 10*16 + 1*8]
-       mov     r14,  [rsp + 10*16 + 2*8]
-       mov     r15,  [rsp + 10*16 + 3*8]
-       mov     rdi,  [rsp + 10*16 + 4*8]
-       mov     rsi,  [rsp + 10*16 + 5*8]
-       add     rsp, stack_size
- %endmacro
-%endif
-
-%define len    arg0
-%define vec    arg1
-%define mul_array arg2
-%define        src    arg3
-%define dest   arg4
-%define ptr    arg5
-%define vec_i  tmp2
-%define dest1  tmp3
-%define dest2  tmp4
-%define vskip1 tmp5
-%define vskip3 tmp6
-%define pos    return
-
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR vmovdqu
- %define XSTR vmovdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR vmovdqa
-  %define XSTR vmovdqa
- %else
-  %define XLDR vmovntdqa
-  %define XSTR vmovntdq
- %endif
-%endif
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f   ymm15
-%define xmask0fx  xmm15
-%define xgft1_lo  ymm14
-%define xgft1_hi  ymm13
-%define xgft2_lo  ymm12
-%define xgft2_hi  ymm11
-%define xgft3_lo  ymm10
-%define xgft3_hi  ymm9
-%define xgft4_lo  ymm8
-%define xgft4_hi  ymm7
-
-
-%define x0     ymm0
-%define xtmpa  ymm1
-%define xp1    ymm2
-%define xp2    ymm3
-%define xp3    ymm4
-%define xp4    ymm5
-%define xp5    ymm6
-
-align 16
-global gf_5vect_dot_prod_avx2:function
-func(gf_5vect_dot_prod_avx2)
-       FUNC_SAVE
-       sub     len, 32
-       jl      .return_fail
-       xor     pos, pos
-       mov     tmp.b, 0x0f
-       vpinsrb xmask0fx, xmask0fx, tmp.w, 0
-       vpbroadcastb xmask0f, xmask0fx  ;Construct mask 0x0f0f0f...
-       mov     vskip1, vec
-       imul    vskip1, 32
-       mov     vskip3, vec
-       imul    vskip3, 96
-       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
-       mov     dest1, [dest]
-       mov     dest2, [dest+PS]
-
-
-.loop32:
-       mov     tmp, mul_array
-       xor     vec_i, vec_i
-       vpxor   xp1, xp1
-       vpxor   xp2, xp2
-       vpxor   xp3, xp3
-       vpxor   xp4, xp4
-       vpxor   xp5, xp5
-
-
-.next_vect:
-       mov     ptr, [src+vec_i]
-       XLDR    x0, [ptr+pos]           ;Get next source vector
-       add     vec_i, PS
-
-       vpand   xgft4_lo, x0, xmask0f   ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-       vperm2i128 xtmpa, xgft4_lo, x0, 0x30    ;swap xtmpa from 1lo|2lo to 1lo|2hi
-       vperm2i128 x0, xgft4_lo, x0, 0x12       ;swap x0 from    1hi|2hi to 1hi|2lo
-
-       vmovdqu xgft1_lo, [tmp]                 ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
-                                               ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
-       vmovdqu xgft2_lo, [tmp+vskip1*1]        ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-                                               ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
-       vmovdqu xgft3_lo, [tmp+vskip1*2]        ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
-                                               ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
-       vmovdqu xgft4_lo, [tmp+vskip3]          ;Load array Dx{00}, Dx{01}, ..., Dx{0f}
-                                               ;     "     Dx{00}, Dx{10}, ..., Dx{f0}
-
-       vperm2i128 xgft1_hi, xgft1_lo, xgft1_lo, 0x01 ; swapped to hi | lo
-       vperm2i128 xgft2_hi, xgft2_lo, xgft2_lo, 0x01 ; swapped to hi | lo
-       vperm2i128 xgft3_hi, xgft3_lo, xgft3_lo, 0x01 ; swapped to hi | lo
-       vperm2i128 xgft4_hi, xgft4_lo, xgft4_lo, 0x01 ; swapped to hi | lo
-
-       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
-       vpxor   xp1, xgft1_hi           ;xp1 += partial
-
-       vpshufb xgft2_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft2_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft2_hi, xgft2_lo      ;GF add high and low partials
-       vpxor   xp2, xgft2_hi           ;xp2 += partial
-
-       vmovdqu xgft1_lo, [tmp+vskip1*4]        ;Load array Ex{00}, Ex{01}, ..., Ex{0f}
-                                               ;     "     Ex{00}, Ex{10}, ..., Ex{f0}
-       vperm2i128 xgft1_hi, xgft1_lo, xgft1_lo, 0x01 ; swapped to hi | lo
-       add     tmp, 32
-
-       vpshufb xgft3_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft3_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft3_hi, xgft3_lo      ;GF add high and low partials
-       vpxor   xp3, xgft3_hi           ;xp3 += partial
-
-       vpshufb xgft4_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft4_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft4_hi, xgft4_lo      ;GF add high and low partials
-       vpxor   xp4, xgft4_hi           ;xp4 += partial
-
-       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
-       vpxor   xp5, xgft1_hi           ;xp5 += partial
-
-       cmp     vec_i, vec
-       jl      .next_vect
-
-       mov     tmp, [dest+2*PS]
-       mov     ptr, [dest+3*PS]
-       mov     vec_i, [dest+4*PS]
-
-       XSTR    [dest1+pos], xp1
-       XSTR    [dest2+pos], xp2
-       XSTR    [tmp+pos], xp3
-       XSTR    [ptr+pos], xp4
-       XSTR    [vec_i+pos], xp5
-
-       add     pos, 32                 ;Loop on 32 bytes at a time
-       cmp     pos, len
-       jle     .loop32
-
-       lea     tmp, [len + 32]
-       cmp     pos, tmp
-       je      .return_pass
-
-       ;; Tail len
-       mov     pos, len        ;Overlapped offset length-16
-       jmp     .loop32         ;Do one more overlap pass
-
-.return_pass:
-       FUNC_RESTORE
-       mov     return, 0
-       ret
-
-.return_fail:
-       FUNC_RESTORE
-       mov     return, 1
-       ret
-
-endproc_frame
-
-section .data
-
-;;;       func                  core, ver, snum
-slversion gf_5vect_dot_prod_avx2, 04,  04,  0199

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_dot_prod_sse.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_dot_prod_sse.asm.s
deleted file mode 100644 (file)
index 5c8c903..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_dot_prod_sse.asm.s
+++ /dev/null
@@ -1,304 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_5vect_dot_prod_sse(len, vec, *g_tbls, **buffs, **dests);
-;;;
-
-%include "reg_sizes.asm"
-
-%ifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
-
- %define tmp   r11
- %define tmp2  r10
- %define tmp3  r13             ; must be saved and restored
- %define tmp4  r12             ; must be saved and restored
- %define tmp5  r14             ; must be saved and restored
- %define tmp6  r15             ; must be saved and restored
- %define return rax
- %define PS 8
- %define LOG_PS 3
-
- %define func(x) x:
- %macro FUNC_SAVE 0
-       push    r12
-       push    r13
-       push    r14
-       push    r15
- %endmacro
- %macro FUNC_RESTORE 0
-       pop     r15
-       pop     r14
-       pop     r13
-       pop     r12
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0   rcx
- %define arg1   rdx
- %define arg2   r8
- %define arg3   r9
-
- %define arg4   r12            ; must be saved, loaded and restored
- %define arg5   r15            ; must be saved and restored
- %define tmp    r11
- %define tmp2   r10
- %define tmp3   r13            ; must be saved and restored
- %define tmp4   r14            ; must be saved and restored
- %define tmp5   rdi            ; must be saved and restored
- %define tmp6   rsi            ; must be saved and restored
- %define return rax
- %define PS     8
- %define LOG_PS 3
- %define stack_size  10*16 + 7*8               ; must be an odd multiple of 8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
-
- %define func(x) proc_frame x
- %macro FUNC_SAVE 0
-       alloc_stack     stack_size
-       save_xmm128     xmm6, 0*16
-       save_xmm128     xmm7, 1*16
-       save_xmm128     xmm8, 2*16
-       save_xmm128     xmm9, 3*16
-       save_xmm128     xmm10, 4*16
-       save_xmm128     xmm11, 5*16
-       save_xmm128     xmm12, 6*16
-       save_xmm128     xmm13, 7*16
-       save_xmm128     xmm14, 8*16
-       save_xmm128     xmm15, 9*16
-       save_reg        r12,  10*16 + 0*8
-       save_reg        r13,  10*16 + 1*8
-       save_reg        r14,  10*16 + 2*8
-       save_reg        r15,  10*16 + 3*8
-       save_reg        rdi,  10*16 + 4*8
-       save_reg        rsi,  10*16 + 5*8
-       end_prolog
-       mov     arg4, arg(4)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       movdqa  xmm6, [rsp + 0*16]
-       movdqa  xmm7, [rsp + 1*16]
-       movdqa  xmm8, [rsp + 2*16]
-       movdqa  xmm9, [rsp + 3*16]
-       movdqa  xmm10, [rsp + 4*16]
-       movdqa  xmm11, [rsp + 5*16]
-       movdqa  xmm12, [rsp + 6*16]
-       movdqa  xmm13, [rsp + 7*16]
-       movdqa  xmm14, [rsp + 8*16]
-       movdqa  xmm15, [rsp + 9*16]
-       mov     r12,  [rsp + 10*16 + 0*8]
-       mov     r13,  [rsp + 10*16 + 1*8]
-       mov     r14,  [rsp + 10*16 + 2*8]
-       mov     r15,  [rsp + 10*16 + 3*8]
-       mov     rdi,  [rsp + 10*16 + 4*8]
-       mov     rsi,  [rsp + 10*16 + 5*8]
-       add     rsp, stack_size
- %endmacro
-%endif
-
-%define len    arg0
-%define vec    arg1
-%define mul_array arg2
-%define        src    arg3
-%define dest   arg4
-%define ptr    arg5
-%define vec_i  tmp2
-%define dest1  tmp3
-%define dest2  tmp4
-%define vskip1 tmp5
-%define vskip3 tmp6
-%define pos    return
-
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR movdqu
- %define XSTR movdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR movdqa
-  %define XSTR movdqa
- %else
-  %define XLDR movntdqa
-  %define XSTR movntdq
- %endif
-%endif
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f   xmm15
-%define xgft1_lo  xmm2
-%define xgft1_hi  xmm3
-%define xgft2_lo  xmm4
-%define xgft2_hi  xmm5
-%define xgft3_lo  xmm10
-%define xgft3_hi  xmm6
-%define xgft4_lo  xmm8
-%define xgft4_hi  xmm7
-
-
-%define x0     xmm0
-%define xtmpa  xmm1
-%define xp1    xmm9
-%define xp2    xmm11
-%define xp3    xmm12
-%define xp4    xmm13
-%define xp5    xmm14
-
-align 16
-global gf_5vect_dot_prod_sse:function
-func(gf_5vect_dot_prod_sse)
-       FUNC_SAVE
-       sub     len, 16
-       jl      .return_fail
-       xor     pos, pos
-       movdqa  xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-       mov     vskip1, vec
-       imul    vskip1, 32
-       mov     vskip3, vec
-       imul    vskip3, 96
-       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
-       mov     dest1, [dest]
-       mov     dest2, [dest+PS]
-
-
-.loop16:
-       mov     tmp, mul_array
-       xor     vec_i, vec_i
-       pxor    xp1, xp1
-       pxor    xp2, xp2
-       pxor    xp3, xp3
-       pxor    xp4, xp4
-       pxor    xp5, xp5
-
-
-.next_vect:
-       mov     ptr, [src+vec_i]
-       add     vec_i, PS
-       XLDR    x0, [ptr+pos]           ;Get next source vector
-
-       movdqu  xgft1_lo, [tmp]                 ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
-       movdqu  xgft1_hi, [tmp+16]              ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
-       movdqu  xgft2_lo, [tmp+vskip1*1]        ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-       movdqu  xgft2_hi, [tmp+vskip1*1+16]     ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
-       movdqu  xgft3_lo, [tmp+vskip1*2]        ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
-       movdqu  xgft3_hi, [tmp+vskip1*2+16]     ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
-       movdqu  xgft4_lo, [tmp+vskip3]          ;Load array Dx{00}, Dx{01}, ..., Dx{0f}
-       movdqu  xgft4_hi, [tmp+vskip3+16]       ;     "     Dx{00}, Dx{10}, ..., Dx{f0}
-
-       movdqa  xtmpa, x0               ;Keep unshifted copy of src
-       psraw   x0, 4                   ;Shift to put high nibble into bits 4-0
-       pand    x0, xmask0f             ;Mask high src nibble in bits 4-0
-       pand    xtmpa, xmask0f          ;Mask low src nibble in bits 4-0
-
-       pshufb  xgft1_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft1_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft1_hi, xgft1_lo      ;GF add high and low partials
-       pxor    xp1, xgft1_hi           ;xp1 += partial
-
-       pshufb  xgft2_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft2_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft2_hi, xgft2_lo      ;GF add high and low partials
-       pxor    xp2, xgft2_hi           ;xp2 += partial
-
-       movdqu  xgft1_lo, [tmp+vskip1*4]        ;Load array Ex{00}, Ex{01}, ..., Ex{0f}
-       movdqu  xgft1_hi, [tmp+vskip1*4+16]     ;     "     Ex{00}, Ex{10}, ..., Ex{f0}
-       add     tmp, 32
-
-       pshufb  xgft3_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft3_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft3_hi, xgft3_lo      ;GF add high and low partials
-       pxor    xp3, xgft3_hi           ;xp3 += partial
-
-       pshufb  xgft4_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft4_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft4_hi, xgft4_lo      ;GF add high and low partials
-       pxor    xp4, xgft4_hi           ;xp4 += partial
-
-       pshufb  xgft1_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft1_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft1_hi, xgft1_lo      ;GF add high and low partials
-       pxor    xp5, xgft1_hi           ;xp5 += partial
-
-       cmp     vec_i, vec
-       jl      .next_vect
-
-       mov     tmp, [dest+2*PS]
-       mov     ptr, [dest+3*PS]
-       mov     vec_i, [dest+4*PS]
-
-       XSTR    [dest1+pos], xp1
-       XSTR    [dest2+pos], xp2
-       XSTR    [tmp+pos], xp3
-       XSTR    [ptr+pos], xp4
-       XSTR    [vec_i+pos], xp5
-
-       add     pos, 16                 ;Loop on 16 bytes at a time
-       cmp     pos, len
-       jle     .loop16
-
-       lea     tmp, [len + 16]
-       cmp     pos, tmp
-       je      .return_pass
-
-       ;; Tail len
-       mov     pos, len        ;Overlapped offset length-16
-       jmp     .loop16         ;Do one more overlap pass
-
-.return_pass:
-       FUNC_RESTORE
-       mov     return, 0
-       ret
-
-.return_fail:
-       FUNC_RESTORE
-       mov     return, 1
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-mask0f:        ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-
-;;;       func                  core, ver, snum
-slversion gf_5vect_dot_prod_sse, 00,  05,  0065

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_mad_avx.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_mad_avx.asm.s
deleted file mode 100644 (file)
index 6b534a3..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_mad_avx.asm.s
+++ /dev/null
@@ -1,365 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_5vect_mad_avx(len, vec, vec_i, mul_array, src, dest);
-;;;
-
-%include "reg_sizes.asm"
-
-%define PS 8
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0  rcx
- %define arg0.w ecx
- %define arg1  rdx
- %define arg2  r8
- %define arg3  r9
- %define arg4  r12
- %define arg5  r15
- %define tmp   r11
- %define tmp2   r10
- %define tmp3   r13
- %define tmp4   r14
- %define return rax
- %define return.w eax
- %define stack_size 16*10 + 5*8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
- %define func(x) proc_frame x
-
-%macro FUNC_SAVE 0
-       sub     rsp, stack_size
-       movdqa  [rsp+16*0],xmm6
-       movdqa  [rsp+16*1],xmm7
-       movdqa  [rsp+16*2],xmm8
-       movdqa  [rsp+16*3],xmm9
-       movdqa  [rsp+16*4],xmm10
-       movdqa  [rsp+16*5],xmm11
-       movdqa  [rsp+16*6],xmm12
-       movdqa  [rsp+16*7],xmm13
-       movdqa  [rsp+16*8],xmm14
-       movdqa  [rsp+16*9],xmm15
-       save_reg        r12,  10*16 + 0*8
-       save_reg        r13,  10*16 + 1*8
-       save_reg        r14,  10*16 + 2*8
-       save_reg        r15,  10*16 + 3*8
-       end_prolog
-       mov     arg4, arg(4)
-       mov     arg5, arg(5)
-%endmacro
-
-%macro FUNC_RESTORE 0
-       movdqa  xmm6, [rsp+16*0]
-       movdqa  xmm7, [rsp+16*1]
-       movdqa  xmm8, [rsp+16*2]
-       movdqa  xmm9, [rsp+16*3]
-       movdqa  xmm10, [rsp+16*4]
-       movdqa  xmm11, [rsp+16*5]
-       movdqa  xmm12, [rsp+16*6]
-       movdqa  xmm13, [rsp+16*7]
-       movdqa  xmm14, [rsp+16*8]
-       movdqa  xmm15, [rsp+16*9]
-       mov     r12,  [rsp + 10*16 + 0*8]
-       mov     r13,  [rsp + 10*16 + 1*8]
-       mov     r14,  [rsp + 10*16 + 2*8]
-       mov     r15,  [rsp + 10*16 + 3*8]
-       add     rsp, stack_size
-%endmacro
-
-%elifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg0.w edi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
- %define tmp   r11
- %define tmp2   r10
- %define tmp3   r12
- %define tmp4   r13
- %define return rax
- %define return.w eax
-
- %define func(x) x:
- %macro FUNC_SAVE 0
-       push    r12
-       push    r13
- %endmacro
- %macro FUNC_RESTORE 0
-       pop     r13
-       pop     r12
- %endmacro
-%endif
-
-;;; gf_5vect_mad_avx(len, vec, vec_i, mul_array, src, dest)
-%define len   arg0
-%define len.w arg0.w
-%define vec    arg1
-%define vec_i    arg2
-%define mul_array arg3
-%define        src   arg4
-%define dest1  arg5
-%define pos   return
-%define pos.w return.w
-
-%define dest2 tmp4
-%define dest3 mul_array
-%define dest4 tmp2
-%define dest5 vec_i
-
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR vmovdqu
- %define XSTR vmovdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR vmovdqa
-  %define XSTR vmovdqa
- %else
-  %define XLDR vmovntdqa
-  %define XSTR vmovntdq
- %endif
-%endif
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f  xmm15
-%define xgft5_hi xmm14
-%define xgft4_lo xmm13
-%define xgft4_hi xmm12
-
-%define x0      xmm0
-%define xtmpa   xmm1
-%define xtmph1  xmm2
-%define xtmpl1  xmm3
-%define xtmph2  xmm4
-%define xtmpl2  xmm5
-%define xtmph3  xmm6
-%define xtmpl3  xmm7
-%define xtmph5  xmm8
-%define xtmpl5  xmm9
-%define xd1     xmm10
-%define xd2     xmm11
-%define xd3     xtmpl1
-%define xd4     xtmph1
-%define xd5     xtmpl2
-
-
-align 16
-global gf_5vect_mad_avx:function
-func(gf_5vect_mad_avx)
-       FUNC_SAVE
-       sub     len, 16
-       jl      .return_fail
-       xor     pos, pos
-       vmovdqa xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-       mov     tmp, vec
-       sal     vec_i, 5                ;Multiply by 32
-       lea     tmp3, [mul_array + vec_i]
-       sal     tmp, 6                  ;Multiply by 64
-       vmovdqu xgft5_hi, [tmp3+2*tmp+16]       ;     "     Ex{00}, Ex{10}, ..., Ex{f0}
-       sal     vec, 5                  ;Multiply by 32
-       add     tmp, vec
-       vmovdqu xgft4_hi, [tmp3+tmp+16] ; " Dx{00}, Dx{10}, Dx{20}, ... , Dx{f0}
-       vmovdqu xgft4_lo, [tmp3+tmp]    ;Load array Dx{00}, Dx{01}, Dx{02}, ...
-
-       mov     dest3, [dest1+2*PS]     ; reuse mul_array
-       mov     dest4, [dest1+3*PS]
-       mov     dest5, [dest1+4*PS]     ; reuse vec_i
-       mov     dest2, [dest1+PS]
-       mov     dest1, [dest1]
-
-.loop16:
-       XLDR    x0, [src+pos]           ;Get next source vector
-
-       vmovdqu xtmph1, [tmp3+16]       ; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
-       vmovdqu xtmpl1, [tmp3]          ;Load array Ax{00}, Ax{01}, Ax{02}, ...
-       vmovdqu xtmph2, [tmp3+vec+16]   ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
-       vmovdqu xtmpl2, [tmp3+vec]      ;Load array Bx{00}, Bx{01}, Bx{02}, ...
-       vmovdqu xtmph3, [tmp3+2*vec+16] ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
-       vmovdqu xtmpl3, [tmp3+2*vec]    ;Load array Cx{00}, Cx{01}, Cx{02}, ...
-       vmovdqu xtmpl5, [tmp3+4*vec]    ;Load array Ex{00}, Ex{01}, ..., Ex{0f}
-
-       XLDR    xd1, [dest1+pos]        ;Get next dest vector
-       XLDR    xd2, [dest2+pos]        ;Get next dest vector
-
-       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-
-       ; dest1
-       vpshufb xtmph1, xtmph1, x0              ;Lookup mul table of high nibble
-       vpshufb xtmpl1, xtmpl1, xtmpa           ;Lookup mul table of low nibble
-       vpxor   xtmph1, xtmph1, xtmpl1          ;GF add high and low partials
-       vpxor   xd1, xd1, xtmph1
-
-       XLDR    xd3, [dest3+pos]        ;Reuse xtmpl1, Get next dest vector
-       XLDR    xd4, [dest4+pos]        ;Reuse xtmph1, Get next dest vector
-
-       ; dest2
-       vpshufb xtmph2, xtmph2, x0              ;Lookup mul table of high nibble
-       vpshufb xtmpl2, xtmpl2, xtmpa           ;Lookup mul table of low nibble
-       vpxor   xtmph2, xtmph2, xtmpl2          ;GF add high and low partials
-       vpxor   xd2, xd2, xtmph2
-
-       XLDR    xd5, [dest5+pos]        ;Reuse xtmpl2. Get next dest vector
-
-       ; dest3
-       vpshufb xtmph3, xtmph3, x0              ;Lookup mul table of high nibble
-       vpshufb xtmpl3, xtmpl3, xtmpa           ;Lookup mul table of low nibble
-       vpxor   xtmph3, xtmph3, xtmpl3          ;GF add high and low partials
-       vpxor   xd3, xd3, xtmph3
-
-       ; dest4
-       vpshufb xtmph2, xgft4_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xtmpl3, xgft4_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xtmph2, xtmph2, xtmpl3          ;GF add high and low partials
-       vpxor   xd4, xd4, xtmph2
-
-       ; dest5
-       vpshufb xtmph5, xgft5_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xtmpl5, xtmpl5, xtmpa           ;Lookup mul table of low nibble
-       vpxor   xtmph5, xtmph5, xtmpl5  ;GF add high and low partials
-       vpxor   xd5, xd5, xtmph5
-
-       XSTR    [dest1+pos], xd1        ;Store result into dest1
-       XSTR    [dest2+pos], xd2        ;Store result into dest2
-       XSTR    [dest3+pos], xd3        ;Store result into dest3
-       XSTR    [dest4+pos], xd4        ;Store result into dest4
-       XSTR    [dest5+pos], xd5        ;Store result into dest5
-
-       add     pos, 16                 ;Loop on 16 bytes at a time
-       cmp     pos, len
-       jle     .loop16
-
-       lea     tmp, [len + 16]
-       cmp     pos, tmp
-       je      .return_pass
-
-.lessthan16:
-       ;; Tail len
-       ;; Do one more overlap pass
-       mov     tmp, len        ;Overlapped offset length-16
-       XLDR    x0, [src+tmp]           ;Get next source vector
-
-       sub     len, pos
-
-       vmovdqa xtmph1, [constip16]     ;Load const of i + 16
-       vpinsrb xtmph5, len.w, 15
-       vpshufb xtmph5, xmask0f         ;Broadcast len to all bytes
-       vpcmpgtb        xtmph5, xtmph5, xtmph1
-
-       vmovdqu xtmph1, [tmp3+16]       ; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
-       vmovdqu xtmpl1, [tmp3]          ;Load array Ax{00}, Ax{01}, Ax{02}, ...
-       vmovdqu xtmph2, [tmp3+vec+16]   ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
-       vmovdqu xtmpl2, [tmp3+vec]      ;Load array Bx{00}, Bx{01}, Bx{02}, ...
-       vmovdqu xtmph3, [tmp3+2*vec+16] ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
-       vmovdqu xtmpl3, [tmp3+2*vec]    ;Load array Cx{00}, Cx{01}, Cx{02}, ...
-       vmovdqu xtmpl5, [tmp3+4*vec]    ;Load array Ex{00}, Ex{01}, ..., Ex{0f}
-
-       XLDR    xd1, [dest1+tmp]        ;Get next dest vector
-       XLDR    xd2, [dest2+tmp]        ;Get next dest vector
-
-       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-
-       ; dest1
-       vpshufb xtmph1, xtmph1, x0              ;Lookup mul table of high nibble
-       vpshufb xtmpl1, xtmpl1, xtmpa           ;Lookup mul table of low nibble
-       vpxor   xtmph1, xtmph1, xtmpl1          ;GF add high and low partials
-       vpand   xtmph1, xtmph1, xtmph5
-       vpxor   xd1, xd1, xtmph1
-
-       XLDR    xd3, [dest3+tmp]        ;Reuse xtmpl1, Get next dest vector
-       XLDR    xd4, [dest4+tmp]        ;Reuse xtmph1, Get next dest vector
-
-       ; dest2
-       vpshufb xtmph2, xtmph2, x0              ;Lookup mul table of high nibble
-       vpshufb xtmpl2, xtmpl2, xtmpa           ;Lookup mul table of low nibble
-       vpxor   xtmph2, xtmph2, xtmpl2          ;GF add high and low partials
-       vpand   xtmph2, xtmph2, xtmph5
-       vpxor   xd2, xd2, xtmph2
-
-       XLDR    xd5, [dest5+tmp]        ;Reuse xtmpl2. Get next dest vector
-
-       ; dest3
-       vpshufb xtmph3, xtmph3, x0              ;Lookup mul table of high nibble
-       vpshufb xtmpl3, xtmpl3, xtmpa           ;Lookup mul table of low nibble
-       vpxor   xtmph3, xtmph3, xtmpl3          ;GF add high and low partials
-       vpand   xtmph3, xtmph3, xtmph5
-       vpxor   xd3, xd3, xtmph3
-
-       ; dest4
-       vpshufb xgft4_hi, xgft4_hi, x0          ;Lookup mul table of high nibble
-       vpshufb xgft4_lo, xgft4_lo, xtmpa               ;Lookup mul table of low nibble
-       vpxor   xgft4_hi, xgft4_hi, xgft4_lo            ;GF add high and low partials
-       vpand   xgft4_hi, xgft4_hi, xtmph5
-       vpxor   xd4, xd4, xgft4_hi
-
-       ; dest5
-       vpshufb xgft5_hi, xgft5_hi, x0          ;Lookup mul table of high nibble
-       vpshufb xtmpl5, xtmpl5, xtmpa           ;Lookup mul table of low nibble
-       vpxor   xgft5_hi, xgft5_hi, xtmpl5      ;GF add high and low partials
-       vpand   xgft5_hi, xgft5_hi, xtmph5
-       vpxor   xd5, xd5, xgft5_hi
-
-       XSTR    [dest1+tmp], xd1        ;Store result into dest1
-       XSTR    [dest2+tmp], xd2        ;Store result into dest2
-       XSTR    [dest3+tmp], xd3        ;Store result into dest3
-       XSTR    [dest4+tmp], xd4        ;Store result into dest4
-       XSTR    [dest5+tmp], xd5        ;Store result into dest5
-
-.return_pass:
-       FUNC_RESTORE
-       mov     return, 0
-       ret
-
-.return_fail:
-       FUNC_RESTORE
-       mov     return, 1
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-mask0f:        ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-constip16:
-       ddq 0xf0f1f2f3f4f5f6f7f8f9fafbfcfdfeff
-
-;;;       func             core, ver, snum
-slversion gf_5vect_mad_avx, 02,  01,  020d

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_mad_avx2.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_mad_avx2.asm.s
deleted file mode 100644 (file)
index b495c21..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_mad_avx2.asm.s
+++ /dev/null
@@ -1,363 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_5vect_mad_avx2(len, vec, vec_i, mul_array, src, dest);
-;;;
-
-%include "reg_sizes.asm"
-
-%define PS 8
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0  rcx
- %define arg0.w ecx
- %define arg1  rdx
- %define arg2  r8
- %define arg3  r9
- %define arg4  r12
- %define arg5  r15
- %define tmp    r11
- %define tmp.w  r11d
- %define tmp.b  r11b
- %define tmp2   r10
- %define return rax
- %define return.w eax
- %define stack_size 16*10 + 3*8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
- %define func(x) proc_frame x
-
-%macro FUNC_SAVE 0
-       sub     rsp, stack_size
-       movdqa  [rsp+16*0],xmm6
-       movdqa  [rsp+16*1],xmm7
-       movdqa  [rsp+16*2],xmm8
-       movdqa  [rsp+16*3],xmm9
-       movdqa  [rsp+16*4],xmm10
-       movdqa  [rsp+16*5],xmm11
-       movdqa  [rsp+16*6],xmm12
-       movdqa  [rsp+16*7],xmm13
-       movdqa  [rsp+16*8],xmm14
-       movdqa  [rsp+16*9],xmm15
-       save_reg        r12,  10*16 + 0*8
-       save_reg        r15,  10*16 + 1*8
-       end_prolog
-       mov     arg4, arg(4)
-       mov     arg5, arg(5)
-%endmacro
-
-%macro FUNC_RESTORE 0
-       movdqa  xmm6, [rsp+16*0]
-       movdqa  xmm7, [rsp+16*1]
-       movdqa  xmm8, [rsp+16*2]
-       movdqa  xmm9, [rsp+16*3]
-       movdqa  xmm10, [rsp+16*4]
-       movdqa  xmm11, [rsp+16*5]
-       movdqa  xmm12, [rsp+16*6]
-       movdqa  xmm13, [rsp+16*7]
-       movdqa  xmm14, [rsp+16*8]
-       movdqa  xmm15, [rsp+16*9]
-       mov     r12,  [rsp + 10*16 + 0*8]
-       mov     r15,  [rsp + 10*16 + 1*8]
-       add     rsp, stack_size
-%endmacro
-
-%elifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg0.w edi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
- %define tmp    r11
- %define tmp.w  r11d
- %define tmp.b  r11b
- %define tmp2   r10
- %define return rax
- %define return.w eax
-
- %define func(x) x:
- %define FUNC_SAVE
- %define FUNC_RESTORE
-%endif
-
-;;; gf_5vect_mad_avx2(len, vec, vec_i, mul_array, src, dest)
-%define len   arg0
-%define len.w arg0.w
-%define vec    arg1
-%define vec_i    arg2
-%define mul_array arg3
-%define        src   arg4
-%define dest1  arg5
-%define pos   return
-%define pos.w return.w
-
-%define dest2 tmp2
-%define dest3 mul_array
-%define dest4 vec
-%define dest5 vec_i
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR vmovdqu
- %define XSTR vmovdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR vmovdqa
-  %define XSTR vmovdqa
- %else
-  %define XLDR vmovntdqa
-  %define XSTR vmovntdq
- %endif
-%endif
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f   ymm15
-%define xmask0fx  xmm15
-%define xgft1_lo  ymm14
-%define xgft2_lo  ymm13
-%define xgft3_lo  ymm12
-%define xgft4_lo  ymm11
-%define xgft5_lo  ymm10
-
-%define x0      ymm0
-%define xtmpa   ymm1
-%define xtmpl   ymm2
-%define xtmplx  xmm2
-%define xtmph1  ymm3
-%define xtmph1x xmm3
-%define xtmph2  ymm4
-%define xd1     ymm5
-%define xd2     ymm6
-%define xd3     ymm7
-%define xd4     ymm8
-%define xd5     ymm9
-
-align 16
-global gf_5vect_mad_avx2:function
-func(gf_5vect_mad_avx2)
-       FUNC_SAVE
-       sub     len, 32
-       jl      .return_fail
-       xor     pos, pos
-       mov     tmp.b, 0x0f
-       vpinsrb xmask0fx, xmask0fx, tmp.w, 0
-       vpbroadcastb xmask0f, xmask0fx  ;Construct mask 0x0f0f0f...
-
-       sal     vec_i, 5                ;Multiply by 32
-       sal     vec, 5                  ;Multiply by 32
-       lea     tmp, [mul_array + vec_i]
-
-       vmovdqu xgft1_lo, [tmp]                 ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
-                                               ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
-       vmovdqu xgft2_lo, [tmp+vec]             ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-                                               ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
-       vmovdqu xgft3_lo, [tmp+2*vec]           ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
-                                               ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
-       vmovdqu xgft5_lo, [tmp+4*vec]           ;Load array Ex{00}, Ex{01}, ..., Ex{0f}
-                                               ;     "     Ex{00}, Ex{10}, ..., Ex{f0}
-       add     tmp, vec
-       vmovdqu xgft4_lo, [tmp+2*vec]           ;Load array Dx{00}, Dx{01}, ..., Dx{0f}
-                                               ;     "     Dx{00}, Dx{10}, ..., Dx{f0}
-
-       mov     dest3, [dest1+2*PS]     ; reuse mul_array
-       mov     dest4, [dest1+3*PS]     ; reuse vec
-       mov     dest5, [dest1+4*PS]     ; reuse vec_i
-       mov     dest2, [dest1+PS]
-       mov     dest1, [dest1]
-
-.loop32:
-       XLDR    x0, [src+pos]           ;Get next source vector
-
-       XLDR    xd1, [dest1+pos]        ;Get next dest vector
-       XLDR    xd2, [dest2+pos]        ;Get next dest vector
-       XLDR    xd3, [dest3+pos]        ;Get next dest vector
-       XLDR    xd4, [dest4+pos]        ;Get next dest vector
-       XLDR    xd5, [dest5+pos]        ;Get next dest vector
-
-       vpand   xtmpl, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-       vperm2i128 xtmpa, xtmpl, x0, 0x30       ;swap xtmpa from 1lo|2lo to 1lo|2hi
-       vperm2i128 x0, xtmpl, x0, 0x12  ;swap x0 from    1hi|2hi to 1hi|2lo
-
-       vperm2i128 xtmph1, xgft1_lo, xgft1_lo, 0x01 ; swapped to hi | lo
-       vperm2i128 xtmph2, xgft2_lo, xgft2_lo, 0x01 ; swapped to hi | lo
-
-       ; dest1
-       vpshufb xtmph1, xtmph1, x0              ;Lookup mul table of high nibble
-       vpshufb xtmpl, xgft1_lo, xtmpa          ;Lookup mul table of low nibble
-       vpxor   xtmph1, xtmph1, xtmpl           ;GF add high and low partials
-       vpxor   xd1, xd1, xtmph1                ;xd1 += partial
-
-       vperm2i128 xtmph1, xgft3_lo, xgft3_lo, 0x01 ; swapped to hi | lo
-       ; dest2
-       vpshufb xtmph2, xtmph2, x0              ;Lookup mul table of high nibble
-       vpshufb xtmpl, xgft2_lo, xtmpa          ;Lookup mul table of low nibble
-       vpxor   xtmph2, xtmph2, xtmpl           ;GF add high and low partials
-       vpxor   xd2, xd2, xtmph2                ;xd2 += partial
-
-       vperm2i128 xtmph2, xgft4_lo, xgft4_lo, 0x01 ; swapped to hi | lo
-       ; dest3
-       vpshufb xtmph1, xtmph1, x0              ;Lookup mul table of high nibble
-       vpshufb xtmpl, xgft3_lo, xtmpa          ;Lookup mul table of low nibble
-       vpxor   xtmph1, xtmph1, xtmpl           ;GF add high and low partials
-       vpxor   xd3, xd3, xtmph1                ;xd3 += partial
-
-       vperm2i128 xtmph1, xgft5_lo, xgft5_lo, 0x01 ; swapped to hi | lo
-       ; dest4
-       vpshufb xtmph2, xtmph2, x0              ;Lookup mul table of high nibble
-       vpshufb xtmpl, xgft4_lo, xtmpa          ;Lookup mul table of low nibble
-       vpxor   xtmph2, xtmph2, xtmpl           ;GF add high and low partials
-       vpxor   xd4, xd4, xtmph2                ;xd4 += partial
-
-       ; dest5
-       vpshufb xtmph1, xtmph1, x0              ;Lookup mul table of high nibble
-       vpshufb xtmpl, xgft5_lo, xtmpa          ;Lookup mul table of low nibble
-       vpxor   xtmph1, xtmph1, xtmpl           ;GF add high and low partials
-       vpxor   xd5, xd5, xtmph1                ;xd5 += partial
-
-       XSTR    [dest1+pos], xd1
-       XSTR    [dest2+pos], xd2
-       XSTR    [dest3+pos], xd3
-       XSTR    [dest4+pos], xd4
-       XSTR    [dest5+pos], xd5
-
-       add     pos, 32                 ;Loop on 32 bytes at a time
-       cmp     pos, len
-       jle     .loop32
-
-       lea     tmp, [len + 32]
-       cmp     pos, tmp
-       je      .return_pass
-
-.lessthan32:
-       ;; Tail len
-       ;; Do one more overlap pass
-       mov     tmp.b, 0x1f
-       vpinsrb xtmph1x, xtmph1x, tmp.w, 0
-       vpbroadcastb xtmph1, xtmph1x    ;Construct mask 0x1f1f1f...
-
-       mov     tmp, len                ;Overlapped offset length-32
-
-       XLDR    x0, [src+tmp]           ;Get next source vector
-
-       XLDR    xd1, [dest1+tmp]        ;Get next dest vector
-       XLDR    xd2, [dest2+tmp]        ;Get next dest vector
-       XLDR    xd3, [dest3+tmp]        ;Get next dest vector
-       XLDR    xd4, [dest4+tmp]        ;Get next dest vector
-       XLDR    xd5, [dest5+tmp]        ;Get next dest vector
-
-       sub     len, pos
-
-       vmovdqa xtmph2, [constip32]     ;Load const of i + 32
-       vpinsrb xtmplx, xtmplx, len.w, 15
-       vinserti128     xtmpl, xtmpl, xtmplx, 1 ;swapped to xtmplx | xtmplx
-       vpshufb xtmpl, xtmpl, xtmph1    ;Broadcast len to all bytes. xtmph1=0x1f1f1f...
-       vpcmpgtb        xtmpl, xtmpl, xtmph2
-
-       vpand   xtmph1, x0, xmask0f     ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-       vperm2i128 xtmpa, xtmph1, x0, 0x30      ;swap xtmpa from 1lo|2lo to 1lo|2hi
-       vperm2i128 x0, xtmph1, x0, 0x12 ;swap x0 from    1hi|2hi to 1hi|2lo
-
-       vperm2i128 xtmph1, xgft1_lo, xgft1_lo, 0x01 ; swapped to hi | lo
-       vperm2i128 xtmph2, xgft2_lo, xgft2_lo, 0x01 ; swapped to hi | lo
-
-       ; dest1
-       vpshufb xtmph1, xtmph1, x0              ;Lookup mul table of high nibble
-       vpshufb xgft1_lo, xgft1_lo, xtmpa       ;Lookup mul table of low nibble
-       vpxor   xtmph1, xtmph1, xgft1_lo        ;GF add high and low partials
-       vpand   xtmph1, xtmph1, xtmpl
-       vpxor   xd1, xd1, xtmph1                ;xd1 += partial
-
-       vperm2i128 xtmph1, xgft3_lo, xgft3_lo, 0x01 ; swapped to hi | lo
-       ; dest2
-       vpshufb xtmph2, xtmph2, x0              ;Lookup mul table of high nibble
-       vpshufb xgft2_lo, xgft2_lo, xtmpa       ;Lookup mul table of low nibble
-       vpxor   xtmph2, xtmph2, xgft2_lo        ;GF add high and low partials
-       vpand   xtmph2, xtmph2, xtmpl
-       vpxor   xd2, xd2, xtmph2                ;xd2 += partial
-
-       vperm2i128 xtmph2, xgft4_lo, xgft4_lo, 0x01 ; swapped to hi | lo
-       ; dest3
-       vpshufb xtmph1, xtmph1, x0              ;Lookup mul table of high nibble
-       vpshufb xgft3_lo, xgft3_lo, xtmpa       ;Lookup mul table of low nibble
-       vpxor   xtmph1, xtmph1, xgft3_lo        ;GF add high and low partials
-       vpand   xtmph1, xtmph1, xtmpl
-       vpxor   xd3, xd3, xtmph1                ;xd3 += partial
-
-       vperm2i128 xtmph1, xgft5_lo, xgft5_lo, 0x01 ; swapped to hi | lo
-       ; dest4
-       vpshufb xtmph2, xtmph2, x0              ;Lookup mul table of high nibble
-       vpshufb xgft4_lo, xgft4_lo, xtmpa       ;Lookup mul table of low nibble
-       vpxor   xtmph2, xtmph2, xgft4_lo        ;GF add high and low partials
-       vpand   xtmph2, xtmph2, xtmpl
-       vpxor   xd4, xd4, xtmph2                ;xd4 += partial
-
-       ; dest5
-       vpshufb xtmph1, xtmph1, x0              ;Lookup mul table of high nibble
-       vpshufb xgft5_lo, xgft5_lo, xtmpa       ;Lookup mul table of low nibble
-       vpxor   xtmph1, xtmph1, xgft5_lo        ;GF add high and low partials
-       vpand   xtmph1, xtmph1, xtmpl
-       vpxor   xd5, xd5, xtmph1                ;xd5 += partial
-
-       XSTR    [dest1+tmp], xd1
-       XSTR    [dest2+tmp], xd2
-       XSTR    [dest3+tmp], xd3
-       XSTR    [dest4+tmp], xd4
-       XSTR    [dest5+tmp], xd5
-
-.return_pass:
-       FUNC_RESTORE
-       mov     return, 0
-       ret
-
-.return_fail:
-       FUNC_RESTORE
-       mov     return, 1
-       ret
-
-endproc_frame
-
-section .data
-align 32
-constip32:
-       ddq 0xf0f1f2f3f4f5f6f7f8f9fafbfcfdfeff
-       ddq 0xe0e1e2e3e4e5e6e7e8e9eaebecedeeef
-
-;;;       func             core, ver, snum
-slversion gf_5vect_mad_avx2, 04,  01,  020e

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_mad_sse.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_mad_sse.asm.s
deleted file mode 100644 (file)
index b26d4bc..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_mad_sse.asm.s
+++ /dev/null
@@ -1,373 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_5vect_mad_sse(len, vec, vec_i, mul_array, src, dest);
-;;;
-
-%include "reg_sizes.asm"
-
-%define PS 8
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0  rcx
- %define arg0.w ecx
- %define arg1  rdx
- %define arg2  r8
- %define arg3  r9
- %define arg4  r12
- %define arg5  r15
- %define tmp   r11
- %define tmp2   r10
- %define tmp3   r13
- %define tmp4   r14
- %define return rax
- %define return.w eax
- %define stack_size 16*10 + 5*8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
- %define func(x) proc_frame x
-
-%macro FUNC_SAVE 0
-       sub     rsp, stack_size
-       movdqa  [rsp+16*0],xmm6
-       movdqa  [rsp+16*1],xmm7
-       movdqa  [rsp+16*2],xmm8
-       movdqa  [rsp+16*3],xmm9
-       movdqa  [rsp+16*4],xmm10
-       movdqa  [rsp+16*5],xmm11
-       movdqa  [rsp+16*6],xmm12
-       movdqa  [rsp+16*7],xmm13
-       movdqa  [rsp+16*8],xmm14
-       movdqa  [rsp+16*9],xmm15
-       save_reg        r12,  10*16 + 0*8
-       save_reg        r13,  10*16 + 1*8
-       save_reg        r14,  10*16 + 2*8
-       save_reg        r15,  10*16 + 3*8
-       end_prolog
-       mov     arg4, arg(4)
-       mov     arg5, arg(5)
-%endmacro
-
-%macro FUNC_RESTORE 0
-       movdqa  xmm6, [rsp+16*0]
-       movdqa  xmm7, [rsp+16*1]
-       movdqa  xmm8, [rsp+16*2]
-       movdqa  xmm9, [rsp+16*3]
-       movdqa  xmm10, [rsp+16*4]
-       movdqa  xmm11, [rsp+16*5]
-       movdqa  xmm12, [rsp+16*6]
-       movdqa  xmm13, [rsp+16*7]
-       movdqa  xmm14, [rsp+16*8]
-       movdqa  xmm15, [rsp+16*9]
-       mov     r12,  [rsp + 10*16 + 0*8]
-       mov     r13,  [rsp + 10*16 + 1*8]
-       mov     r14,  [rsp + 10*16 + 2*8]
-       mov     r15,  [rsp + 10*16 + 3*8]
-       add     rsp, stack_size
-%endmacro
-
-%elifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg0.w edi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
- %define tmp   r11
- %define tmp2   r10
- %define tmp3   r12
- %define tmp4   r13
- %define return rax
- %define return.w eax
-
- %define func(x) x:
- %macro FUNC_SAVE 0
-       push    r12
-       push    r13
- %endmacro
- %macro FUNC_RESTORE 0
-       pop     r13
-       pop     r12
- %endmacro
-%endif
-
-;;; gf_5vect_mad_sse(len, vec, vec_i, mul_array, src, dest)
-%define len   arg0
-%define len.w arg0.w
-%define vec    arg1
-%define vec_i    arg2
-%define mul_array arg3
-%define        src   arg4
-%define dest1  arg5
-%define pos   return
-%define pos.w return.w
-
-%define dest2 tmp4
-%define dest3 mul_array
-%define dest4 tmp2
-%define dest5 vec_i
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR movdqu
- %define XSTR movdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR movdqa
-  %define XSTR movdqa
- %else
-  %define XLDR movntdqa
-  %define XSTR movntdq
- %endif
-%endif
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f  xmm15
-%define xgft5_hi xmm14
-%define xgft4_lo xmm13
-%define xgft4_hi xmm12
-
-%define x0      xmm0
-%define xtmpa   xmm1
-%define xtmph1  xmm2
-%define xtmpl1  xmm3
-%define xtmph2  xmm4
-%define xtmpl2  xmm5
-%define xtmph3  xmm6
-%define xtmpl3  xmm7
-%define xtmph5  xmm8
-%define xtmpl5  xmm9
-%define xd1     xmm10
-%define xd2     xmm11
-%define xd3     xtmpl1
-%define xd4     xtmph1
-%define xd5     xtmpl2
-
-
-align 16
-global gf_5vect_mad_sse:function
-func(gf_5vect_mad_sse)
-       FUNC_SAVE
-       sub     len, 16
-       jl      .return_fail
-       xor     pos, pos
-
-       movdqa  xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-       mov     tmp, vec
-       sal     vec_i, 5                ;Multiply by 32
-       lea     tmp3, [mul_array + vec_i]
-       sal     tmp, 6                  ;Multiply by 64
-       movdqu  xgft5_hi, [tmp3+2*tmp+16]       ;     "     Ex{00}, Ex{10}, ..., Ex{f0}
-       sal     vec, 5                  ;Multiply by 32
-       add     tmp, vec
-       movdqu  xgft4_hi, [tmp3+tmp+16] ; " Dx{00}, Dx{10}, Dx{20}, ... , Dx{f0}
-       movdqu  xgft4_lo, [tmp3+tmp]    ;Load array Dx{00}, Dx{01}, Dx{02}, ...
-
-       mov     dest3, [dest1+2*PS]     ; reuse mul_array
-       mov     dest4, [dest1+3*PS]
-       mov     dest5, [dest1+4*PS]     ; reuse vec_i
-       mov     dest2, [dest1+PS]
-       mov     dest1, [dest1]
-
-.loop16:
-       XLDR    x0, [src+pos]           ;Get next source vector
-
-       movdqu  xtmph1, [tmp3+16]       ; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
-       movdqu  xtmpl1, [tmp3]          ;Load array Ax{00}, Ax{01}, Ax{02}, ...
-       movdqu  xtmph2, [tmp3+vec+16]   ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
-       movdqu  xtmpl2, [tmp3+vec]      ;Load array Bx{00}, Bx{01}, Bx{02}, ...
-       movdqu  xtmph3, [tmp3+2*vec+16] ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
-       movdqu  xtmpl3, [tmp3+2*vec]    ;Load array Cx{00}, Cx{01}, Cx{02}, ...
-       movdqu  xtmpl5, [tmp3+4*vec]    ;Load array Ex{00}, Ex{01}, ..., Ex{0f}
-       movdqa  xtmph5, xgft5_hi                ;Reload const array registers
-
-       XLDR    xd1, [dest1+pos]        ;Get next dest vector
-       XLDR    xd2, [dest2+pos]        ;Get next dest vector
-
-       movdqa  xtmpa, x0               ;Keep unshifted copy of src
-       psraw   x0, 4                   ;Shift to put high nibble into bits 4-0
-       pand    x0, xmask0f             ;Mask high src nibble in bits 4-0
-       pand    xtmpa, xmask0f          ;Mask low src nibble in bits 4-0
-
-       ; dest1
-       pshufb  xtmph1, x0              ;Lookup mul table of high nibble
-       pshufb  xtmpl1, xtmpa           ;Lookup mul table of low nibble
-       pxor    xtmph1, xtmpl1          ;GF add high and low partials
-       pxor    xd1, xtmph1
-
-       XLDR    xd3, [dest3+pos]        ;Reuse xtmpl1, Get next dest vector
-       XLDR    xd4, [dest4+pos]        ;Reuse xtmph1. Get next dest vector
-
-       ; dest2
-       pshufb  xtmph2, x0              ;Lookup mul table of high nibble
-       pshufb  xtmpl2, xtmpa           ;Lookup mul table of low nibble
-       pxor    xtmph2, xtmpl2          ;GF add high and low partials
-       pxor    xd2, xtmph2
-
-       XLDR    xd5, [dest5+pos]        ;Reuse xtmpl2. Get next dest vector
-
-       ; dest3
-       pshufb  xtmph3, x0              ;Lookup mul table of high nibble
-       pshufb  xtmpl3, xtmpa           ;Lookup mul table of low nibble
-       pxor    xtmph3, xtmpl3          ;GF add high and low partials
-       pxor    xd3, xtmph3
-
-       movdqa  xtmph2, xgft4_hi                ;Reload const array registers
-       movdqa  xtmpl3, xgft4_lo                ;Reload const array registers
-
-       ; dest5
-       pshufb  xtmph5, x0              ;Lookup mul table of high nibble
-       pshufb  xtmpl5, xtmpa           ;Lookup mul table of low nibble
-       pxor    xtmph5, xtmpl5          ;GF add high and low partials
-       pxor    xd5, xtmph5
-
-       ; dest4
-       pshufb  xtmph2, x0              ;Lookup mul table of high nibble
-       pshufb  xtmpl3, xtmpa           ;Lookup mul table of low nibble
-       pxor    xtmph2, xtmpl3          ;GF add high and low partials
-       pxor    xd4, xtmph2
-
-       XSTR    [dest1+pos], xd1        ;Store result into dest1
-       XSTR    [dest2+pos], xd2        ;Store result into dest2
-       XSTR    [dest3+pos], xd3        ;Store result into dest3
-       XSTR    [dest4+pos], xd4        ;Store result into dest4
-       XSTR    [dest5+pos], xd5        ;Store result into dest5
-
-       add     pos, 16                 ;Loop on 16 bytes at a time
-       cmp     pos, len
-       jle     .loop16
-
-       lea     tmp, [len + 16]
-       cmp     pos, tmp
-       je      .return_pass
-
-.lessthan16:
-       ;; Tail len
-       ;; Do one more overlap pass
-       mov     tmp, len        ;Overlapped offset length-16
-       XLDR    x0, [src+tmp]           ;Get next source vector
-
-       sub     len, pos
-
-       movdqa  xtmpl1, [constip16]     ;Load const of i + 16
-       pinsrb  xtmph5, len.w, 15
-       pshufb  xtmph5, xmask0f         ;Broadcast len to all bytes
-       pcmpgtb xtmph5, xtmpl1
-
-       movdqu  xtmph1, [tmp3+16]       ; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
-       movdqu  xtmpl1, [tmp3]          ;Load array Ax{00}, Ax{01}, Ax{02}, ...
-       movdqu  xtmph2, [tmp3+vec+16]   ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
-       movdqu  xtmpl2, [tmp3+vec]      ;Load array Bx{00}, Bx{01}, Bx{02}, ...
-       movdqu  xtmph3, [tmp3+2*vec+16] ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
-       movdqu  xtmpl3, [tmp3+2*vec]    ;Load array Cx{00}, Cx{01}, Cx{02}, ...
-       movdqu  xtmpl5, [tmp3+4*vec]    ;Load array Ex{00}, Ex{01}, ..., Ex{0f}
-
-       XLDR    xd1, [dest1+tmp]        ;Get next dest vector
-       XLDR    xd2, [dest2+tmp]        ;Get next dest vector
-
-       movdqa  xtmpa, x0               ;Keep unshifted copy of src
-       psraw   x0, 4                   ;Shift to put high nibble into bits 4-0
-       pand    x0, xmask0f             ;Mask high src nibble in bits 4-0
-       pand    xtmpa, xmask0f          ;Mask low src nibble in bits 4-0
-
-       ; dest1
-       pshufb  xtmph1, x0              ;Lookup mul table of high nibble
-       pshufb  xtmpl1, xtmpa           ;Lookup mul table of low nibble
-       pxor    xtmph1, xtmpl1          ;GF add high and low partials
-       pand    xtmph1, xtmph5
-       pxor    xd1, xtmph1
-
-       XLDR    xd3, [dest3+tmp]        ;Reuse xtmpl1, Get next dest vector
-       XLDR    xd4, [dest4+tmp]        ;Reuse xtmph1. Get next dest vector
-
-       ; dest2
-       pshufb  xtmph2, x0              ;Lookup mul table of high nibble
-       pshufb  xtmpl2, xtmpa           ;Lookup mul table of low nibble
-       pxor    xtmph2, xtmpl2          ;GF add high and low partials
-       pand    xtmph2, xtmph5
-       pxor    xd2, xtmph2
-
-       XLDR    xd5, [dest5+tmp]        ;Reuse xtmpl2. Get next dest vector
-
-       ; dest3
-       pshufb  xtmph3, x0              ;Lookup mul table of high nibble
-       pshufb  xtmpl3, xtmpa           ;Lookup mul table of low nibble
-       pxor    xtmph3, xtmpl3          ;GF add high and low partials
-       pand    xtmph3, xtmph5
-       pxor    xd3, xtmph3
-
-       ; dest4
-       pshufb  xgft4_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft4_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft4_hi, xgft4_lo              ;GF add high and low partials
-       pand    xgft4_hi, xtmph5
-       pxor    xd4, xgft4_hi
-
-       ; dest5
-       pshufb  xgft5_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xtmpl5, xtmpa           ;Lookup mul table of low nibble
-       pxor    xgft5_hi, xtmpl5                ;GF add high and low partials
-       pand    xgft5_hi, xtmph5
-       pxor    xd5, xgft5_hi
-
-       XSTR    [dest1+tmp], xd1        ;Store result into dest1
-       XSTR    [dest2+tmp], xd2        ;Store result into dest2
-       XSTR    [dest3+tmp], xd3        ;Store result into dest3
-       XSTR    [dest4+tmp], xd4        ;Store result into dest4
-       XSTR    [dest5+tmp], xd5        ;Store result into dest5
-
-.return_pass:
-       FUNC_RESTORE
-       mov     return, 0
-       ret
-
-.return_fail:
-       FUNC_RESTORE
-       mov     return, 1
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-
-mask0f:
-       ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-constip16:
-       ddq 0xf0f1f2f3f4f5f6f7f8f9fafbfcfdfeff
-
-;;;       func             core, ver, snum
-slversion gf_5vect_mad_sse, 00,  01,  020c

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_dot_prod_avx.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_dot_prod_avx.asm.s
deleted file mode 100644 (file)
index fb29f76..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_dot_prod_avx.asm.s
+++ /dev/null
@@ -1,315 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_6vect_dot_prod_avx(len, vec, *g_tbls, **buffs, **dests);
-;;;
-
-%include "reg_sizes.asm"
-
-%ifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
-
- %define tmp   r11
- %define tmp2  r10
- %define tmp3  r13             ; must be saved and restored
- %define tmp4  r12             ; must be saved and restored
- %define tmp5  r14             ; must be saved and restored
- %define tmp6  r15             ; must be saved and restored
- %define return rax
- %define PS 8
- %define LOG_PS 3
-
- %define func(x) x:
- %macro FUNC_SAVE 0
-       push    r12
-       push    r13
-       push    r14
-       push    r15
- %endmacro
- %macro FUNC_RESTORE 0
-       pop     r15
-       pop     r14
-       pop     r13
-       pop     r12
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0   rcx
- %define arg1   rdx
- %define arg2   r8
- %define arg3   r9
-
- %define arg4   r12            ; must be saved, loaded and restored
- %define arg5   r15            ; must be saved and restored
- %define tmp    r11
- %define tmp2   r10
- %define tmp3   r13            ; must be saved and restored
- %define tmp4   r14            ; must be saved and restored
- %define tmp5   rdi            ; must be saved and restored
- %define tmp6   rsi            ; must be saved and restored
- %define return rax
- %define PS     8
- %define LOG_PS 3
- %define stack_size  10*16 + 7*8               ; must be an odd multiple of 8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
-
- %define func(x) proc_frame x
- %macro FUNC_SAVE 0
-       alloc_stack     stack_size
-       save_xmm128     xmm6, 0*16
-       save_xmm128     xmm7, 1*16
-       save_xmm128     xmm8, 2*16
-       save_xmm128     xmm9, 3*16
-       save_xmm128     xmm10, 4*16
-       save_xmm128     xmm11, 5*16
-       save_xmm128     xmm12, 6*16
-       save_xmm128     xmm13, 7*16
-       save_xmm128     xmm14, 8*16
-       save_xmm128     xmm15, 9*16
-       save_reg        r12,  10*16 + 0*8
-       save_reg        r13,  10*16 + 1*8
-       save_reg        r14,  10*16 + 2*8
-       save_reg        r15,  10*16 + 3*8
-       save_reg        rdi,  10*16 + 4*8
-       save_reg        rsi,  10*16 + 5*8
-       end_prolog
-       mov     arg4, arg(4)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       vmovdqa xmm6, [rsp + 0*16]
-       vmovdqa xmm7, [rsp + 1*16]
-       vmovdqa xmm8, [rsp + 2*16]
-       vmovdqa xmm9, [rsp + 3*16]
-       vmovdqa xmm10, [rsp + 4*16]
-       vmovdqa xmm11, [rsp + 5*16]
-       vmovdqa xmm12, [rsp + 6*16]
-       vmovdqa xmm13, [rsp + 7*16]
-       vmovdqa xmm14, [rsp + 8*16]
-       vmovdqa xmm15, [rsp + 9*16]
-       mov     r12,  [rsp + 10*16 + 0*8]
-       mov     r13,  [rsp + 10*16 + 1*8]
-       mov     r14,  [rsp + 10*16 + 2*8]
-       mov     r15,  [rsp + 10*16 + 3*8]
-       mov     rdi,  [rsp + 10*16 + 4*8]
-       mov     rsi,  [rsp + 10*16 + 5*8]
-       add     rsp, stack_size
- %endmacro
-%endif
-
-%define len    arg0
-%define vec    arg1
-%define mul_array arg2
-%define        src    arg3
-%define dest   arg4
-%define ptr    arg5
-%define vec_i  tmp2
-%define dest1  tmp3
-%define dest2  tmp4
-%define vskip1 tmp5
-%define vskip3 tmp6
-%define pos    return
-
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR vmovdqu
- %define XSTR vmovdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR vmovdqa
-  %define XSTR vmovdqa
- %else
-  %define XLDR vmovntdqa
-  %define XSTR vmovntdq
- %endif
-%endif
-
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f   xmm15
-%define xgft1_lo  xmm14
-%define xgft1_hi  xmm13
-%define xgft2_lo  xmm12
-%define xgft2_hi  xmm11
-%define xgft3_lo  xmm10
-%define xgft3_hi  xmm9
-%define x0     xmm0
-%define xtmpa  xmm1
-%define xp1    xmm2
-%define xp2    xmm3
-%define xp3    xmm4
-%define xp4    xmm5
-%define xp5    xmm6
-%define xp6    xmm7
-
-align 16
-global gf_6vect_dot_prod_avx:function
-func(gf_6vect_dot_prod_avx)
-       FUNC_SAVE
-       sub     len, 16
-       jl      .return_fail
-       xor     pos, pos
-       vmovdqa xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-       mov     vskip1, vec
-       imul    vskip1, 32
-       mov     vskip3, vec
-       imul    vskip3, 96
-       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
-       mov     dest1, [dest]
-       mov     dest2, [dest+PS]
-
-
-.loop16:
-       mov     tmp, mul_array
-       xor     vec_i, vec_i
-       vpxor   xp1, xp1
-       vpxor   xp2, xp2
-       vpxor   xp3, xp3
-       vpxor   xp4, xp4
-       vpxor   xp5, xp5
-       vpxor   xp6, xp6
-
-.next_vect:
-       mov     ptr, [src+vec_i]
-       add     vec_i, PS
-       XLDR    x0, [ptr+pos]           ;Get next source vector
-
-       vmovdqu xgft1_lo, [tmp]                 ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
-       vmovdqu xgft1_hi, [tmp+16]              ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
-       vmovdqu xgft2_lo, [tmp+vskip1*1]        ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-       vmovdqu xgft2_hi, [tmp+vskip1*1+16]     ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
-       vmovdqu xgft3_lo, [tmp+vskip1*2]        ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
-       vmovdqu xgft3_hi, [tmp+vskip1*2+16]     ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
-       lea     ptr, [vskip1 + vskip1*4]        ;ptr = vskip5
-
-       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-
-
-       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
-       vpxor   xp1, xgft1_hi           ;xp1 += partial
-
-       vpshufb xgft2_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft2_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft2_hi, xgft2_lo      ;GF add high and low partials
-       vpxor   xp2, xgft2_hi           ;xp2 += partial
-
-       vpshufb xgft3_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft3_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft3_hi, xgft3_lo      ;GF add high and low partials
-       vpxor   xp3, xgft3_hi           ;xp3 += partial
-
-
-       vmovdqu xgft1_lo, [tmp+vskip3]          ;Load array Dx{00}, Dx{01}, ..., Dx{0f}
-       vmovdqu xgft1_hi, [tmp+vskip3+16]       ;     "     Dx{00}, Dx{10}, ..., Dx{f0}
-       vmovdqu xgft2_lo, [tmp+vskip1*4]        ;Load array Ex{00}, Ex{01}, ..., Ex{0f}
-       vmovdqu xgft2_hi, [tmp+vskip1*4+16]     ;     "     Ex{00}, Ex{10}, ..., Ex{f0}
-       vmovdqu xgft3_lo, [tmp+ptr]             ;Load array Fx{00}, Fx{01}, ..., Fx{0f}
-       vmovdqu xgft3_hi, [tmp+ptr+16]          ;     "     Fx{00}, Fx{10}, ..., Fx{f0}
-       add     tmp, 32
-
-
-       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
-       vpxor   xp4, xgft1_hi           ;xp4 += partial
-
-       vpshufb xgft2_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft2_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft2_hi, xgft2_lo      ;GF add high and low partials
-       vpxor   xp5, xgft2_hi           ;xp5 += partial
-
-       vpshufb xgft3_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft3_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft3_hi, xgft3_lo      ;GF add high and low partials
-       vpxor   xp6, xgft3_hi           ;xp6 += partial
-
-       cmp     vec_i, vec
-       jl      .next_vect
-
-
-       mov     tmp, [dest+2*PS]
-       mov     ptr, [dest+3*PS]
-       mov     vec_i, [dest+4*PS]
-
-       XSTR    [dest1+pos], xp1
-       XSTR    [dest2+pos], xp2
-       XSTR    [tmp+pos], xp3
-       mov     tmp, [dest+5*PS]
-       XSTR    [ptr+pos], xp4
-       XSTR    [vec_i+pos], xp5
-       XSTR    [tmp+pos], xp6
-
-       add     pos, 16                 ;Loop on 16 bytes at a time
-       cmp     pos, len
-       jle     .loop16
-
-       lea     tmp, [len + 16]
-       cmp     pos, tmp
-       je      .return_pass
-
-       ;; Tail len
-       mov     pos, len        ;Overlapped offset length-16
-       jmp     .loop16         ;Do one more overlap pass
-
-.return_pass:
-       FUNC_RESTORE
-       mov     return, 0
-       ret
-
-.return_fail:
-       FUNC_RESTORE
-       mov     return, 1
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-mask0f:        ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-
-;;;       func                  core, ver, snum
-slversion gf_6vect_dot_prod_avx, 02,  04,  0195

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_dot_prod_avx2.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_dot_prod_avx2.asm.s
deleted file mode 100644 (file)
index 85bb78a..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_dot_prod_avx2.asm.s
+++ /dev/null
@@ -1,326 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_6vect_dot_prod_avx2(len, vec, *g_tbls, **buffs, **dests);
-;;;
-
-%include "reg_sizes.asm"
-
-%ifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
-
- %define tmp   r11
- %define tmp.w r11d
- %define tmp.b r11b
- %define tmp2  r10
- %define tmp3  r13             ; must be saved and restored
- %define tmp4  r12             ; must be saved and restored
- %define tmp5  r14             ; must be saved and restored
- %define tmp6  r15             ; must be saved and restored
- %define return rax
- %define PS 8
- %define LOG_PS 3
-
- %define func(x) x:
- %macro FUNC_SAVE 0
-       push    r12
-       push    r13
-       push    r14
-       push    r15
- %endmacro
- %macro FUNC_RESTORE 0
-       pop     r15
-       pop     r14
-       pop     r13
-       pop     r12
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0   rcx
- %define arg1   rdx
- %define arg2   r8
- %define arg3   r9
-
- %define arg4   r12            ; must be saved, loaded and restored
- %define arg5   r15            ; must be saved and restored
- %define tmp    r11
- %define tmp.w  r11d
- %define tmp.b  r11b
- %define tmp2   r10
- %define tmp3   r13            ; must be saved and restored
- %define tmp4   r14            ; must be saved and restored
- %define tmp5   rdi            ; must be saved and restored
- %define tmp6   rsi            ; must be saved and restored
- %define return rax
- %define PS     8
- %define LOG_PS 3
- %define stack_size  10*16 + 7*8               ; must be an odd multiple of 8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
-
- %define func(x) proc_frame x
- %macro FUNC_SAVE 0
-       alloc_stack     stack_size
-       vmovdqa [rsp + 0*16], xmm6
-       vmovdqa [rsp + 1*16], xmm7
-       vmovdqa [rsp + 2*16], xmm8
-       vmovdqa [rsp + 3*16], xmm9
-       vmovdqa [rsp + 4*16], xmm10
-       vmovdqa [rsp + 5*16], xmm11
-       vmovdqa [rsp + 6*16], xmm12
-       vmovdqa [rsp + 7*16], xmm13
-       vmovdqa [rsp + 8*16], xmm14
-       vmovdqa [rsp + 9*16], xmm15
-       save_reg        r12,  10*16 + 0*8
-       save_reg        r13,  10*16 + 1*8
-       save_reg        r14,  10*16 + 2*8
-       save_reg        r15,  10*16 + 3*8
-       save_reg        rdi,  10*16 + 4*8
-       save_reg        rsi,  10*16 + 5*8
-       end_prolog
-       mov     arg4, arg(4)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       vmovdqa xmm6, [rsp + 0*16]
-       vmovdqa xmm7, [rsp + 1*16]
-       vmovdqa xmm8, [rsp + 2*16]
-       vmovdqa xmm9, [rsp + 3*16]
-       vmovdqa xmm10, [rsp + 4*16]
-       vmovdqa xmm11, [rsp + 5*16]
-       vmovdqa xmm12, [rsp + 6*16]
-       vmovdqa xmm13, [rsp + 7*16]
-       vmovdqa xmm14, [rsp + 8*16]
-       vmovdqa xmm15, [rsp + 9*16]
-       mov     r12,  [rsp + 10*16 + 0*8]
-       mov     r13,  [rsp + 10*16 + 1*8]
-       mov     r14,  [rsp + 10*16 + 2*8]
-       mov     r15,  [rsp + 10*16 + 3*8]
-       mov     rdi,  [rsp + 10*16 + 4*8]
-       mov     rsi,  [rsp + 10*16 + 5*8]
-       add     rsp, stack_size
- %endmacro
-%endif
-
-%define len    arg0
-%define vec    arg1
-%define mul_array arg2
-%define        src    arg3
-%define dest   arg4
-%define ptr    arg5
-%define vec_i  tmp2
-%define dest1  tmp3
-%define dest2  tmp4
-%define vskip1 tmp5
-%define vskip3 tmp6
-%define pos    return
-
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR vmovdqu
- %define XSTR vmovdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR vmovdqa
-  %define XSTR vmovdqa
- %else
-  %define XLDR vmovntdqa
-  %define XSTR vmovntdq
- %endif
-%endif
-
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f   ymm15
-%define xmask0fx  xmm15
-%define xgft1_lo  ymm14
-%define xgft1_hi  ymm13
-%define xgft2_lo  ymm12
-%define xgft2_hi  ymm11
-%define xgft3_lo  ymm10
-%define xgft3_hi  ymm9
-%define x0     ymm0
-%define xtmpa  ymm1
-%define xp1    ymm2
-%define xp2    ymm3
-%define xp3    ymm4
-%define xp4    ymm5
-%define xp5    ymm6
-%define xp6    ymm7
-
-align 16
-global gf_6vect_dot_prod_avx2:function
-func(gf_6vect_dot_prod_avx2)
-       FUNC_SAVE
-       sub     len, 32
-       jl      .return_fail
-       xor     pos, pos
-       mov     tmp.b, 0x0f
-       vpinsrb xmask0fx, xmask0fx, tmp.w, 0
-       vpbroadcastb xmask0f, xmask0fx  ;Construct mask 0x0f0f0f...
-       mov     vskip1, vec
-       imul    vskip1, 32
-       mov     vskip3, vec
-       imul    vskip3, 96
-       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
-       mov     dest1, [dest]
-       mov     dest2, [dest+PS]
-
-
-.loop32:
-       mov     tmp, mul_array
-       xor     vec_i, vec_i
-       vpxor   xp1, xp1
-       vpxor   xp2, xp2
-       vpxor   xp3, xp3
-       vpxor   xp4, xp4
-       vpxor   xp5, xp5
-       vpxor   xp6, xp6
-
-.next_vect:
-       mov     ptr, [src+vec_i]
-       XLDR    x0, [ptr+pos]           ;Get next source vector
-       add     vec_i, PS
-
-       vpand   xgft3_lo, x0, xmask0f   ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-       vperm2i128 xtmpa, xgft3_lo, x0, 0x30    ;swap xtmpa from 1lo|2lo to 1lo|2hi
-       vperm2i128 x0, xgft3_lo, x0, 0x12       ;swap x0 from    1hi|2hi to 1hi|2lo
-
-       vmovdqu xgft1_lo, [tmp]                 ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
-                                               ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
-       vmovdqu xgft2_lo, [tmp+vskip1*1]        ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-                                               ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
-       vmovdqu xgft3_lo, [tmp+vskip1*2]        ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
-                                               ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
-       lea     ptr, [vskip1 + vskip1*4]        ;ptr = vskip5
-
-       vperm2i128 xgft1_hi, xgft1_lo, xgft1_lo, 0x01 ; swapped to hi | lo
-       vperm2i128 xgft2_hi, xgft2_lo, xgft2_lo, 0x01 ; swapped to hi | lo
-       vperm2i128 xgft3_hi, xgft3_lo, xgft3_lo, 0x01 ; swapped to hi | lo
-
-       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
-       vpxor   xp1, xgft1_hi           ;xp1 += partial
-
-       vpshufb xgft2_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft2_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft2_hi, xgft2_lo      ;GF add high and low partials
-       vpxor   xp2, xgft2_hi           ;xp2 += partial
-
-       vpshufb xgft3_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft3_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft3_hi, xgft3_lo      ;GF add high and low partials
-       vpxor   xp3, xgft3_hi           ;xp3 += partial
-
-
-       vmovdqu xgft1_lo, [tmp+vskip3]          ;Load array Dx{00}, Dx{01}, ..., Dx{0f}
-                                               ;     "     Dx{00}, Dx{10}, ..., Dx{f0}
-       vmovdqu xgft2_lo, [tmp+vskip1*4]        ;Load array Ex{00}, Ex{01}, ..., Ex{0f}
-                                               ;     "     Ex{00}, Ex{10}, ..., Ex{f0}
-       vmovdqu xgft3_lo, [tmp+ptr]             ;Load array Fx{00}, Fx{01}, ..., Fx{0f}
-                                               ;     "     Fx{00}, Fx{10}, ..., Fx{f0}
-       add     tmp, 32
-       vperm2i128 xgft1_hi, xgft1_lo, xgft1_lo, 0x01 ; swapped to hi | lo
-       vperm2i128 xgft2_hi, xgft2_lo, xgft2_lo, 0x01 ; swapped to hi | lo
-       vperm2i128 xgft3_hi, xgft3_lo, xgft3_lo, 0x01 ; swapped to hi | lo
-
-       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
-       vpxor   xp4, xgft1_hi           ;xp4 += partial
-
-       vpshufb xgft2_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft2_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft2_hi, xgft2_lo      ;GF add high and low partials
-       vpxor   xp5, xgft2_hi           ;xp5 += partial
-
-       vpshufb xgft3_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xgft3_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xgft3_hi, xgft3_lo      ;GF add high and low partials
-       vpxor   xp6, xgft3_hi           ;xp6 += partial
-
-       cmp     vec_i, vec
-       jl      .next_vect
-
-
-       mov     tmp, [dest+2*PS]
-       mov     ptr, [dest+3*PS]
-       mov     vec_i, [dest+4*PS]
-
-       XSTR    [dest1+pos], xp1
-       XSTR    [dest2+pos], xp2
-       XSTR    [tmp+pos], xp3
-       mov     tmp, [dest+5*PS]
-       XSTR    [ptr+pos], xp4
-       XSTR    [vec_i+pos], xp5
-       XSTR    [tmp+pos], xp6
-
-       add     pos, 32                 ;Loop on 32 bytes at a time
-       cmp     pos, len
-       jle     .loop32
-
-       lea     tmp, [len + 32]
-       cmp     pos, tmp
-       je      .return_pass
-
-       ;; Tail len
-       mov     pos, len        ;Overlapped offset length-16
-       jmp     .loop32         ;Do one more overlap pass
-
-.return_pass:
-       FUNC_RESTORE
-       mov     return, 0
-       ret
-
-.return_fail:
-       FUNC_RESTORE
-       mov     return, 1
-       ret
-
-endproc_frame
-
-section .data
-
-;;;       func                   core, ver, snum
-slversion gf_6vect_dot_prod_avx2, 04,  04,  019a

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_dot_prod_sse.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_dot_prod_sse.asm.s
deleted file mode 100644 (file)
index 34f7b87..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_dot_prod_sse.asm.s
+++ /dev/null
@@ -1,315 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_6vect_dot_prod_sse(len, vec, *g_tbls, **buffs, **dests);
-;;;
-
-%include "reg_sizes.asm"
-
-%ifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
-
- %define tmp   r11
- %define tmp2  r10
- %define tmp3  r13             ; must be saved and restored
- %define tmp4  r12             ; must be saved and restored
- %define tmp5  r14             ; must be saved and restored
- %define tmp6  r15             ; must be saved and restored
- %define return rax
- %define PS 8
- %define LOG_PS 3
-
- %define func(x) x:
- %macro FUNC_SAVE 0
-       push    r12
-       push    r13
-       push    r14
-       push    r15
- %endmacro
- %macro FUNC_RESTORE 0
-       pop     r15
-       pop     r14
-       pop     r13
-       pop     r12
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0   rcx
- %define arg1   rdx
- %define arg2   r8
- %define arg3   r9
-
- %define arg4   r12            ; must be saved, loaded and restored
- %define arg5   r15            ; must be saved and restored
- %define tmp    r11
- %define tmp2   r10
- %define tmp3   r13            ; must be saved and restored
- %define tmp4   r14            ; must be saved and restored
- %define tmp5   rdi            ; must be saved and restored
- %define tmp6   rsi            ; must be saved and restored
- %define return rax
- %define PS     8
- %define LOG_PS 3
- %define stack_size  10*16 + 7*8               ; must be an odd multiple of 8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
-
- %define func(x) proc_frame x
- %macro FUNC_SAVE 0
-       alloc_stack     stack_size
-       save_xmm128     xmm6, 0*16
-       save_xmm128     xmm7, 1*16
-       save_xmm128     xmm8, 2*16
-       save_xmm128     xmm9, 3*16
-       save_xmm128     xmm10, 4*16
-       save_xmm128     xmm11, 5*16
-       save_xmm128     xmm12, 6*16
-       save_xmm128     xmm13, 7*16
-       save_xmm128     xmm14, 8*16
-       save_xmm128     xmm15, 9*16
-       save_reg        r12,  10*16 + 0*8
-       save_reg        r13,  10*16 + 1*8
-       save_reg        r14,  10*16 + 2*8
-       save_reg        r15,  10*16 + 3*8
-       save_reg        rdi,  10*16 + 4*8
-       save_reg        rsi,  10*16 + 5*8
-       end_prolog
-       mov     arg4, arg(4)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       movdqa  xmm6, [rsp + 0*16]
-       movdqa  xmm7, [rsp + 1*16]
-       movdqa  xmm8, [rsp + 2*16]
-       movdqa  xmm9, [rsp + 3*16]
-       movdqa  xmm10, [rsp + 4*16]
-       movdqa  xmm11, [rsp + 5*16]
-       movdqa  xmm12, [rsp + 6*16]
-       movdqa  xmm13, [rsp + 7*16]
-       movdqa  xmm14, [rsp + 8*16]
-       movdqa  xmm15, [rsp + 9*16]
-       mov     r12,  [rsp + 10*16 + 0*8]
-       mov     r13,  [rsp + 10*16 + 1*8]
-       mov     r14,  [rsp + 10*16 + 2*8]
-       mov     r15,  [rsp + 10*16 + 3*8]
-       mov     rdi,  [rsp + 10*16 + 4*8]
-       mov     rsi,  [rsp + 10*16 + 5*8]
-       add     rsp, stack_size
- %endmacro
-%endif
-
-%define len    arg0
-%define vec    arg1
-%define mul_array arg2
-%define        src    arg3
-%define dest   arg4
-%define ptr    arg5
-%define vec_i  tmp2
-%define dest1  tmp3
-%define dest2  tmp4
-%define vskip1 tmp5
-%define vskip3 tmp6
-%define pos    return
-
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR movdqu
- %define XSTR movdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR movdqa
-  %define XSTR movdqa
- %else
-  %define XLDR movntdqa
-  %define XSTR movntdq
- %endif
-%endif
-
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f   xmm15
-%define xgft1_lo  xmm2
-%define xgft1_hi  xmm3
-%define xgft2_lo  xmm4
-%define xgft2_hi  xmm5
-%define xgft3_lo  xmm6
-%define xgft3_hi  xmm7
-%define x0     xmm0
-%define xtmpa  xmm1
-%define xp1    xmm8
-%define xp2    xmm9
-%define xp3    xmm10
-%define xp4    xmm11
-%define xp5    xmm12
-%define xp6    xmm13
-
-align 16
-global gf_6vect_dot_prod_sse:function
-func(gf_6vect_dot_prod_sse)
-       FUNC_SAVE
-       sub     len, 16
-       jl      .return_fail
-       xor     pos, pos
-       movdqa  xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-       mov     vskip1, vec
-       imul    vskip1, 32
-       mov     vskip3, vec
-       imul    vskip3, 96
-       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
-       mov     dest1, [dest]
-       mov     dest2, [dest+PS]
-
-
-.loop16:
-       mov     tmp, mul_array
-       xor     vec_i, vec_i
-       pxor    xp1, xp1
-       pxor    xp2, xp2
-       pxor    xp3, xp3
-       pxor    xp4, xp4
-       pxor    xp5, xp5
-       pxor    xp6, xp6
-
-.next_vect:
-       mov     ptr, [src+vec_i]
-       add     vec_i, PS
-       XLDR    x0, [ptr+pos]           ;Get next source vector
-
-       movdqu  xgft1_lo, [tmp]                 ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
-       movdqu  xgft1_hi, [tmp+16]              ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
-       movdqu  xgft2_lo, [tmp+vskip1*1]        ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-       movdqu  xgft2_hi, [tmp+vskip1*1+16]     ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
-       movdqu  xgft3_lo, [tmp+vskip1*2]        ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
-       movdqu  xgft3_hi, [tmp+vskip1*2+16]     ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
-       lea     ptr, [vskip1 + vskip1*4]        ;ptr = vskip5
-
-       movdqa  xtmpa, x0               ;Keep unshifted copy of src
-       psraw   x0, 4                   ;Shift to put high nibble into bits 4-0
-       pand    x0, xmask0f             ;Mask high src nibble in bits 4-0
-       pand    xtmpa, xmask0f          ;Mask low src nibble in bits 4-0
-
-       pshufb  xgft1_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft1_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft1_hi, xgft1_lo      ;GF add high and low partials
-       pxor    xp1, xgft1_hi           ;xp1 += partial
-
-       pshufb  xgft2_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft2_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft2_hi, xgft2_lo      ;GF add high and low partials
-       pxor    xp2, xgft2_hi           ;xp2 += partial
-
-       pshufb  xgft3_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft3_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft3_hi, xgft3_lo      ;GF add high and low partials
-       pxor    xp3, xgft3_hi           ;xp3 += partial
-
-
-       movdqu  xgft1_lo, [tmp+vskip3]          ;Load array Dx{00}, Dx{01}, ..., Dx{0f}
-       movdqu  xgft1_hi, [tmp+vskip3+16]       ;     "     Dx{00}, Dx{10}, ..., Dx{f0}
-       movdqu  xgft2_lo, [tmp+vskip1*4]        ;Load array Ex{00}, Ex{01}, ..., Ex{0f}
-       movdqu  xgft2_hi, [tmp+vskip1*4+16]     ;     "     Ex{00}, Ex{10}, ..., Ex{f0}
-       movdqu  xgft3_lo, [tmp+ptr]             ;Load array Fx{00}, Fx{01}, ..., Fx{0f}
-       movdqu  xgft3_hi, [tmp+ptr+16]          ;     "     Fx{00}, Fx{10}, ..., Fx{f0}
-       add     tmp, 32
-
-
-       pshufb  xgft1_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft1_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft1_hi, xgft1_lo      ;GF add high and low partials
-       pxor    xp4, xgft1_hi           ;xp4 += partial
-
-       pshufb  xgft2_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft2_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft2_hi, xgft2_lo      ;GF add high and low partials
-       pxor    xp5, xgft2_hi           ;xp5 += partial
-
-       pshufb  xgft3_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft3_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft3_hi, xgft3_lo      ;GF add high and low partials
-       pxor    xp6, xgft3_hi           ;xp6 += partial
-
-       cmp     vec_i, vec
-       jl      .next_vect
-
-
-       mov     tmp, [dest+2*PS]
-       mov     ptr, [dest+3*PS]
-       mov     vec_i, [dest+4*PS]
-
-       XSTR    [dest1+pos], xp1
-       XSTR    [dest2+pos], xp2
-       XSTR    [tmp+pos], xp3
-       mov     tmp, [dest+5*PS]
-       XSTR    [ptr+pos], xp4
-       XSTR    [vec_i+pos], xp5
-       XSTR    [tmp+pos], xp6
-
-       add     pos, 16                 ;Loop on 16 bytes at a time
-       cmp     pos, len
-       jle     .loop16
-
-       lea     tmp, [len + 16]
-       cmp     pos, tmp
-       je      .return_pass
-
-       ;; Tail len
-       mov     pos, len        ;Overlapped offset length-16
-       jmp     .loop16         ;Do one more overlap pass
-
-.return_pass:
-       FUNC_RESTORE
-       mov     return, 0
-       ret
-
-.return_fail:
-       FUNC_RESTORE
-       mov     return, 1
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-mask0f:        ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-
-;;;       func                  core, ver, snum
-slversion gf_6vect_dot_prod_sse, 00,  05,  0066

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_mad_avx.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_mad_avx.asm.s
deleted file mode 100644 (file)
index 3c60d0a..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_mad_avx.asm.s
+++ /dev/null
@@ -1,394 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_6vect_mad_avx(len, vec, vec_i, mul_array, src, dest);
-;;;
-
-%include "reg_sizes.asm"
-
-%define PS 8
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0  rcx
- %define arg0.w ecx
- %define arg1  rdx
- %define arg2  r8
- %define arg3  r9
- %define arg4  r12
- %define arg5  r15
- %define tmp   r11
- %define tmp2   r10
- %define tmp3   r13
- %define tmp4   r14
- %define tmp5   rdi
- %define return rax
- %define return.w eax
- %define stack_size 16*10 + 5*8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
- %define func(x) proc_frame x
-
-%macro FUNC_SAVE 0
-       sub     rsp, stack_size
-       movdqa  [rsp+16*0],xmm6
-       movdqa  [rsp+16*1],xmm7
-       movdqa  [rsp+16*2],xmm8
-       movdqa  [rsp+16*3],xmm9
-       movdqa  [rsp+16*4],xmm10
-       movdqa  [rsp+16*5],xmm11
-       movdqa  [rsp+16*6],xmm12
-       movdqa  [rsp+16*7],xmm13
-       movdqa  [rsp+16*8],xmm14
-       movdqa  [rsp+16*9],xmm15
-       save_reg        r12,  10*16 + 0*8
-       save_reg        r13,  10*16 + 1*8
-       save_reg        r14,  10*16 + 2*8
-       save_reg        r15,  10*16 + 3*8
-       save_reg        rdi,  10*16 + 4*8
-       end_prolog
-       mov     arg4, arg(4)
-       mov     arg5, arg(5)
-%endmacro
-
-%macro FUNC_RESTORE 0
-       movdqa  xmm6, [rsp+16*0]
-       movdqa  xmm7, [rsp+16*1]
-       movdqa  xmm8, [rsp+16*2]
-       movdqa  xmm9, [rsp+16*3]
-       movdqa  xmm10, [rsp+16*4]
-       movdqa  xmm11, [rsp+16*5]
-       movdqa  xmm12, [rsp+16*6]
-       movdqa  xmm13, [rsp+16*7]
-       movdqa  xmm14, [rsp+16*8]
-       movdqa  xmm15, [rsp+16*9]
-       mov     r12,  [rsp + 10*16 + 0*8]
-       mov     r13,  [rsp + 10*16 + 1*8]
-       mov     r14,  [rsp + 10*16 + 2*8]
-       mov     r15,  [rsp + 10*16 + 3*8]
-       mov     rdi,  [rsp + 10*16 + 4*8]
-       add     rsp, stack_size
-%endmacro
-
-%elifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg0.w edi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
- %define tmp   r11
- %define tmp2   r10
- %define tmp3   r12
- %define tmp4   r13
- %define tmp5   r14
- %define return rax
- %define return.w eax
-
- %define func(x) x:
- %macro FUNC_SAVE 0
-       push    r12
-       push    r13
-       push    r14
- %endmacro
- %macro FUNC_RESTORE 0
-       pop     r14
-       pop     r13
-       pop     r12
- %endmacro
-%endif
-
-;;; gf_6vect_mad_avx(len, vec, vec_i, mul_array, src, dest)
-%define len   arg0
-%define len.w arg0.w
-%define vec    arg1
-%define vec_i    arg2
-%define mul_array arg3
-%define        src   arg4
-%define dest1  arg5
-%define pos   return
-%define pos.w return.w
-
-%define dest2 tmp4
-%define dest3 tmp2
-%define dest4 mul_array
-%define dest5 tmp5
-%define dest6 vec_i
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR vmovdqu
- %define XSTR vmovdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR vmovdqa
-  %define XSTR vmovdqa
- %else
-  %define XLDR vmovntdqa
-  %define XSTR vmovntdq
- %endif
-%endif
-
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f  xmm15
-%define xgft4_lo  xmm14
-%define xgft4_hi  xmm13
-%define xgft5_lo  xmm12
-%define xgft5_hi  xmm11
-%define xgft6_lo  xmm10
-%define xgft6_hi  xmm9
-
-%define x0         xmm0
-%define xtmpa      xmm1
-%define xtmph1     xmm2
-%define xtmpl1     xmm3
-%define xtmph2     xmm4
-%define xtmpl2     xmm5
-%define xtmph3     xmm6
-%define xtmpl3     xmm7
-%define xd1        xmm8
-%define xd2        xtmpl1
-%define xd3        xtmph1
-
-
-align 16
-global gf_6vect_mad_avx:function
-func(gf_6vect_mad_avx)
-       FUNC_SAVE
-       sub     len, 16
-       jl      .return_fail
-       xor     pos, pos
-       vmovdqa xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-       mov     tmp, vec
-       sal     vec_i, 5                ;Multiply by 32
-       lea     tmp3, [mul_array + vec_i]
-       sal     tmp, 6                  ;Multiply by 64
-
-       sal     vec, 5                  ;Multiply by 32
-       lea     vec_i, [tmp + vec]      ;vec_i = vec*96
-       lea     mul_array, [tmp + vec_i]        ;mul_array = vec*160
-
-       vmovdqu xgft5_lo, [tmp3+2*tmp]          ;Load array Ex{00}, Ex{01}, ..., Ex{0f}
-       vmovdqu xgft5_hi, [tmp3+2*tmp+16]       ;     "     Ex{00}, Ex{10}, ..., Ex{f0}
-       vmovdqu xgft4_lo, [tmp3+vec_i]          ;Load array Dx{00}, Dx{01}, Dx{02}, ...
-       vmovdqu xgft4_hi, [tmp3+vec_i+16]       ; " Dx{00}, Dx{10}, Dx{20}, ... , Dx{f0}
-       vmovdqu xgft6_lo, [tmp3+mul_array]      ;Load array Fx{00}, Fx{01}, ..., Fx{0f}
-       vmovdqu xgft6_hi, [tmp3+mul_array+16]   ;     "     Fx{00}, Fx{10}, ..., Fx{f0}
-
-       mov     dest2, [dest1+PS]
-       mov     dest3, [dest1+2*PS]
-       mov     dest4, [dest1+3*PS]  ; reuse mul_array
-       mov     dest5, [dest1+4*PS]
-       mov     dest6, [dest1+5*PS]  ; reuse vec_i
-       mov     dest1, [dest1]
-
-.loop16:
-       XLDR    x0, [src+pos]           ;Get next source vector
-
-       vmovdqu xtmpl1, [tmp3]  ;Load array Ax{00}, Ax{01}, Ax{02}, ...
-       vmovdqu xtmph1, [tmp3+16]       ; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
-       vmovdqu xtmpl2, [tmp3+vec]      ;Load array Bx{00}, Bx{01}, Bx{02}, ...
-       vmovdqu xtmph2, [tmp3+vec+16]   ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
-       vmovdqu xtmpl3, [tmp3+2*vec]    ;Load array Cx{00}, Cx{01}, Cx{02}, ...
-       vmovdqu xtmph3, [tmp3+2*vec+16] ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
-       XLDR    xd1, [dest1+pos]                ;Get next dest vector
-
-       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-
-
-       ;dest1
-       vpshufb xtmph1, x0              ;Lookup mul table of high nibble
-       vpshufb xtmpl1, xtmpa           ;Lookup mul table of low nibble
-       vpxor   xtmph1, xtmpl1          ;GF add high and low partials
-       vpxor   xd1, xtmph1
-
-       XLDR    xd2, [dest2+pos]        ;reuse xtmpl1. Get next dest vector
-       XLDR    xd3, [dest3+pos]        ;reuse xtmph1. Get next dest vector
-
-       ;dest2
-       vpshufb xtmph2, x0              ;Lookup mul table of high nibble
-       vpshufb xtmpl2, xtmpa           ;Lookup mul table of low nibble
-       vpxor   xtmph2, xtmpl2          ;GF add high and low partials
-       vpxor   xd2, xtmph2
-
-       ;dest3
-       vpshufb xtmph3, x0              ;Lookup mul table of high nibble
-       vpshufb xtmpl3, xtmpa           ;Lookup mul table of low nibble
-       vpxor   xtmph3, xtmpl3          ;GF add high and low partials
-       vpxor   xd3, xtmph3
-
-       XSTR    [dest1+pos], xd1        ;Store result into dest1
-       XSTR    [dest2+pos], xd2        ;Store result into dest2
-       XSTR    [dest3+pos], xd3        ;Store result into dest3
-
-       ;dest4
-       XLDR    xd1, [dest4+pos]                ;Get next dest vector
-       vpshufb xtmph1, xgft4_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xtmpl1, xgft4_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xtmph1, xtmph1, xtmpl1          ;GF add high and low partials
-       vpxor   xd1, xd1, xtmph1
-
-       XLDR    xd2, [dest5+pos]        ;reuse xtmpl1. Get next dest vector
-       XLDR    xd3, [dest6+pos]        ;reuse xtmph1. Get next dest vector
-
-       ;dest5
-       vpshufb xtmph2, xgft5_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xtmpl2, xgft5_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xtmph2, xtmph2, xtmpl2          ;GF add high and low partials
-       vpxor   xd2, xd2, xtmph2
-
-       ;dest6
-       vpshufb xtmph3, xgft6_hi, x0            ;Lookup mul table of high nibble
-       vpshufb xtmpl3, xgft6_lo, xtmpa         ;Lookup mul table of low nibble
-       vpxor   xtmph3, xtmph3, xtmpl3          ;GF add high and low partials
-       vpxor   xd3, xd3, xtmph3
-
-       XSTR    [dest4+pos], xd1        ;Store result into dest4
-       XSTR    [dest5+pos], xd2        ;Store result into dest5
-       XSTR    [dest6+pos], xd3        ;Store result into dest6
-
-       add     pos, 16                 ;Loop on 16 bytes at a time
-       cmp     pos, len
-       jle     .loop16
-
-       lea     tmp, [len + 16]
-       cmp     pos, tmp
-       je      .return_pass
-
-.lessthan16:
-       ;; Tail len
-       ;; Do one more overlap pass
-       ;; Overlapped offset length-16
-       mov     tmp, len                ;Backup len as len=rdi
-
-       XLDR    x0, [src+tmp]           ;Get next source vector
-       XLDR    xd1, [dest4+tmp]        ;Get next dest vector
-       XLDR    xd2, [dest5+tmp]        ;reuse xtmpl1. Get next dest vector
-       XLDR    xd3, [dest6+tmp]        ;reuse xtmph1. Get next dest vector
-
-       sub     len, pos
-
-       vmovdqa xtmph3, [constip16]     ;Load const of i + 16
-       vpinsrb xtmpl3, len.w, 15
-       vpshufb xtmpl3, xmask0f         ;Broadcast len to all bytes
-       vpcmpgtb        xtmpl3, xtmpl3, xtmph3
-
-       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-
-       ;dest4
-       vpshufb xgft4_hi, xgft4_hi, x0          ;Lookup mul table of high nibble
-       vpshufb xgft4_lo, xgft4_lo, xtmpa               ;Lookup mul table of low nibble
-       vpxor   xgft4_hi, xgft4_hi, xgft4_lo    ;GF add high and low partials
-       vpand   xgft4_hi, xgft4_hi, xtmpl3
-       vpxor   xd1, xd1, xgft4_hi
-
-       ;dest5
-       vpshufb xgft5_hi, xgft5_hi, x0          ;Lookup mul table of high nibble
-       vpshufb xgft5_lo, xgft5_lo, xtmpa               ;Lookup mul table of low nibble
-       vpxor   xgft5_hi, xgft5_hi, xgft5_lo    ;GF add high and low partials
-       vpand   xgft5_hi, xgft5_hi, xtmpl3
-       vpxor   xd2, xd2, xgft5_hi
-
-       ;dest6
-       vpshufb xgft6_hi, xgft6_hi, x0          ;Lookup mul table of high nibble
-       vpshufb xgft6_lo, xgft6_lo, xtmpa               ;Lookup mul table of low nibble
-       vpxor   xgft6_hi, xgft6_hi, xgft6_lo    ;GF add high and low partials
-       vpand   xgft6_hi, xgft6_hi, xtmpl3
-       vpxor   xd3, xd3, xgft6_hi
-
-       XSTR    [dest4+tmp], xd1        ;Store result into dest4
-       XSTR    [dest5+tmp], xd2        ;Store result into dest5
-       XSTR    [dest6+tmp], xd3        ;Store result into dest6
-
-       vmovdqu xgft4_lo, [tmp3]        ;Load array Ax{00}, Ax{01}, Ax{02}, ...
-       vmovdqu xgft4_hi, [tmp3+16]     ; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
-       vmovdqu xgft5_lo, [tmp3+vec]    ;Load array Bx{00}, Bx{01}, Bx{02}, ...
-       vmovdqu xgft5_hi, [tmp3+vec+16] ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
-       vmovdqu xgft6_lo, [tmp3+2*vec]  ;Load array Cx{00}, Cx{01}, Cx{02}, ...
-       vmovdqu xgft6_hi, [tmp3+2*vec+16]       ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
-       XLDR    xd1, [dest1+tmp]        ;Get next dest vector
-       XLDR    xd2, [dest2+tmp]        ;reuse xtmpl1. Get next dest vector
-       XLDR    xd3, [dest3+tmp]        ;reuse xtmph1. Get next dest3 vector
-
-       ;dest1
-       vpshufb xgft4_hi, xgft4_hi, x0          ;Lookup mul table of high nibble
-       vpshufb xgft4_lo, xgft4_lo, xtmpa               ;Lookup mul table of low nibble
-       vpxor   xgft4_hi, xgft4_hi, xgft4_lo            ;GF add high and low partials
-       vpand   xgft4_hi, xgft4_hi, xtmpl3
-       vpxor   xd1, xd1, xgft4_hi
-
-       ;dest2
-       vpshufb xgft5_hi, xgft5_hi, x0          ;Lookup mul table of high nibble
-       vpshufb xgft5_lo, xgft5_lo, xtmpa               ;Lookup mul table of low nibble
-       vpxor   xgft5_hi, xgft5_hi, xgft5_lo    ;GF add high and low partials
-       vpand   xgft5_hi, xgft5_hi, xtmpl3
-       vpxor   xd2, xd2, xgft5_hi
-
-       ;dest3
-       vpshufb xgft6_hi, xgft6_hi, x0          ;Lookup mul table of high nibble
-       vpshufb xgft6_lo, xgft6_lo, xtmpa               ;Lookup mul table of low nibble
-       vpxor   xgft6_hi, xgft6_hi, xgft6_lo    ;GF add high and low partials
-       vpand   xgft6_hi, xgft6_hi, xtmpl3
-       vpxor   xd3, xd3, xgft6_hi
-
-       XSTR    [dest1+tmp], xd1        ;Store result into dest1
-       XSTR    [dest2+tmp], xd2        ;Store result into dest2
-       XSTR    [dest3+tmp], xd3        ;Store result into dest3
-
-.return_pass:
-       FUNC_RESTORE
-       mov     return, 0
-       ret
-
-.return_fail:
-       FUNC_RESTORE
-       mov     return, 1
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-mask0f:        ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-constip16:
-       ddq 0xf0f1f2f3f4f5f6f7f8f9fafbfcfdfeff
-
-;;;       func             core, ver, snum
-slversion gf_6vect_mad_avx, 02,  01,  0210

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_mad_avx2.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_mad_avx2.asm.s
deleted file mode 100644 (file)
index e180457..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_mad_avx2.asm.s
+++ /dev/null
@@ -1,400 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_6vect_mad_avx2(len, vec, vec_i, mul_array, src, dest);
-;;;
-
-%include "reg_sizes.asm"
-
-%define PS 8
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0  rcx
- %define arg0.w ecx
- %define arg1  rdx
- %define arg2  r8
- %define arg3  r9
- %define arg4  r12
- %define arg5  r15
- %define tmp    r11
- %define tmp.w  r11d
- %define tmp.b  r11b
- %define tmp2   r10
- %define tmp3   r13
- %define return rax
- %define return.w eax
- %define stack_size 16*10 + 3*8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
- %define func(x) proc_frame x
-
-%macro FUNC_SAVE 0
-       sub     rsp, stack_size
-       movdqa  [rsp+16*0],xmm6
-       movdqa  [rsp+16*1],xmm7
-       movdqa  [rsp+16*2],xmm8
-       movdqa  [rsp+16*3],xmm9
-       movdqa  [rsp+16*4],xmm10
-       movdqa  [rsp+16*5],xmm11
-       movdqa  [rsp+16*6],xmm12
-       movdqa  [rsp+16*7],xmm13
-       movdqa  [rsp+16*8],xmm14
-       movdqa  [rsp+16*9],xmm15
-       save_reg        r12,  10*16 + 0*8
-       save_reg        r13,  10*16 + 1*8
-       save_reg        r15,  10*16 + 2*8
-       end_prolog
-       mov     arg4, arg(4)
-       mov     arg5, arg(5)
-%endmacro
-
-%macro FUNC_RESTORE 0
-       movdqa  xmm6, [rsp+16*0]
-       movdqa  xmm7, [rsp+16*1]
-       movdqa  xmm8, [rsp+16*2]
-       movdqa  xmm9, [rsp+16*3]
-       movdqa  xmm10, [rsp+16*4]
-       movdqa  xmm11, [rsp+16*5]
-       movdqa  xmm12, [rsp+16*6]
-       movdqa  xmm13, [rsp+16*7]
-       movdqa  xmm14, [rsp+16*8]
-       movdqa  xmm15, [rsp+16*9]
-       mov     r12,  [rsp + 10*16 + 0*8]
-       mov     r13,  [rsp + 10*16 + 1*8]
-       mov     r15,  [rsp + 10*16 + 3*8]
-       add     rsp, stack_size
-%endmacro
-
-%elifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg0.w edi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
- %define tmp   r11
- %define tmp.w r11d
- %define tmp.b r11b
- %define tmp2   r10
- %define tmp3   r12
- %define return rax
- %define return.w eax
-
- %define func(x) x:
- %macro FUNC_SAVE 0
-       push    r12
- %endmacro
- %macro FUNC_RESTORE 0
-       pop     r12
- %endmacro
-%endif
-
-;;; gf_6vect_mad_avx2(len, vec, vec_i, mul_array, src, dest)
-%define len   arg0
-%define len.w arg0.w
-%define vec    arg1
-%define vec_i    arg2
-%define mul_array arg3
-%define        src   arg4
-%define dest1  arg5
-%define pos   return
-%define pos.w return.w
-
-%define dest2 tmp3
-%define dest3 tmp2
-%define dest4 mul_array
-%define dest5 vec
-%define dest6 vec_i
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR vmovdqu
- %define XSTR vmovdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR vmovdqa
-  %define XSTR vmovdqa
- %else
-  %define XLDR vmovntdqa
-  %define XSTR vmovntdq
- %endif
-%endif
-
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f  ymm15
-%define xmask0fx  xmm15
-%define xgft1_lo  ymm14
-%define xgft2_lo  ymm13
-%define xgft3_lo  ymm12
-%define xgft4_lo  ymm11
-%define xgft5_lo  ymm10
-%define xgft6_lo  ymm9
-
-%define x0         ymm0
-%define xtmpa      ymm1
-%define xtmpl      ymm2
-%define xtmplx     xmm2
-%define xtmph      ymm3
-%define xtmphx     xmm3
-%define xd1        ymm4
-%define xd2        ymm5
-%define xd3        ymm6
-%define xd4        ymm7
-%define xd5        ymm8
-%define xd6        xd1
-
-align 16
-global gf_6vect_mad_avx2:function
-func(gf_6vect_mad_avx2)
-       FUNC_SAVE
-       sub     len, 32
-       jl      .return_fail
-       xor     pos, pos
-       mov     tmp.b, 0x0f
-       vpinsrb xmask0fx, xmask0fx, tmp.w, 0
-       vpbroadcastb xmask0f, xmask0fx  ;Construct mask 0x0f0f0f...
-
-       sal     vec_i, 5                ;Multiply by 32
-       sal     vec, 5                  ;Multiply by 32
-       lea     tmp, [mul_array + vec_i]
-       mov     vec_i, vec
-       mov     mul_array, vec
-       sal     vec_i, 1
-       sal     mul_array, 1
-       add     vec_i, vec              ;vec_i=vec*96
-       add     mul_array, vec_i        ;vec_i=vec*160
-
-       vmovdqu xgft1_lo, [tmp]                 ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
-                                               ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
-       vmovdqu xgft2_lo, [tmp+vec]             ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
-                                               ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
-       vmovdqu xgft3_lo, [tmp+2*vec]           ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
-                                               ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
-       vmovdqu xgft4_lo, [tmp+vec_i]           ;Load array Fx{00}, Fx{01}, ..., Fx{0f}
-                                               ;     "     Fx{00}, Fx{10}, ..., Fx{f0}
-       vmovdqu xgft5_lo, [tmp+4*vec]           ;Load array Ex{00}, Ex{01}, ..., Ex{0f}
-                                               ;     "     Ex{00}, Ex{10}, ..., Ex{f0}
-       vmovdqu xgft6_lo, [tmp+mul_array]       ;Load array Dx{00}, Dx{01}, ..., Dx{0f}
-                                               ;     "     Dx{00}, Dx{10}, ..., Dx{f0}
-
-       mov     dest2, [dest1+PS]    ; reuse tmp3
-       mov     dest3, [dest1+2*PS]  ; reuse tmp2
-       mov     dest4, [dest1+3*PS]  ; reuse mul_array
-       mov     dest5, [dest1+4*PS]  ; reuse vec
-       mov     dest6, [dest1+5*PS]  ; reuse vec_i
-       mov     dest1, [dest1]
-
-.loop32:
-       XLDR    x0, [src+pos]           ;Get next source vector
-       XLDR    xd1, [dest1+pos]        ;Get next dest vector
-       XLDR    xd2, [dest2+pos]        ;Get next dest vector
-       XLDR    xd3, [dest3+pos]        ;Get next dest vector
-       XLDR    xd4, [dest4+pos]        ;Get next dest vector
-       XLDR    xd5, [dest5+pos]        ;Get next dest vector
-
-       vpand   xtmpl, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-       vperm2i128 xtmpa, xtmpl, x0, 0x30       ;swap xtmpa from 1lo|2lo to 1lo|2hi
-       vperm2i128 x0, xtmpl, x0, 0x12  ;swap x0 from    1hi|2hi to 1hi|2lo
-
-       ;dest1
-       vperm2i128 xtmph, xgft1_lo, xgft1_lo, 0x01 ; swapped to hi | lo
-       vpshufb xtmph, xtmph, x0                ;Lookup mul table of high nibble
-       vpshufb xtmpl, xgft1_lo, xtmpa          ;Lookup mul table of low nibble
-       vpxor   xtmph, xtmph, xtmpl             ;GF add high and low partials
-       vpxor   xd1, xd1, xtmph         ;xd1 += partial
-
-       XSTR    [dest1+pos], xd1        ;Store result into dest1
-
-       ;dest2
-       vperm2i128 xtmph, xgft2_lo, xgft2_lo, 0x01 ; swapped to hi | lo
-       vpshufb xtmph, xtmph, x0                ;Lookup mul table of high nibble
-       vpshufb xtmpl, xgft2_lo, xtmpa          ;Lookup mul table of low nibble
-       vpxor   xtmph, xtmph, xtmpl             ;GF add high and low partials
-       vpxor   xd2, xd2, xtmph         ;xd2 += partial
-
-       ;dest3
-       vperm2i128 xtmph, xgft3_lo, xgft3_lo, 0x01 ; swapped to hi | lo
-       vpshufb xtmph, xtmph, x0                ;Lookup mul table of high nibble
-       vpshufb xtmpl, xgft3_lo, xtmpa          ;Lookup mul table of low nibble
-       vpxor   xtmph, xtmph, xtmpl             ;GF add high and low partials
-       vpxor   xd3, xd3, xtmph         ;xd3 += partial
-
-       XLDR    xd6, [dest6+pos]        ;reuse xd1. Get next dest vector
-
-       ;dest4
-       vperm2i128 xtmph, xgft4_lo, xgft4_lo, 0x01 ; swapped to hi | lo
-       vpshufb xtmph, xtmph, x0                ;Lookup mul table of high nibble
-       vpshufb xtmpl, xgft4_lo, xtmpa          ;Lookup mul table of low nibble
-       vpxor   xtmph, xtmph, xtmpl             ;GF add high and low partials
-       vpxor   xd4, xd4, xtmph         ;xd4 += partial
-
-       ;dest5
-       vperm2i128 xtmph, xgft5_lo, xgft5_lo, 0x01 ; swapped to hi | lo
-       vpshufb xtmph, xtmph, x0                ;Lookup mul table of high nibble
-       vpshufb xtmpl, xgft5_lo, xtmpa          ;Lookup mul table of low nibble
-       vpxor   xtmph, xtmph, xtmpl             ;GF add high and low partials
-       vpxor   xd5, xd5, xtmph         ;xd5 += partial
-
-       ;dest6
-       vperm2i128 xtmph, xgft6_lo, xgft6_lo, 0x01 ; swapped to hi | lo
-       vpshufb xtmph, xtmph, x0                ;Lookup mul table of high nibble
-       vpshufb xtmpl, xgft6_lo, xtmpa          ;Lookup mul table of low nibble
-       vpxor   xtmph, xtmph, xtmpl             ;GF add high and low partials
-       vpxor   xd6, xd6, xtmph         ;xd6 += partial
-
-       XSTR    [dest2+pos], xd2        ;Store result into dest2
-       XSTR    [dest3+pos], xd3        ;Store result into dest3
-       XSTR    [dest4+pos], xd4        ;Store result into dest4
-       XSTR    [dest5+pos], xd5        ;Store result into dest5
-       XSTR    [dest6+pos], xd6        ;Store result into dest6
-
-       add     pos, 32                 ;Loop on 32 bytes at a time
-       cmp     pos, len
-       jle     .loop32
-
-       lea     tmp, [len + 32]
-       cmp     pos, tmp
-       je      .return_pass
-
-.lessthan32:
-       ;; Tail len
-       ;; Do one more overlap pass
-       mov     tmp.b, 0x1f
-       vpinsrb xtmphx, xtmphx, tmp.w, 0
-       vpbroadcastb xtmph, xtmphx      ;Construct mask 0x1f1f1f...
-
-       mov     tmp, len                ;Overlapped offset length-32
-
-       XLDR    x0, [src+tmp]           ;Get next source vector
-       XLDR    xd1, [dest1+tmp]        ;Get next dest vector
-       XLDR    xd2, [dest2+tmp]        ;Get next dest vector
-       XLDR    xd3, [dest3+tmp]        ;Get next dest vector
-       XLDR    xd4, [dest4+tmp]        ;Get next dest vector
-       XLDR    xd5, [dest5+tmp]        ;Get next dest vector
-
-       sub     len, pos
-
-       vpinsrb xtmplx, xtmplx, len.w, 15
-       vinserti128     xtmpl, xtmpl, xtmplx, 1 ;swapped to xtmplx | xtmplx
-       vpshufb xtmpl, xtmpl, xtmph     ;Broadcast len to all bytes. xtmph=0x1f1f1f...
-       vpcmpgtb        xtmpl, xtmpl, [constip32]
-
-       vpand   xtmph, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-       vperm2i128 xtmpa, xtmph, x0, 0x30       ;swap xtmpa from 1lo|2lo to 1lo|2hi
-       vperm2i128 x0, xtmph, x0, 0x12  ;swap x0 from    1hi|2hi to 1hi|2lo
-
-       ;dest1
-       vperm2i128 xtmph, xgft1_lo, xgft1_lo, 0x01 ; swapped to hi | lo
-       vpshufb xtmph, xtmph, x0                ;Lookup mul table of high nibble
-       vpshufb xgft1_lo, xgft1_lo, xtmpa       ;Lookup mul table of low nibble
-       vpxor   xtmph, xtmph, xgft1_lo          ;GF add high and low partials
-       vpand   xtmph, xtmph, xtmpl
-       vpxor   xd1, xd1, xtmph         ;xd1 += partial
-
-       XSTR    [dest1+tmp], xd1        ;Store result into dest1
-
-       ;dest2
-       vperm2i128 xtmph, xgft2_lo, xgft2_lo, 0x01 ; swapped to hi | lo
-       vpshufb xtmph, xtmph, x0                ;Lookup mul table of high nibble
-       vpshufb xgft2_lo, xgft2_lo, xtmpa       ;Lookup mul table of low nibble
-       vpxor   xtmph, xtmph, xgft2_lo          ;GF add high and low partials
-       vpand   xtmph, xtmph, xtmpl
-       vpxor   xd2, xd2, xtmph         ;xd2 += partial
-
-       ;dest3
-       vperm2i128 xtmph, xgft3_lo, xgft3_lo, 0x01 ; swapped to hi | lo
-       vpshufb xtmph, xtmph, x0                ;Lookup mul table of high nibble
-       vpshufb xgft3_lo, xgft3_lo, xtmpa       ;Lookup mul table of low nibble
-       vpxor   xtmph, xtmph, xgft3_lo          ;GF add high and low partials
-       vpand   xtmph, xtmph, xtmpl
-       vpxor   xd3, xd3, xtmph         ;xd3 += partial
-
-       XLDR    xd6, [dest6+tmp]        ;reuse xd1. Get next dest vector
-
-       ;dest4
-       vperm2i128 xtmph, xgft4_lo, xgft4_lo, 0x01 ; swapped to hi | lo
-       vpshufb xtmph, xtmph, x0                ;Lookup mul table of high nibble
-       vpshufb xgft4_lo, xgft4_lo, xtmpa       ;Lookup mul table of low nibble
-       vpxor   xtmph, xtmph, xgft4_lo          ;GF add high and low partials
-       vpand   xtmph, xtmph, xtmpl
-       vpxor   xd4, xd4, xtmph         ;xd4 += partial
-
-       ;dest5
-       vperm2i128 xtmph, xgft5_lo, xgft5_lo, 0x01 ; swapped to hi | lo
-       vpshufb xtmph, xtmph, x0                ;Lookup mul table of high nibble
-       vpshufb xgft5_lo, xgft5_lo, xtmpa       ;Lookup mul table of low nibble
-       vpxor   xtmph, xtmph, xgft5_lo          ;GF add high and low partials
-       vpand   xtmph, xtmph, xtmpl
-       vpxor   xd5, xd5, xtmph         ;xd5 += partial
-
-       ;dest6
-       vperm2i128 xtmph, xgft6_lo, xgft6_lo, 0x01 ; swapped to hi | lo
-       vpshufb xtmph, xtmph, x0                ;Lookup mul table of high nibble
-       vpshufb xgft6_lo, xgft6_lo, xtmpa       ;Lookup mul table of low nibble
-       vpxor   xtmph, xtmph, xgft6_lo          ;GF add high and low partials
-       vpand   xtmph, xtmph, xtmpl
-       vpxor   xd6, xd6, xtmph         ;xd6 += partial
-
-       XSTR    [dest2+tmp], xd2        ;Store result into dest2
-       XSTR    [dest3+tmp], xd3        ;Store result into dest3
-       XSTR    [dest4+tmp], xd4        ;Store result into dest4
-       XSTR    [dest5+tmp], xd5        ;Store result into dest5
-       XSTR    [dest6+tmp], xd6        ;Store result into dest6
-
-.return_pass:
-       FUNC_RESTORE
-       mov     return, 0
-       ret
-
-.return_fail:
-       FUNC_RESTORE
-       mov     return, 1
-       ret
-
-endproc_frame
-
-section .data
-align 32
-constip32:
-       ddq 0xf0f1f2f3f4f5f6f7f8f9fafbfcfdfeff
-       ddq 0xe0e1e2e3e4e5e6e7e8e9eaebecedeeef
-
-;;;       func              core, ver, snum
-slversion gf_6vect_mad_avx2, 04,  01,  0211

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_mad_sse.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_mad_sse.asm.s
deleted file mode 100644 (file)
index 574c8e5..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_mad_sse.asm.s
+++ /dev/null
@@ -1,406 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_6vect_mad_sse(len, vec, vec_i, mul_array, src, dest);
-;;;
-
-%include "reg_sizes.asm"
-
-%define PS 8
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0  rcx
- %define arg0.w ecx
- %define arg1  rdx
- %define arg2  r8
- %define arg3  r9
- %define arg4  r12
- %define arg5  r15
- %define tmp   r11
- %define tmp.w r11d
- %define tmp2   r10
- %define tmp3   r13
- %define tmp4   r14
- %define tmp5   rdi
- %define return rax
- %define return.w eax
- %define stack_size 16*10 + 5*8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
- %define func(x) proc_frame x
-
-%macro FUNC_SAVE 0
-       sub     rsp, stack_size
-       movdqa  [rsp+16*0],xmm6
-       movdqa  [rsp+16*1],xmm7
-       movdqa  [rsp+16*2],xmm8
-       movdqa  [rsp+16*3],xmm9
-       movdqa  [rsp+16*4],xmm10
-       movdqa  [rsp+16*5],xmm11
-       movdqa  [rsp+16*6],xmm12
-       movdqa  [rsp+16*7],xmm13
-       movdqa  [rsp+16*8],xmm14
-       movdqa  [rsp+16*9],xmm15
-       save_reg        r12,  10*16 + 0*8
-       save_reg        r13,  10*16 + 1*8
-       save_reg        r14,  10*16 + 2*8
-       save_reg        r15,  10*16 + 3*8
-       save_reg        rdi,  10*16 + 4*8
-       end_prolog
-       mov     arg4, arg(4)
-       mov     arg5, arg(5)
-%endmacro
-
-%macro FUNC_RESTORE 0
-       movdqa  xmm6, [rsp+16*0]
-       movdqa  xmm7, [rsp+16*1]
-       movdqa  xmm8, [rsp+16*2]
-       movdqa  xmm9, [rsp+16*3]
-       movdqa  xmm10, [rsp+16*4]
-       movdqa  xmm11, [rsp+16*5]
-       movdqa  xmm12, [rsp+16*6]
-       movdqa  xmm13, [rsp+16*7]
-       movdqa  xmm14, [rsp+16*8]
-       movdqa  xmm15, [rsp+16*9]
-       mov     r12,  [rsp + 10*16 + 0*8]
-       mov     r13,  [rsp + 10*16 + 1*8]
-       mov     r14,  [rsp + 10*16 + 2*8]
-       mov     r15,  [rsp + 10*16 + 3*8]
-       mov     rdi,  [rsp + 10*16 + 4*8]
-       add     rsp, stack_size
-%endmacro
-
-%elifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg0.w edi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
- %define tmp   r11
- %define tmp.w r11d
- %define tmp2   r10
- %define tmp3   r12
- %define tmp4   r13
- %define tmp5   r14
- %define return rax
- %define return.w eax
-
- %define func(x) x:
- %macro FUNC_SAVE 0
-       push    r12
-       push    r13
-       push    r14
- %endmacro
- %macro FUNC_RESTORE 0
-       pop     r14
-       pop     r13
-       pop     r12
- %endmacro
-%endif
-
-;;; gf_6vect_mad_sse(len, vec, vec_i, mul_array, src, dest)
-%define len   arg0
-%define len.w arg0.w
-%define vec    arg1
-%define vec_i    arg2
-%define mul_array arg3
-%define        src   arg4
-%define dest1  arg5
-%define pos   return
-%define pos.w return.w
-
-%define dest2 mul_array
-%define dest3 tmp2
-%define dest4 tmp4
-%define dest5 tmp5
-%define dest6 vec_i
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR movdqu
- %define XSTR movdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR movdqa
-  %define XSTR movdqa
- %else
-  %define XLDR movntdqa
-  %define XSTR movntdq
- %endif
-%endif
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f  xmm15
-%define xgft4_lo  xmm14
-%define xgft4_hi  xmm13
-%define xgft5_lo  xmm12
-%define xgft5_hi  xmm11
-%define xgft6_lo  xmm10
-%define xgft6_hi  xmm9
-
-%define x0         xmm0
-%define xtmpa      xmm1
-%define xtmph1     xmm2
-%define xtmpl1     xmm3
-%define xtmph2     xmm4
-%define xtmpl2     xmm5
-%define xtmph3     xmm6
-%define xtmpl3     xmm7
-%define xd1        xmm8
-%define xd2        xtmpl1
-%define xd3        xtmph1
-
-
-align 16
-global gf_6vect_mad_sse:function
-func(gf_6vect_mad_sse)
-       FUNC_SAVE
-       sub     len, 16
-       jl      .return_fail
-
-       xor     pos, pos
-       movdqa  xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-
-       mov     tmp, vec
-       sal     vec_i, 5                ;Multiply by 32
-       lea     tmp3, [mul_array + vec_i]
-       sal     tmp, 6                  ;Multiply by 64
-
-       sal     vec, 5                  ;Multiply by 32
-       lea     vec_i, [tmp + vec]      ;vec_i = 96
-       lea     mul_array, [tmp + vec_i]        ;mul_array = 160
-
-       movdqu  xgft5_lo, [tmp3+2*tmp]          ;Load array Ex{00}, Ex{01}, ..., Ex{0f}
-       movdqu  xgft5_hi, [tmp3+2*tmp+16]       ;     "     Ex{00}, Ex{10}, ..., Ex{f0}
-       movdqu  xgft4_lo, [tmp3+vec_i]          ;Load array Dx{00}, Dx{01}, Dx{02}, ...
-       movdqu  xgft4_hi, [tmp3+vec_i+16]       ; " Dx{00}, Dx{10}, Dx{20}, ... , Dx{f0}
-       movdqu  xgft6_lo, [tmp3+mul_array]      ;Load array Fx{00}, Fx{01}, ..., Fx{0f}
-       movdqu  xgft6_hi, [tmp3+mul_array+16]   ;     "     Fx{00}, Fx{10}, ..., Fx{f0}
-
-       mov     dest2, [dest1+PS]
-       mov     dest3, [dest1+2*PS]
-       mov     dest4, [dest1+3*PS]  ; reuse mul_array
-       mov     dest5, [dest1+4*PS]
-       mov     dest6, [dest1+5*PS]  ; reuse vec_i
-       mov     dest1, [dest1]
-
-.loop16:
-       XLDR    x0, [src+pos]           ;Get next source vector
-
-       movdqu  xtmpl1, [tmp3]  ;Load array Ax{00}, Ax{01}, Ax{02}, ...
-       movdqu  xtmph1, [tmp3+16]       ; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
-       movdqu  xtmpl2, [tmp3+vec]      ;Load array Bx{00}, Bx{01}, Bx{02}, ...
-       movdqu  xtmph2, [tmp3+vec+16]   ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
-       movdqu  xtmpl3, [tmp3+2*vec]    ;Load array Cx{00}, Cx{01}, Cx{02}, ...
-       movdqu  xtmph3, [tmp3+2*vec+16] ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
-       XLDR    xd1, [dest1+pos]        ;Get next dest vector
-
-       movdqa  xtmpa, x0               ;Keep unshifted copy of src
-       psraw   x0, 4                   ;Shift to put high nibble into bits 4-0
-       pand    x0, xmask0f             ;Mask high src nibble in bits 4-0
-       pand    xtmpa, xmask0f          ;Mask low src nibble in bits 4-0
-
-       ;dest1
-       pshufb  xtmph1, x0              ;Lookup mul table of high nibble
-       pshufb  xtmpl1, xtmpa           ;Lookup mul table of low nibble
-       pxor    xtmph1, xtmpl1          ;GF add high and low partials
-       pxor    xd1, xtmph1
-
-       XLDR    xd2, [dest2+pos]        ;reuse xtmpl1. Get next dest vector
-       XLDR    xd3, [dest3+pos]        ;reuse xtmph1. Get next dest3 vector
-
-       ;dest2
-       pshufb  xtmph2, x0              ;Lookup mul table of high nibble
-       pshufb  xtmpl2, xtmpa           ;Lookup mul table of low nibble
-       pxor    xtmph2, xtmpl2          ;GF add high and low partials
-       pxor    xd2, xtmph2
-
-       ;dest3
-       pshufb  xtmph3, x0              ;Lookup mul table of high nibble
-       pshufb  xtmpl3, xtmpa           ;Lookup mul table of low nibble
-       pxor    xtmph3, xtmpl3          ;GF add high and low partials
-       pxor    xd3, xtmph3
-
-       XSTR    [dest1+pos], xd1        ;Store result into dest1
-       XSTR    [dest2+pos], xd2        ;Store result into dest2
-       XSTR    [dest3+pos], xd3        ;Store result into dest3
-
-       movdqa  xtmph1, xgft4_hi        ;Reload const array registers
-       movdqa  xtmpl1, xgft4_lo        ;Reload const array registers
-       movdqa  xtmph2, xgft5_hi        ;Reload const array registers
-       movdqa  xtmpl2, xgft5_lo        ;Reload const array registers
-       movdqa  xtmph3, xgft6_hi        ;Reload const array registers
-       movdqa  xtmpl3, xgft6_lo        ;Reload const array registers
-
-       ;dest4
-       XLDR    xd1, [dest4+pos]        ;Get next dest vector
-       pshufb  xtmph1, x0              ;Lookup mul table of high nibble
-       pshufb  xtmpl1, xtmpa           ;Lookup mul table of low nibble
-       pxor    xtmph1, xtmpl1          ;GF add high and low partials
-       pxor    xd1, xtmph1
-
-       XLDR    xd2, [dest5+pos]        ;reuse xtmpl1. Get next dest vector
-       XLDR    xd3, [dest6+pos]        ;reuse xtmph1. Get next dest vector
-
-       ;dest5
-       pshufb  xtmph2, x0              ;Lookup mul table of high nibble
-       pshufb  xtmpl2, xtmpa           ;Lookup mul table of low nibble
-       pxor    xtmph2, xtmpl2          ;GF add high and low partials
-       pxor    xd2, xtmph2
-
-       ;dest6
-       pshufb  xtmph3, x0              ;Lookup mul table of high nibble
-       pshufb  xtmpl3, xtmpa           ;Lookup mul table of low nibble
-       pxor    xtmph3, xtmpl3          ;GF add high and low partials
-       pxor    xd3, xtmph3
-
-       XSTR    [dest4+pos], xd1        ;Store result into dest4
-       XSTR    [dest5+pos], xd2        ;Store result into dest5
-       XSTR    [dest6+pos], xd3        ;Store result into dest6
-
-       add     pos, 16                 ;Loop on 16 bytes at a time
-       cmp     pos, len
-       jle     .loop16
-
-       lea     tmp, [len + 16]
-       cmp     pos, tmp
-       je      .return_pass
-
-.lessthan16:
-       ;; Tail len
-       ;; Do one more overlap pass
-       ;; Overlapped offset length-16
-       mov     tmp, len                ;Backup len as len=rdi
-
-       XLDR    x0, [src+tmp]           ;Get next source vector
-       XLDR    xd1, [dest4+tmp]        ;Get next dest vector
-       XLDR    xd2, [dest5+tmp]        ;reuse xtmpl1. Get next dest vector
-       XLDR    xd3, [dest6+tmp]        ;reuse xtmph1. Get next dest vector
-
-       sub     len, pos
-
-       movdqa  xtmph3, [constip16]     ;Load const of i + 16
-       pinsrb  xtmpl3, len.w, 15
-       pshufb  xtmpl3, xmask0f         ;Broadcast len to all bytes
-       pcmpgtb xtmpl3, xtmph3
-
-       movdqa  xtmpa, x0               ;Keep unshifted copy of src
-       psraw   x0, 4                   ;Shift to put high nibble into bits 4-0
-       pand    x0, xmask0f             ;Mask high src nibble in bits 4-0
-       pand    xtmpa, xmask0f          ;Mask low src nibble in bits 4-0
-
-       ;dest4
-       pshufb  xgft4_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft4_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft4_hi, xgft4_lo      ;GF add high and low partials
-       pand    xgft4_hi, xtmpl3
-       pxor    xd1, xgft4_hi
-
-       ;dest5
-       pshufb  xgft5_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft5_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft5_hi, xgft5_lo      ;GF add high and low partials
-       pand    xgft5_hi, xtmpl3
-       pxor    xd2, xgft5_hi
-
-       ;dest6
-       pshufb  xgft6_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft6_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft6_hi, xgft6_lo      ;GF add high and low partials
-       pand    xgft6_hi, xtmpl3
-       pxor    xd3, xgft6_hi
-
-       XSTR    [dest4+tmp], xd1        ;Store result into dest4
-       XSTR    [dest5+tmp], xd2        ;Store result into dest5
-       XSTR    [dest6+tmp], xd3        ;Store result into dest6
-
-       movdqu  xgft4_lo, [tmp3]        ;Load array Ax{00}, Ax{01}, Ax{02}, ...
-       movdqu  xgft4_hi, [tmp3+16]     ; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
-       movdqu  xgft5_lo, [tmp3+vec]    ;Load array Bx{00}, Bx{01}, Bx{02}, ...
-       movdqu  xgft5_hi, [tmp3+vec+16] ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
-       movdqu  xgft6_lo, [tmp3+2*vec]  ;Load array Cx{00}, Cx{01}, Cx{02}, ...
-       movdqu  xgft6_hi, [tmp3+2*vec+16]       ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
-       XLDR    xd1, [dest1+tmp]        ;Get next dest vector
-       XLDR    xd2, [dest2+tmp]        ;reuse xtmpl1. Get next dest vector
-       XLDR    xd3, [dest3+tmp]        ;reuse xtmph1. Get next dest3 vector
-
-       ;dest1
-       pshufb  xgft4_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft4_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft4_hi, xgft4_lo              ;GF add high and low partials
-       pand    xgft4_hi, xtmpl3
-       pxor    xd1, xgft4_hi
-
-       ;dest2
-       pshufb  xgft5_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft5_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft5_hi, xgft5_lo      ;GF add high and low partials
-       pand    xgft5_hi, xtmpl3
-       pxor    xd2, xgft5_hi
-
-       ;dest3
-       pshufb  xgft6_hi, x0            ;Lookup mul table of high nibble
-       pshufb  xgft6_lo, xtmpa         ;Lookup mul table of low nibble
-       pxor    xgft6_hi, xgft6_lo      ;GF add high and low partials
-       pand    xgft6_hi, xtmpl3
-       pxor    xd3, xgft6_hi
-
-       XSTR    [dest1+tmp], xd1        ;Store result into dest1
-       XSTR    [dest2+tmp], xd2        ;Store result into dest2
-       XSTR    [dest3+tmp], xd3        ;Store result into dest3
-
-.return_pass:
-       FUNC_RESTORE
-       mov     return, 0
-       ret
-
-.return_fail:
-       FUNC_RESTORE
-       mov     return, 1
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-
-mask0f: ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-constip16:
-       ddq 0xf0f1f2f3f4f5f6f7f8f9fafbfcfdfeff
-
-;;;       func             core, ver, snum
-slversion gf_6vect_mad_sse, 00,  01,  020f

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_vect_dot_prod_avx.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_vect_dot_prod_avx.asm.s
deleted file mode 100644 (file)
index 4f06b12..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_vect_dot_prod_avx.asm.s
+++ /dev/null
@@ -1,271 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_vect_dot_prod_avx(len, vec, *g_tbls, **buffs, *dest);
-;;;
-
-%include "reg_sizes.asm"
-
-%ifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
-
- %define tmp   r11
- %define tmp2  r10
- %define tmp3  r9
- %define return rax
- %macro  SLDR 2
- %endmacro
- %define SSTR SLDR
- %define PS 8
- %define func(x) x:
- %define FUNC_SAVE
- %define FUNC_RESTORE
-%endif
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0   rcx
- %define arg1   rdx
- %define arg2   r8
- %define arg3   r9
-
- %define arg4   r12            ; must be saved and loaded
- %define tmp    r11
- %define tmp2   r10
- %define tmp3   rdi            ; must be saved and loaded
- %define return rax
- %macro  SLDR 2
- %endmacro
- %define SSTR SLDR
- %define PS 8
- %define frame_size 2*8
- %define arg(x)      [rsp + frame_size + PS + PS*x]
-
- %define func(x) proc_frame x
- %macro FUNC_SAVE 0
-       rex_push_reg    r12
-       push_reg        rdi
-       end_prolog
-       mov     arg4, arg(4)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       pop     rdi
-       pop     r12
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, elf32
-
-;;;================== High Address;
-;;;    arg4
-;;;    arg3
-;;;    arg2
-;;;    arg1
-;;;    arg0
-;;;    return
-;;;<================= esp of caller
-;;;    ebp
-;;;<================= ebp = esp
-;;;    esi
-;;;    edi
-;;;    ebx
-;;;<================= esp of callee
-;;;
-;;;================== Low Address;
-
- %define PS 4
- %define LOG_PS 2
- %define func(x) x:
- %define arg(x) [ebp + PS*2 + PS*x]
-
- %define trans   ecx                   ;trans is for the variables in stack
- %define arg0    trans
- %define arg0_m  arg(0)
- %define arg1    trans
- %define arg1_m  arg(1)
- %define arg2    arg2_m
- %define arg2_m  arg(2)
- %define arg3    ebx
- %define arg4    trans
- %define arg4_m  arg(4)
- %define tmp    edx
- %define tmp2    edi
- %define tmp3    esi
- %define return  eax
- %macro SLDR 2 ;; stack load/restore
-       mov %1, %2
- %endmacro
- %define SSTR SLDR
-
- %macro FUNC_SAVE 0
-       push    ebp
-       mov     ebp, esp
-       push    esi
-       push    edi
-       push    ebx
-       mov     arg3, arg(3)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       pop     ebx
-       pop     edi
-       pop     esi
-       mov     esp, ebp
-       pop     ebp
- %endmacro
-
-%endif ; output formats
-
-%define len   arg0
-%define vec   arg1
-%define mul_array arg2
-%define        src   arg3
-%define dest  arg4
-
-%define vec_i tmp2
-%define ptr   tmp3
-%define pos   return
-
- %ifidn PS,4                           ;32-bit code
-       %define  vec_m  arg1_m
-       %define  len_m  arg0_m
-       %define  dest_m arg4_m
- %endif
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR vmovdqu
- %define XSTR vmovdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR vmovdqa
-  %define XSTR vmovdqa
- %else
-  %define XLDR vmovntdqa
-  %define XSTR vmovntdq
- %endif
-%endif
-
-%ifidn PS,8                    ; 64-bit code
- default rel
-  [bits 64]
-%endif
-
-section .text
-
-%define xmask0f  xmm5
-%define xgft_lo  xmm4
-%define xgft_hi  xmm3
-
-%define x0     xmm0
-%define xtmpa  xmm1
-%define xp     xmm2
-
-align 16
-global gf_vect_dot_prod_avx:function
-func(gf_vect_dot_prod_avx)
-       FUNC_SAVE
-       SLDR    len, len_m
-       sub     len, 16
-       SSTR    len_m, len
-       jl      .return_fail
-       xor     pos, pos
-       vmovdqa xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-
-.loop16:
-       vpxor   xp, xp
-       mov     tmp, mul_array
-       xor     vec_i, vec_i
-
-.next_vect:
-
-       mov     ptr, [src+vec_i*PS]
-       vmovdqu xgft_lo, [tmp]          ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
-       vmovdqu xgft_hi, [tmp+16]       ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
-       XLDR    x0, [ptr+pos]           ;Get next source vector
-
-       add     tmp, 32
-       add     vec_i, 1
-
-       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-
-       vpshufb xgft_hi, xgft_hi, x0    ;Lookup mul table of high nibble
-       vpshufb xgft_lo, xgft_lo, xtmpa ;Lookup mul table of low nibble
-       vpxor   xgft_hi, xgft_hi, xgft_lo ;GF add high and low partials
-       vpxor   xp, xp, xgft_hi         ;xp += partial
-
-       SLDR    vec, vec_m
-       cmp     vec_i, vec
-       jl      .next_vect
-
-       SLDR    dest, dest_m
-       XSTR    [dest+pos], xp
-
-       add     pos, 16                 ;Loop on 16 bytes at a time
-       SLDR    len, len_m
-       cmp     pos, len
-       jle     .loop16
-
-       lea     tmp, [len + 16]
-       cmp     pos, tmp
-       je      .return_pass
-
-       ;; Tail len
-       mov     pos, len        ;Overlapped offset length-16
-       jmp     .loop16         ;Do one more overlap pass
-
-.return_pass:
-       mov     return, 0
-       FUNC_RESTORE
-       ret
-
-.return_fail:
-       mov     return, 1
-       FUNC_RESTORE
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-
-mask0f:
-ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-
-;;;       func                 core, ver, snum
-slversion gf_vect_dot_prod_avx, 02,  05,  0061

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_vect_dot_prod_avx2.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_vect_dot_prod_avx2.asm.s
deleted file mode 100644 (file)
index 47bb38c..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_vect_dot_prod_avx2.asm.s
+++ /dev/null
@@ -1,280 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_vect_dot_prod_avx2(len, vec, *g_tbls, **buffs, *dest);
-;;;
-
-%include "reg_sizes.asm"
-
-%ifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
-
- %define tmp   r11
- %define tmp.w r11d
- %define tmp.b r11b
- %define tmp2  r10
- %define tmp3  r9
- %define return rax
- %macro  SLDR   2
- %endmacro
- %define SSTR   SLDR
- %define PS     8
- %define func(x) x:
- %define FUNC_SAVE
- %define FUNC_RESTORE
-%endif
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0   rcx
- %define arg1   rdx
- %define arg2   r8
- %define arg3   r9
-
- %define arg4   r12            ; must be saved and loaded
- %define tmp    r11
- %define tmp.w  r11d
- %define tmp.b  r11b
- %define tmp2   r10
- %define tmp3   rdi            ; must be saved and loaded
- %define return rax
- %macro  SLDR   2
- %endmacro
- %define SSTR   SLDR
- %define PS     8
- %define frame_size 2*8
- %define arg(x)      [rsp + frame_size + PS + PS*x]
-
- %define func(x) proc_frame x
- %macro FUNC_SAVE 0
-       rex_push_reg    r12
-       push_reg        rdi
-       end_prolog
-       mov     arg4, arg(4)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       pop     rdi
-       pop     r12
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, elf32
-
-;;;================== High Address;
-;;;    arg4
-;;;    arg3
-;;;    arg2
-;;;    arg1
-;;;    arg0
-;;;    return
-;;;<================= esp of caller
-;;;    ebp
-;;;<================= ebp = esp
-;;;    esi
-;;;    edi
-;;;    ebx
-;;;<================= esp of callee
-;;;
-;;;================== Low Address;
-
- %define PS 4
- %define LOG_PS 2
- %define func(x) x:
- %define arg(x) [ebp + PS*2 + PS*x]
-
- %define trans   ecx                   ;trans is for the variables in stack
- %define arg0    trans
- %define arg0_m  arg(0)
- %define arg1    trans
- %define arg1_m  arg(1)
- %define arg2    arg2_m
- %define arg2_m  arg(2)
- %define arg3    ebx
- %define arg4    trans
- %define arg4_m  arg(4)
- %define tmp    edx
- %define tmp.w   edx
- %define tmp.b   dl
- %define tmp2    edi
- %define tmp3    esi
- %define return  eax
- %macro SLDR     2                     ;stack load/restore
-       mov %1, %2
- %endmacro
- %define SSTR SLDR
-
- %macro FUNC_SAVE 0
-       push    ebp
-       mov     ebp, esp
-       push    esi
-       push    edi
-       push    ebx
-       mov     arg3, arg(3)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       pop     ebx
-       pop     edi
-       pop     esi
-       mov     esp, ebp
-       pop     ebp
- %endmacro
-
-%endif ; output formats
-
-%define len   arg0
-%define vec   arg1
-%define mul_array arg2
-%define        src   arg3
-%define dest  arg4
-
-%define vec_i tmp2
-%define ptr   tmp3
-%define pos   return
-
-%ifidn PS,4                            ;32-bit code
- %define  vec_m  arg1_m
- %define  len_m  arg0_m
- %define  dest_m arg4_m
-%endif
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR vmovdqu
- %define XSTR vmovdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR vmovdqa
-  %define XSTR vmovdqa
- %else
-  %define XLDR vmovntdqa
-  %define XSTR vmovntdq
- %endif
-%endif
-
-%ifidn PS,8                            ;64-bit code
- default rel
- [bits 64]
-%endif
-
-section .text
-
-%define xmask0f  ymm3
-%define xmask0fx xmm3
-%define xgft_lo  ymm4
-%define xgft_hi  ymm5
-
-%define x0     ymm0
-%define xtmpa  ymm1
-%define xp     ymm2
-
-align 16
-global gf_vect_dot_prod_avx2:function
-func(gf_vect_dot_prod_avx2)
-       FUNC_SAVE
-       SLDR    len, len_m
-       sub     len, 32
-       SSTR    len_m, len
-       jl      .return_fail
-       xor     pos, pos
-       mov     tmp.b, 0x0f
-       vpinsrb xmask0fx, xmask0fx, tmp.w, 0
-       vpbroadcastb xmask0f, xmask0fx  ;Construct mask 0x0f0f0f...
-
-.loop32:
-       vpxor   xp, xp
-       mov     tmp, mul_array
-       xor     vec_i, vec_i
-
-.next_vect:
-
-       mov     ptr, [src+vec_i*PS]
-
-       vmovdqu xgft_lo, [tmp]          ;Load array Cx{00}, Cx{01}, Cx{02}, ...
-                                       ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
-       vperm2i128 xgft_hi, xgft_lo, xgft_lo, 0x11 ; swapped to hi | hi
-       vperm2i128 xgft_lo, xgft_lo, xgft_lo, 0x00 ; swapped to lo | lo
-
-       XLDR    x0, [ptr+pos]           ;Get next source vector
-
-       add     tmp, 32
-       add     vec_i, 1
-
-       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-
-       vpshufb xgft_hi, xgft_hi, x0    ;Lookup mul table of high nibble
-       vpshufb xgft_lo, xgft_lo, xtmpa ;Lookup mul table of low nibble
-       vpxor   xgft_hi, xgft_hi, xgft_lo ;GF add high and low partials
-       vpxor   xp, xp, xgft_hi         ;xp += partial
-
-       SLDR    vec, vec_m
-       cmp     vec_i, vec
-       jl      .next_vect
-
-       SLDR    dest, dest_m
-       XSTR    [dest+pos], xp
-
-       add     pos, 32                 ;Loop on 32 bytes at a time
-       SLDR    len, len_m
-       cmp     pos, len
-       jle     .loop32
-
-       lea     tmp, [len + 32]
-       cmp     pos, tmp
-       je      .return_pass
-
-       ;; Tail len
-       mov     pos, len        ;Overlapped offset length-32
-       jmp     .loop32         ;Do one more overlap pass
-
-.return_pass:
-       mov     return, 0
-       FUNC_RESTORE
-       ret
-
-.return_fail:
-       mov     return, 1
-       FUNC_RESTORE
-       ret
-
-endproc_frame
-
-section .data
-
-;;;       func                  core, ver, snum
-slversion gf_vect_dot_prod_avx2, 04,  05,  0190

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_vect_dot_prod_sse.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_vect_dot_prod_sse.asm.s
deleted file mode 100644 (file)
index f7699c1..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_vect_dot_prod_sse.asm.s
+++ /dev/null
@@ -1,271 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_vect_dot_prod_sse(len, vec, *g_tbls, **buffs, *dest);
-;;;
-
-%include "reg_sizes.asm"
-
-%ifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
-
- %define tmp   r11
- %define tmp2  r10
- %define tmp3  r9
- %define return rax
- %macro  SLDR 2
- %endmacro
- %define SSTR SLDR
- %define PS 8
- %define func(x) x:
- %define FUNC_SAVE
- %define FUNC_RESTORE
-%endif
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0   rcx
- %define arg1   rdx
- %define arg2   r8
- %define arg3   r9
-
- %define arg4   r12            ; must be saved and loaded
- %define tmp    r11
- %define tmp2   r10
- %define tmp3   rdi            ; must be saved and loaded
- %define return rax
- %macro  SLDR 2
- %endmacro
- %define SSTR SLDR
- %define PS 8
- %define frame_size 2*8
- %define arg(x)      [rsp + frame_size + PS + PS*x]
-
- %define func(x) proc_frame x
- %macro FUNC_SAVE 0
-       rex_push_reg    r12
-       push_reg        rdi
-       end_prolog
-       mov     arg4, arg(4)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       pop     rdi
-       pop     r12
- %endmacro
-%endif
-
-%ifidn __OUTPUT_FORMAT__, elf32
-
-;;;================== High Address;
-;;;    arg4
-;;;    arg3
-;;;    arg2
-;;;    arg1
-;;;    arg0
-;;;    return
-;;;<================= esp of caller
-;;;    ebp
-;;;<================= ebp = esp
-;;;    esi
-;;;    edi
-;;;    ebx
-;;;<================= esp of callee
-;;;
-;;;================== Low Address;
-
- %define PS 4
- %define LOG_PS 2
- %define func(x) x:
- %define arg(x) [ebp + PS*2 + PS*x]
-
- %define trans   ecx                   ;trans is for the variables in stack
- %define arg0    trans
- %define arg0_m  arg(0)
- %define arg1    trans
- %define arg1_m  arg(1)
- %define arg2    arg2_m
- %define arg2_m  arg(2)
- %define arg3    ebx
- %define arg4    trans
- %define arg4_m  arg(4)
- %define tmp    edx
- %define tmp2    edi
- %define tmp3    esi
- %define return  eax
- %macro SLDR 2 ;; stack load/restore
-       mov %1, %2
- %endmacro
- %define SSTR SLDR
-
- %macro FUNC_SAVE 0
-       push    ebp
-       mov     ebp, esp
-       push    esi
-       push    edi
-       push    ebx
-       mov     arg3, arg(3)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       pop     ebx
-       pop     edi
-       pop     esi
-       mov     esp, ebp
-       pop     ebp
- %endmacro
-
-%endif ; output formats
-
-%define len   arg0
-%define vec   arg1
-%define mul_array arg2
-%define        src   arg3
-%define dest  arg4
-
-%define vec_i tmp2
-%define ptr   tmp3
-%define pos   return
-
- %ifidn PS,4                           ;32-bit code
-       %define  vec_m  arg1_m
-       %define  len_m  arg0_m
-       %define  dest_m arg4_m
- %endif
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR movdqu
- %define XSTR movdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR movdqa
-  %define XSTR movdqa
- %else
-  %define XLDR movntdqa
-  %define XSTR movntdq
- %endif
-%endif
-
-%ifidn PS,8                            ;64-bit code
- default rel
-  [bits 64]
-%endif
-
-section .text
-
-%define xmask0f  xmm5
-%define xgft_lo  xmm4
-%define xgft_hi  xmm3
-
-%define x0     xmm0
-%define xtmpa  xmm1
-%define xp     xmm2
-
-align 16
-global gf_vect_dot_prod_sse:function
-func(gf_vect_dot_prod_sse)
-       FUNC_SAVE
-       SLDR    len, len_m
-       sub     len, 16
-       SSTR    len_m, len
-       jl      .return_fail
-       xor     pos, pos
-       movdqa  xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-
-.loop16:
-       pxor    xp, xp
-       mov     tmp, mul_array
-       xor     vec_i, vec_i
-
-.next_vect:
-
-       mov     ptr, [src+vec_i*PS]
-       movdqu  xgft_lo, [tmp]          ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
-       movdqu  xgft_hi, [tmp+16]       ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
-       XLDR    x0, [ptr+pos]           ;Get next source vector
-
-       add     tmp, 32
-       add     vec_i, 1
-
-       movdqa  xtmpa, x0               ;Keep unshifted copy of src
-       psraw   x0, 4                   ;Shift to put high nibble into bits 4-0
-       pand    x0, xmask0f             ;Mask high src nibble in bits 4-0
-       pand    xtmpa, xmask0f          ;Mask low src nibble in bits 4-0
-
-       pshufb  xgft_hi, x0             ;Lookup mul table of high nibble
-       pshufb  xgft_lo, xtmpa          ;Lookup mul table of low nibble
-       pxor    xgft_hi, xgft_lo        ;GF add high and low partials
-       pxor    xp, xgft_hi             ;xp += partial
-
-       SLDR    vec, vec_m
-       cmp     vec_i, vec
-       jl      .next_vect
-
-       SLDR    dest, dest_m
-       XSTR    [dest+pos], xp
-
-       add     pos, 16                 ;Loop on 16 bytes at a time
-       SLDR    len, len_m
-       cmp     pos, len
-       jle     .loop16
-
-       lea     tmp, [len + 16]
-       cmp     pos, tmp
-       je      .return_pass
-
-       ;; Tail len
-       mov     pos, len        ;Overlapped offset length-16
-       jmp     .loop16         ;Do one more overlap pass
-
-.return_pass:
-       mov     return, 0
-       FUNC_RESTORE
-       ret
-
-.return_fail:
-       mov     return, 1
-       FUNC_RESTORE
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-
-mask0f:        ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-
-;;;       func                 core, ver, snum
-slversion gf_vect_dot_prod_sse, 00,  05,  0060

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_vect_mad_avx.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_vect_mad_avx.asm.s
deleted file mode 100644 (file)
index f0fd91a..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_vect_mad_avx.asm.s
+++ /dev/null
@@ -1,196 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_vect_mad_avx(len, vec, vec_i, mul_array, src, dest);
-;;;
-
-%include "reg_sizes.asm"
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0  rcx
- %define arg0.w ecx
- %define arg1  rdx
- %define arg2  r8
- %define arg3  r9
- %define arg4  r12
- %define arg5  r15
- %define tmp   r11
- %define return rax
- %define return.w eax
- %define PS 8
- %define stack_size 16*3 + 3*8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
- %define func(x) proc_frame x
-
-%macro FUNC_SAVE 0
-       sub     rsp, stack_size
-       vmovdqa [rsp+16*0],xmm6
-       vmovdqa [rsp+16*1],xmm7
-       vmovdqa [rsp+16*2],xmm8
-       save_reg        r12,  3*16 + 0*8
-       save_reg        r15,  3*16 + 1*8
-       end_prolog
-       mov     arg4, arg(4)
-       mov     arg5, arg(5)
-%endmacro
-
-%macro FUNC_RESTORE 0
-       vmovdqa xmm6, [rsp+16*0]
-       vmovdqa xmm7, [rsp+16*1]
-       vmovdqa xmm8, [rsp+16*2]
-       mov     r12,  [rsp + 3*16 + 0*8]
-       mov     r15,  [rsp + 3*16 + 1*8]
-       add     rsp, stack_size
-%endmacro
-
-%elifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg0.w edi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
- %define tmp   r11
- %define return rax
- %define return.w eax
-
- %define func(x) x:
- %define FUNC_SAVE
- %define FUNC_RESTORE
-%endif
-
-;;; gf_vect_mad_avx(len, vec, vec_i, mul_array, src, dest)
-%define len   arg0
-%define len.w arg0.w
-%define vec    arg1
-%define vec_i    arg2
-%define mul_array arg3
-%define        src   arg4
-%define dest  arg5
-%define pos   return
-%define pos.w return.w
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR vmovdqu
- %define XSTR vmovdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR vmovdqa
-  %define XSTR vmovdqa
- %else
-  %define XLDR vmovntdqa
-  %define XSTR vmovntdq
- %endif
-%endif
-
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f  xmm8
-%define xgft_lo  xmm7
-%define xgft_hi  xmm6
-
-%define x0     xmm0
-%define xtmpa  xmm1
-%define xtmph  xmm2
-%define xtmpl  xmm3
-%define xd     xmm4
-%define xtmpd  xmm5
-
-align 16
-global gf_vect_mad_avx:function
-func(gf_vect_mad_avx)
-       FUNC_SAVE
-       sub     len, 16
-       jl      .return_fail
-
-       xor     pos, pos
-       vmovdqa xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-
-       sal     vec_i, 5                ;Multiply by 32
-       vmovdqu xgft_lo, [vec_i+mul_array]      ;Load array Cx{00}, Cx{01}, Cx{02}, ...
-       vmovdqu xgft_hi, [vec_i+mul_array+16]   ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
-
-       XLDR    xtmpd, [dest+len]       ;backup the last 16 bytes in dest
-
-.loop16:
-       XLDR    xd, [dest+pos]          ;Get next dest vector
-.loop16_overlap:
-       XLDR    x0, [src+pos]           ;Get next source vector
-
-       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-
-       vpshufb xtmph, xgft_hi, x0      ;Lookup mul table of high nibble
-       vpshufb xtmpl, xgft_lo, xtmpa   ;Lookup mul table of low nibble
-       vpxor   xtmph, xtmph, xtmpl ;GF add high and low partials
-       vpxor   xd, xd, xtmph           ;xd += partial
-
-       XSTR    [dest+pos], xd
-       add     pos, 16                 ;Loop on 16 bytes at a time
-       cmp     pos, len
-       jle     .loop16
-
-       lea     tmp, [len + 16]
-       cmp     pos, tmp
-       je      .return_pass
-
-       ;; Tail len
-       mov     pos, len        ;Overlapped offset length-16
-       vmovdqa xd, xtmpd       ;Restore xd
-       jmp     .loop16_overlap ;Do one more overlap pass
-
-.return_pass:
-       mov     return, 0
-       FUNC_RESTORE
-       ret
-
-.return_fail:
-       mov     return, 1
-       FUNC_RESTORE
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-
-mask0f: ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-
-;;;       func            core, ver, snum
-slversion gf_vect_mad_avx, 02,  01,  0201

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_vect_mad_avx2.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_vect_mad_avx2.asm.s
deleted file mode 100644 (file)
index 5fa5da4..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_vect_mad_avx2.asm.s
+++ /dev/null
@@ -1,203 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_vect_mad_avx2(len, vec, vec_i, mul_array, src, dest);
-;;;
-
-%include "reg_sizes.asm"
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0   rcx
- %define arg0.w ecx
- %define arg1   rdx
- %define arg2   r8
- %define arg3   r9
- %define arg4   r12            ; must be saved and loaded
- %define arg5   r15
-
- %define tmp    r11
- %define tmp.w  r11d
- %define tmp.b  r11b
- %define return rax
- %define return.w eax
- %define PS 8
- %define stack_size 16*3 + 3*8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
- %define func(x) proc_frame x
-
- %macro FUNC_SAVE 0
-       sub     rsp, stack_size
-       vmovdqa [rsp+16*0],xmm6
-       vmovdqa [rsp+16*1],xmm7
-       vmovdqa [rsp+16*2],xmm8
-       save_reg        r12,  3*16 + 0*8
-       save_reg        r15,  3*16 + 1*8
-       end_prolog
-       mov     arg4, arg(4)
-       mov     arg5, arg(5)
- %endmacro
-
- %macro FUNC_RESTORE 0
-       vmovdqa xmm6, [rsp+16*0]
-       vmovdqa xmm7, [rsp+16*1]
-       vmovdqa xmm8, [rsp+16*2]
-       mov     r12,  [rsp + 3*16 + 0*8]
-       mov     r15,  [rsp + 3*16 + 1*8]
-       add     rsp, stack_size
- %endmacro
-
-%elifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg0.w edi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
-
- %define tmp      r11
- %define tmp.w    r11d
- %define tmp.b    r11b
- %define return rax
- %define return.w eax
-
- %define func(x) x:
- %define FUNC_SAVE
- %define FUNC_RESTORE
-%endif
-
-
-;;; gf_vect_mad_avx2(len, vec, vec_i, mul_array, src, dest)
-%define len   arg0
-%define len.w arg0.w
-%define vec   arg1
-%define vec_i    arg2
-%define mul_array arg3
-%define        src   arg4
-%define dest  arg5
-%define pos   return
-%define pos.w return.w
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR vmovdqu
- %define XSTR vmovdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR vmovdqa
-  %define XSTR vmovdqa
- %else
-  %define XLDR vmovntdqa
-  %define XSTR vmovntdq
- %endif
-%endif
-
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f  ymm8
-%define xmask0fx xmm8
-%define xgft_lo  ymm7
-%define xgft_hi  ymm6
-
-%define x0     ymm0
-%define xtmpa  ymm1
-%define xtmph  ymm2
-%define xtmpl  ymm3
-%define xd     ymm4
-%define xtmpd  ymm5
-
-align 16
-global gf_vect_mad_avx2:function
-func(gf_vect_mad_avx2)
-       FUNC_SAVE
-       sub     len, 32
-       jl      .return_fail
-       xor     pos, pos
-       mov     tmp.b, 0x0f
-       vpinsrb xmask0fx, xmask0fx, tmp.w, 0
-       vpbroadcastb xmask0f, xmask0fx  ;Construct mask 0x0f0f0f...
-
-       sal     vec_i, 5                ;Multiply by 32
-       vmovdqu xgft_lo, [vec_i+mul_array]      ;Load array Cx{00}, Cx{01}, Cx{02}, ...
-                                               ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
-       vperm2i128 xgft_hi, xgft_lo, xgft_lo, 0x11 ; swapped to hi | hi
-       vperm2i128 xgft_lo, xgft_lo, xgft_lo, 0x00 ; swapped to lo | lo
-
-       XLDR    xtmpd, [dest+len]       ;backup the last 32 bytes in dest
-
-.loop32:
-       XLDR    xd, [dest+pos]          ;Get next dest vector
-.loop32_overlap:
-       XLDR    x0, [src+pos]           ;Get next source vector
-
-       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-
-       vpshufb xtmph, xgft_hi, x0      ;Lookup mul table of high nibble
-       vpshufb xtmpl, xgft_lo, xtmpa   ;Lookup mul table of low nibble
-       vpxor   xtmph, xtmph, xtmpl ;GF add high and low partials
-       vpxor   xd, xd, xtmph           ;xd += partial
-
-       XSTR    [dest+pos], xd
-       add     pos, 32                 ;Loop on 32 bytes at a time
-       cmp     pos, len
-       jle     .loop32
-
-       lea     tmp, [len + 32]
-       cmp     pos, tmp
-       je      .return_pass
-
-       ;; Tail len
-       mov     pos, len        ;Overlapped offset length-32
-       vmovdqa xd, xtmpd       ;Restore xd
-       jmp     .loop32_overlap ;Do one more overlap pass
-
-.return_pass:
-       mov     return, 0
-       FUNC_RESTORE
-       ret
-
-.return_fail:
-       mov     return, 1
-       FUNC_RESTORE
-       ret
-
-endproc_frame
-
-section .data
-
-;;;       func             core, ver, snum
-slversion gf_vect_mad_avx2, 04,  01,  0202

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_vect_mad_sse.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_vect_mad_sse.asm.s
deleted file mode 100644 (file)
index b3ebc97..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_vect_mad_sse.asm.s
+++ /dev/null
@@ -1,197 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_vect_mad_sse(len, vec, vec_i, mul_array, src, dest);
-;;;
-
-%include "reg_sizes.asm"
-
-%ifidn __OUTPUT_FORMAT__, win64
- %define arg0  rcx
- %define arg0.w ecx
- %define arg1  rdx
- %define arg2  r8
- %define arg3  r9
- %define arg4  r12
- %define arg5  r15
- %define tmp   r11
- %define return rax
- %define return.w eax
- %define PS 8
- %define stack_size 16*3 + 3*8
- %define arg(x)      [rsp + stack_size + PS + PS*x]
- %define func(x) proc_frame x
-
-%macro FUNC_SAVE 0
-       sub     rsp, stack_size
-       movdqa  [rsp+16*0],xmm6
-       movdqa  [rsp+16*1],xmm7
-       movdqa  [rsp+16*2],xmm8
-       save_reg        r12,  3*16 + 0*8
-       save_reg        r15,  3*16 + 1*8
-       end_prolog
-       mov     arg4, arg(4)
-       mov     arg5, arg(5)
-%endmacro
-
-%macro FUNC_RESTORE 0
-       movdqa  xmm6, [rsp+16*0]
-       movdqa  xmm7, [rsp+16*1]
-       movdqa  xmm8, [rsp+16*2]
-       mov     r12,  [rsp + 3*16 + 0*8]
-       mov     r15,  [rsp + 3*16 + 1*8]
-       add     rsp, stack_size
-%endmacro
-
-%elifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg0.w edi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
- %define tmp   r11
- %define return rax
- %define return.w eax
-
- %define func(x) x:
- %define FUNC_SAVE
- %define FUNC_RESTORE
-%endif
-
-;;; gf_vect_mad_sse(len, vec, vec_i, mul_array, src, dest)
-%define len   arg0
-%define len.w arg0.w
-%define vec    arg1
-%define vec_i    arg2
-%define mul_array arg3
-%define        src   arg4
-%define dest  arg5
-%define pos   return
-%define pos.w return.w
-
-%ifndef EC_ALIGNED_ADDR
-;;; Use Un-aligned load/store
- %define XLDR movdqu
- %define XSTR movdqu
-%else
-;;; Use Non-temporal load/stor
- %ifdef NO_NT_LDST
-  %define XLDR movdqa
-  %define XSTR movdqa
- %else
-  %define XLDR movntdqa
-  %define XSTR movntdq
- %endif
-%endif
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f  xmm8
-%define xgft_lo  xmm7
-%define xgft_hi  xmm6
-
-%define x0     xmm0
-%define xtmpa  xmm1
-%define xtmph  xmm2
-%define xtmpl  xmm3
-%define xd     xmm4
-%define xtmpd  xmm5
-
-
-align 16
-global gf_vect_mad_sse:function
-func(gf_vect_mad_sse)
-       FUNC_SAVE
-       sub     len, 16
-       jl      .return_fail
-
-       xor     pos, pos
-       movdqa  xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-       sal     vec_i, 5                ;Multiply by 32
-       movdqu  xgft_lo, [vec_i+mul_array]      ;Load array Cx{00}, Cx{01}, Cx{02}, ...
-       movdqu  xgft_hi, [vec_i+mul_array+16]   ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
-
-       XLDR    xtmpd, [dest+len]       ;backup the last 16 bytes in dest
-
-.loop16:
-       XLDR    xd, [dest+pos]          ;Get next dest vector
-.loop16_overlap:
-       XLDR    x0, [src+pos]           ;Get next source vector
-       movdqa  xtmph, xgft_hi          ;Reload const array registers
-       movdqa  xtmpl, xgft_lo
-       movdqa  xtmpa, x0               ;Keep unshifted copy of src
-       psraw   x0, 4                   ;Shift to put high nibble into bits 4-0
-       pand    x0, xmask0f             ;Mask high src nibble in bits 4-0
-       pand    xtmpa, xmask0f          ;Mask low src nibble in bits 4-0
-       pshufb  xtmph, x0               ;Lookup mul table of high nibble
-       pshufb  xtmpl, xtmpa            ;Lookup mul table of low nibble
-       pxor    xtmph, xtmpl            ;GF add high and low partials
-
-       pxor    xd, xtmph
-       XSTR    [dest+pos], xd          ;Store result
-
-       add     pos, 16                 ;Loop on 16 bytes at a time
-       cmp     pos, len
-       jle     .loop16
-
-       lea     tmp, [len + 16]
-       cmp     pos, tmp
-       je      .return_pass
-
-       ;; Tail len
-       mov     pos, len        ;Overlapped offset length-16
-       movdqa  xd, xtmpd       ;Restore xd
-       jmp     .loop16_overlap ;Do one more overlap pass
-
-.return_pass:
-       mov     return, 0
-       FUNC_RESTORE
-       ret
-
-.return_fail:
-       mov     return, 1
-       FUNC_RESTORE
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-
-mask0f: ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-
-;;;       func            core, ver, snum
-slversion gf_vect_mad_sse, 00,  01,  0200

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_vect_mul_avx.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_vect_mul_avx.asm.s
deleted file mode 100644 (file)
index c9438b1..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_vect_mul_avx.asm.s
+++ /dev/null
@@ -1,164 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_vect_mul_avx(len, mul_array, src, dest)
-;;;
-
-%include "reg_sizes.asm"
-
-%ifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
- %define tmp   r11
- %define return rax
- %define func(x) x:
- %define FUNC_SAVE
- %define FUNC_RESTORE
-
-%elifidn __OUTPUT_FORMAT__, win64
- %define arg0  rcx
- %define arg1  rdx
- %define arg2  r8
- %define arg3  r9
- %define return rax
- %define stack_size  5*16 + 8  ; must be an odd multiple of 8
- %define func(x) proc_frame x
- %macro FUNC_SAVE 0
-       alloc_stack     stack_size
-       save_xmm128     xmm6, 0*16
-       save_xmm128     xmm7, 1*16
-       save_xmm128     xmm13, 2*16
-       save_xmm128     xmm14, 3*16
-       save_xmm128     xmm15, 4*16
-       end_prolog
- %endmacro
-
- %macro FUNC_RESTORE 0
-       vmovdqa xmm6, [rsp + 0*16]
-       vmovdqa xmm7, [rsp + 1*16]
-       vmovdqa xmm13, [rsp + 2*16]
-       vmovdqa xmm14, [rsp + 3*16]
-       vmovdqa xmm15, [rsp + 4*16]
-       add     rsp, stack_size
- %endmacro
-
-%endif
-
-
-%define len   arg0
-%define mul_array arg1
-%define        src   arg2
-%define dest  arg3
-%define pos   return
-
-
-;;; Use Non-temporal load/stor
-%ifdef NO_NT_LDST
- %define XLDR vmovdqa
- %define XSTR vmovdqa
-%else
- %define XLDR vmovntdqa
- %define XSTR vmovntdq
-%endif
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f  xmm15
-%define xgft_lo  xmm14
-%define xgft_hi  xmm13
-
-%define x0     xmm0
-%define xtmp1a xmm1
-%define xtmp1b xmm2
-%define xtmp1c xmm3
-%define x1     xmm4
-%define xtmp2a xmm5
-%define xtmp2b xmm6
-%define xtmp2c xmm7
-
-align 16
-global gf_vect_mul_avx:function
-func(gf_vect_mul_avx)
-       FUNC_SAVE
-       mov     pos, 0
-       vmovdqa xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-       vmovdqu xgft_lo, [mul_array]    ;Load array Cx{00}, Cx{01}, Cx{02}, ...
-       vmovdqu xgft_hi, [mul_array+16] ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
-
-loop32:
-       XLDR    x0, [src+pos]           ;Get next source vector
-       XLDR    x1, [src+pos+16]        ;Get next source vector + 16B ahead
-       add     pos, 32                 ;Loop on 16 bytes at a time
-       cmp     pos, len
-       vpand   xtmp1a, x0, xmask0f     ;Mask low src nibble in bits 4-0
-       vpand   xtmp2a, x1, xmask0f
-       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
-       vpsraw  x1, x1, 4
-       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
-       vpand   x1, x1, xmask0f
-       vpshufb xtmp1b, xgft_hi, x0     ;Lookup mul table of high nibble
-       vpshufb xtmp1c, xgft_lo, xtmp1a ;Lookup mul table of low nibble
-       vpshufb xtmp2b, xgft_hi, x1     ;Lookup mul table of high nibble
-       vpshufb xtmp2c, xgft_lo, xtmp2a ;Lookup mul table of low nibble
-       vpxor   xtmp1b, xtmp1b, xtmp1c  ;GF add high and low partials
-       vpxor   xtmp2b, xtmp2b, xtmp2c
-       XSTR    [dest+pos-32], xtmp1b   ;Store result
-       XSTR    [dest+pos-16], xtmp2b   ;Store +16B result
-       jl      loop32
-
-
-return_pass:
-       FUNC_RESTORE
-       sub     pos, len
-       ret
-
-return_fail:
-       FUNC_RESTORE
-       mov     return, 1
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-
-mask0f:
-ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-
-;;;       func             core, ver, snum
-slversion gf_vect_mul_avx, 01,   03,  0036

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_vect_mul_sse.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_vect_mul_sse.asm.s
deleted file mode 100644 (file)
index 2a14cc9..0000000
--- a/src/erasure-code/isa/isa-l/erasure_code/gf_vect_mul_sse.asm.s
+++ /dev/null
@@ -1,170 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;
-;;; gf_vect_mul_sse(len, mul_array, src, dest)
-;;;
-
-%include "reg_sizes.asm"
-
-%ifidn __OUTPUT_FORMAT__, elf64
- %define arg0  rdi
- %define arg1  rsi
- %define arg2  rdx
- %define arg3  rcx
- %define arg4  r8
- %define arg5  r9
- %define tmp   r11
- %define return rax
- %define func(x) x:
- %define FUNC_SAVE
- %define FUNC_RESTORE
-
-%elifidn __OUTPUT_FORMAT__, win64
- %define arg0  rcx
- %define arg1  rdx
- %define arg2  r8
- %define arg3  r9
- %define return rax
- %define stack_size  5*16 + 8  ; must be an odd multiple of 8
- %define func(x) proc_frame x
- %macro FUNC_SAVE 0
-       alloc_stack     stack_size
-       save_xmm128     xmm6, 0*16
-       save_xmm128     xmm7, 1*16
-       save_xmm128     xmm13, 2*16
-       save_xmm128     xmm14, 3*16
-       save_xmm128     xmm15, 4*16
-       end_prolog
- %endmacro
-
- %macro FUNC_RESTORE 0
-       movdqa  xmm6, [rsp + 0*16]
-       movdqa  xmm7, [rsp + 1*16]
-       movdqa  xmm13, [rsp + 2*16]
-       movdqa  xmm14, [rsp + 3*16]
-       movdqa  xmm15, [rsp + 4*16]
-       add     rsp, stack_size
- %endmacro
-
-%endif
-
-
-%define len    arg0
-%define mul_array arg1
-%define        src    arg2
-%define dest   arg3
-%define pos    return
-
-
-;;; Use Non-temporal load/stor
-%ifdef NO_NT_LDST
- %define XLDR movdqa
- %define XSTR movdqa
-%else
- %define XLDR movntdqa
- %define XSTR movntdq
-%endif
-
-default rel
-
-[bits 64]
-section .text
-
-%define xmask0f  xmm15
-%define xgft_lo  xmm14
-%define xgft_hi  xmm13
-
-%define x0     xmm0
-%define xtmp1a xmm1
-%define xtmp1b xmm2
-%define xtmp1c xmm3
-%define x1     xmm4
-%define xtmp2a xmm5
-%define xtmp2b xmm6
-%define xtmp2c xmm7
-
-
-align 16
-global gf_vect_mul_sse:function
-func(gf_vect_mul_sse)
-       FUNC_SAVE
-       mov     pos, 0
-       movdqa  xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
-       movdqu  xgft_lo, [mul_array]    ;Load array Cx{00}, Cx{01}, Cx{02}, ...
-       movdqu  xgft_hi, [mul_array+16] ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
-
-loop32:
-       XLDR    x0, [src+pos]           ;Get next source vector
-       XLDR    x1, [src+pos+16]        ;Get next source vector + 16B ahead
-       movdqa  xtmp1b, xgft_hi         ;Reload const array registers
-       movdqa  xtmp1c, xgft_lo
-       movdqa  xtmp2b, xgft_hi
-       movdqa  xtmp2c, xgft_lo
-       movdqa  xtmp1a, x0              ;Keep unshifted copy of src
-       movdqa  xtmp2a, x1
-       psraw   x0, 4                   ;Shift to put high nibble into bits 4-0
-       psraw   x1, 4
-       pand    xtmp1a, xmask0f         ;Mask low src nibble in bits 4-0
-       pand    xtmp2a, xmask0f
-       pand    x0, xmask0f             ;Mask high src nibble in bits 4-0
-       pand    x1, xmask0f
-       pshufb  xtmp1b, x0              ;Lookup mul table of high nibble
-       pshufb  xtmp1c, xtmp1a          ;Lookup mul table of low nibble
-       pshufb  xtmp2b, x1
-       pshufb  xtmp2c, xtmp2a
-       pxor    xtmp1b, xtmp1c          ;GF add high and low partials
-       pxor    xtmp2b, xtmp2c
-       XSTR    [dest+pos], xtmp1b      ;Store result
-       XSTR    [dest+pos+16], xtmp2b   ;Store +16B result
-       add     pos, 32                 ;Loop on 32 bytes at at time
-       cmp     pos, len
-       jl      loop32
-
-
-return_pass:
-       sub     pos, len
-       FUNC_RESTORE
-       ret
-
-return_fail:
-       mov     return, 1
-       FUNC_RESTORE
-       ret
-
-endproc_frame
-
-section .data
-
-align 16
-mask0f:
-ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
-
-;;;       func        core, ver, snum
-slversion gf_vect_mul_sse, 00,   03,  0034

diff --git a/src/erasure-code/isa/isa-l/include/erasure_code.h b/src/erasure-code/isa/isa-l/include/erasure_code.h
deleted file mode 100644 (file)
index 53e480f..0000000
--- a/src/erasure-code/isa/isa-l/include/erasure_code.h
+++ /dev/null
@@ -1,933 +0,0 @@
-/**********************************************************************
-  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-
-  Redistribution and use in source and binary forms, with or without
-  modification, are permitted provided that the following conditions
-  are met:
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-    * Redistributions in binary form must reproduce the above copyright
-      notice, this list of conditions and the following disclaimer in
-      the documentation and/or other materials provided with the
-      distribution.
-    * Neither the name of Intel Corporation nor the names of its
-      contributors may be used to endorse or promote products derived
-      from this software without specific prior written permission.
-
-  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-**********************************************************************/
-
-
-#ifndef _ERASURE_CODE_H_
-#define _ERASURE_CODE_H_
-
-/**
- *  @file erasure_code.h
- *  @brief Interface to functions supporting erasure code encode and decode.
- *
- *  This file defines the interface to optimized functions used in erasure
- *  codes.  Encode and decode of erasures in GF(2^8) are made by calculating the
- *  dot product of the symbols (bytes in GF(2^8)) across a set of buffers and a
- *  set of coefficients.  Values for the coefficients are determined by the type
- *  of erasure code.  Using a general dot product means that any sequence of
- *  coefficients may be used including erasure codes based on random
- *  coefficients.
- *  Multiple versions of dot product are supplied to calculate 1-6 output
- *  vectors in one pass.
- *  Base GF multiply and divide functions can be sped up by defining
- *  GF_LARGE_TABLES at the expense of memory size.
- *
- */
-
-#include "gf_vect_mul.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @brief Initialize tables for fast Erasure Code encode and decode.
- *
- * Generates the expanded tables needed for fast encode or decode for erasure
- * codes on blocks of data.  32bytes is generated for each input coefficient.
- *
- * @param k      The number of vector sources or rows in the generator matrix
- *               for coding.
- * @param rows   The number of output vectors to concurrently encode/decode.
- * @param a      Pointer to sets of arrays of input coefficients used to encode
- *               or decode data.
- * @param gftbls Pointer to start of space for concatenated output tables
- *               generated from input coefficients.  Must be of size 32*k*rows.
- * @returns none
- */
-
-void ec_init_tables(int k, int rows, unsigned char* a, unsigned char* gftbls);
-
-/**
- * @brief Generate or decode erasure codes on blocks of data, runs appropriate version.
- *
- * Given a list of source data blocks, generate one or multiple blocks of
- * encoded data as specified by a matrix of GF(2^8) coefficients. When given a
- * suitable set of coefficients, this function will perform the fast generation
- * or decoding of Reed-Solomon type erasure codes.
- *
- * This function determines what instruction sets are enabled and
- * selects the appropriate version at runtime.
- *
- * @param len    Length of each block of data (vector) of source or dest data.
- * @param k      The number of vector sources or rows in the generator matrix
- *              for coding.
- * @param rows   The number of output vectors to concurrently encode/decode.
- * @param gftbls Pointer to array of input tables generated from coding
- *              coefficients in ec_init_tables(). Must be of size 32*k*rows
- * @param data   Array of pointers to source input buffers.
- * @param coding Array of pointers to coded output buffers.
- * @returns none
- */
-
-void ec_encode_data(int len, int k, int rows, unsigned char *gftbls, unsigned char **data,
-                   unsigned char **coding);
-
-/**
- * @brief Generate or decode erasure codes on blocks of data.
- *
- * Arch specific version of ec_encode_data() with same parameters.
- * @requires SSE4.1
- */
-void ec_encode_data_sse(int len, int k, int rows, unsigned char *gftbls, unsigned char **data,
-                       unsigned char **coding);
-
-/**
- * @brief Generate or decode erasure codes on blocks of data.
- *
- * Arch specific version of ec_encode_data() with same parameters.
- * @requires AVX
- */
-void ec_encode_data_avx(int len, int k, int rows, unsigned char *gftbls, unsigned char **data,
-                       unsigned char **coding);
-
-/**
- * @brief Generate or decode erasure codes on blocks of data.
- *
- * Arch specific version of ec_encode_data() with same parameters.
- * @requires AVX2
- */
-void ec_encode_data_avx2(int len, int k, int rows, unsigned char *gftbls, unsigned char **data,
-                        unsigned char **coding);
-
-/**
- * @brief Generate or decode erasure codes on blocks of data, runs baseline version.
- *
- * Baseline version of ec_encode_data() with same parameters.
- */
-void ec_encode_data_base(int len, int srcs, int dests, unsigned char *v, unsigned char **src,
-                        unsigned char **dest);
-
-/**
- * @brief Generate update for encode or decode of erasure codes from single source, runs appropriate version.
- *
- * Given one source data block, update one or multiple blocks of encoded data as
- * specified by a matrix of GF(2^8) coefficients. When given a suitable set of
- * coefficients, this function will perform the fast generation or decoding of
- * Reed-Solomon type erasure codes from one input source at a time.
- *
- * This function determines what instruction sets are enabled and selects the
- * appropriate version at runtime.
- *
- * @param len    Length of each block of data (vector) of source or dest data.
- * @param k      The number of vector sources or rows in the generator matrix
- *              for coding.
- * @param rows   The number of output vectors to concurrently encode/decode.
- * @param vec_i  The vector index corresponding to the single input source.
- * @param g_tbls Pointer to array of input tables generated from coding
- *              coefficients in ec_init_tables(). Must be of size 32*k*rows
- * @param data   Pointer to single input source used to update output parity.
- * @param coding Array of pointers to coded output buffers.
- * @returns none
- */
-void ec_encode_data_update(int len, int k, int rows, int vec_i, unsigned char *g_tbls,
-                          unsigned char *data, unsigned char **coding);
-
-/**
- * @brief Generate update for encode or decode of erasure codes from single source.
- *
- * Arch specific version of ec_encode_data_update() with same parameters.
- * @requires SSE4.1
- */
-
-void ec_encode_data_update_sse(int len, int k, int rows, int vec_i, unsigned char *g_tbls,
-                              unsigned char *data, unsigned char **coding);
-
-/**
- * @brief Generate update for encode or decode of erasure codes from single source.
- *
- * Arch specific version of ec_encode_data_update() with same parameters.
- * @requires AVX
- */
-
-void ec_encode_data_update_avx(int len, int k, int rows, int vec_i, unsigned char *g_tbls,
-                              unsigned char *data, unsigned char **coding);
-
-/**
- * @brief Generate update for encode or decode of erasure codes from single source.
- *
- * Arch specific version of ec_encode_data_update() with same parameters.
- * @requires AVX2
- */
-
-void ec_encode_data_update_avx2(int len, int k, int rows, int vec_i, unsigned char *g_tbls,
-                               unsigned char *data, unsigned char **coding);
-
-/**
- * @brief Generate update for encode or decode of erasure codes from single source.
- *
- * Baseline version of ec_encode_data_update().
- */
-
-void ec_encode_data_update_base(int len, int k, int rows, int vec_i, unsigned char *v,
-                               unsigned char *data, unsigned char **dest);
-
-
-/**
- * @brief GF(2^8) vector dot product.
- *
- * Does a GF(2^8) dot product across each byte of the input array and a constant
- * set of coefficients to produce each byte of the output. Can be used for
- * erasure coding encode and decode. Function requires pre-calculation of a
- * 32*vlen byte constant array based on the input coefficients.
- * @requires SSE4.1
- *
- * @param len    Length of each vector in bytes. Must be >= 16.
- * @param vlen   Number of vector sources.
- * @param gftbls Pointer to 32*vlen byte array of pre-calculated constants based
- *               on the array of input coefficients.
- * @param src    Array of pointers to source inputs.
- * @param dest   Pointer to destination data array.
- * @returns none
- */
-
-void gf_vect_dot_prod_sse(int len, int vlen, unsigned char *gftbls,
-                       unsigned char **src, unsigned char *dest);
-
-/**
- * @brief GF(2^8) vector dot product.
- *
- * Does a GF(2^8) dot product across each byte of the input array and a constant
- * set of coefficients to produce each byte of the output. Can be used for
- * erasure coding encode and decode. Function requires pre-calculation of a
- * 32*vlen byte constant array based on the input coefficients.
- * @requires AVX
- *
- * @param len    Length of each vector in bytes. Must be >= 16.
- * @param vlen   Number of vector sources.
- * @param gftbls Pointer to 32*vlen byte array of pre-calculated constants based
- *               on the array of input coefficients.
- * @param src    Array of pointers to source inputs.
- * @param dest   Pointer to destination data array.
- * @returns none
- */
-
-void gf_vect_dot_prod_avx(int len, int vlen, unsigned char *gftbls,
-                       unsigned char **src, unsigned char *dest);
-
-/**
- * @brief GF(2^8) vector dot product.
- *
- * Does a GF(2^8) dot product across each byte of the input array and a constant
- * set of coefficients to produce each byte of the output. Can be used for
- * erasure coding encode and decode. Function requires pre-calculation of a
- * 32*vlen byte constant array based on the input coefficients.
- * @requires AVX2
- *
- * @param len    Length of each vector in bytes. Must be >= 32.
- * @param vlen   Number of vector sources.
- * @param gftbls Pointer to 32*vlen byte array of pre-calculated constants based
- *               on the array of input coefficients.
- * @param src    Array of pointers to source inputs.
- * @param dest   Pointer to destination data array.
- * @returns none
- */
-
-void gf_vect_dot_prod_avx2(int len, int vlen, unsigned char *gftbls,
-                       unsigned char **src, unsigned char *dest);
-
-/**
- * @brief GF(2^8) vector dot product with two outputs.
- *
- * Vector dot product optimized to calculate two ouputs at a time. Does two
- * GF(2^8) dot products across each byte of the input array and two constant
- * sets of coefficients to produce each byte of the outputs. Can be used for
- * erasure coding encode and decode. Function requires pre-calculation of a
- * 2*32*vlen byte constant array based on the two sets of input coefficients.
- * @requires SSE4.1
- *
- * @param len    Length of each vector in bytes. Must be >= 16.
- * @param vlen   Number of vector sources.
- * @param gftbls Pointer to 2*32*vlen byte array of pre-calculated constants
- *               based on the array of input coefficients.
- * @param src    Array of pointers to source inputs.
- * @param dest   Array of pointers to destination data buffers.
- * @returns none
- */
-
-void gf_2vect_dot_prod_sse(int len, int vlen, unsigned char *gftbls,
-                       unsigned char **src, unsigned char **dest);
-
-/**
- * @brief GF(2^8) vector dot product with two outputs.
- *
- * Vector dot product optimized to calculate two ouputs at a time. Does two
- * GF(2^8) dot products across each byte of the input array and two constant
- * sets of coefficients to produce each byte of the outputs. Can be used for
- * erasure coding encode and decode. Function requires pre-calculation of a
- * 2*32*vlen byte constant array based on the two sets of input coefficients.
- * @requires AVX
- *
- * @param len    Length of each vector in bytes. Must be >= 16.
- * @param vlen   Number of vector sources.
- * @param gftbls Pointer to 2*32*vlen byte array of pre-calculated constants
- *               based on the array of input coefficients.
- * @param src    Array of pointers to source inputs.
- * @param dest   Array of pointers to destination data buffers.
- * @returns none
- */
-
-void gf_2vect_dot_prod_avx(int len, int vlen, unsigned char *gftbls,
-                       unsigned char **src, unsigned char **dest);
-
-/**
- * @brief GF(2^8) vector dot product with two outputs.
- *
- * Vector dot product optimized to calculate two ouputs at a time. Does two
- * GF(2^8) dot products across each byte of the input array and two constant
- * sets of coefficients to produce each byte of the outputs. Can be used for
- * erasure coding encode and decode. Function requires pre-calculation of a
- * 2*32*vlen byte constant array based on the two sets of input coefficients.
- * @requires AVX2
- *
- * @param len    Length of each vector in bytes. Must be >= 32.
- * @param vlen   Number of vector sources.
- * @param gftbls Pointer to 2*32*vlen byte array of pre-calculated constants
- *               based on the array of input coefficients.
- * @param src    Array of pointers to source inputs.
- * @param dest   Array of pointers to destination data buffers.
- * @returns none
- */
-
-void gf_2vect_dot_prod_avx2(int len, int vlen, unsigned char *gftbls,
-                       unsigned char **src, unsigned char **dest);
-
-/**
- * @brief GF(2^8) vector dot product with three outputs.
- *
- * Vector dot product optimized to calculate three ouputs at a time. Does three
- * GF(2^8) dot products across each byte of the input array and three constant
- * sets of coefficients to produce each byte of the outputs. Can be used for
- * erasure coding encode and decode. Function requires pre-calculation of a
- * 3*32*vlen byte constant array based on the three sets of input coefficients.
- * @requires SSE4.1
- *
- * @param len    Length of each vector in bytes. Must be >= 16.
- * @param vlen   Number of vector sources.
- * @param gftbls Pointer to 3*32*vlen byte array of pre-calculated constants
- *               based on the array of input coefficients.
- * @param src    Array of pointers to source inputs.
- * @param dest   Array of pointers to destination data buffers.
- * @returns none
- */
-
-void gf_3vect_dot_prod_sse(int len, int vlen, unsigned char *gftbls,
-                       unsigned char **src, unsigned char **dest);
-
-/**
- * @brief GF(2^8) vector dot product with three outputs.
- *
- * Vector dot product optimized to calculate three ouputs at a time. Does three
- * GF(2^8) dot products across each byte of the input array and three constant
- * sets of coefficients to produce each byte of the outputs. Can be used for
- * erasure coding encode and decode. Function requires pre-calculation of a
- * 3*32*vlen byte constant array based on the three sets of input coefficients.
- * @requires AVX
- *
- * @param len    Length of each vector in bytes. Must be >= 16.
- * @param vlen   Number of vector sources.
- * @param gftbls Pointer to 3*32*vlen byte array of pre-calculated constants
- *               based on the array of input coefficients.
- * @param src    Array of pointers to source inputs.
- * @param dest   Array of pointers to destination data buffers.
- * @returns none
- */
-
-void gf_3vect_dot_prod_avx(int len, int vlen, unsigned char *gftbls,
-                       unsigned char **src, unsigned char **dest);
-
-/**
- * @brief GF(2^8) vector dot product with three outputs.
- *
- * Vector dot product optimized to calculate three ouputs at a time. Does three
- * GF(2^8) dot products across each byte of the input array and three constant
- * sets of coefficients to produce each byte of the outputs. Can be used for
- * erasure coding encode and decode. Function requires pre-calculation of a
- * 3*32*vlen byte constant array based on the three sets of input coefficients.
- * @requires AVX2
- *
- * @param len    Length of each vector in bytes. Must be >= 32.
- * @param vlen   Number of vector sources.
- * @param gftbls Pointer to 3*32*vlen byte array of pre-calculated constants
- *               based on the array of input coefficients.
- * @param src    Array of pointers to source inputs.
- * @param dest   Array of pointers to destination data buffers.
- * @returns none
- */
-
-void gf_3vect_dot_prod_avx2(int len, int vlen, unsigned char *gftbls,
-                       unsigned char **src, unsigned char **dest);
-
-/**
- * @brief GF(2^8) vector dot product with four outputs.
- *
- * Vector dot product optimized to calculate four ouputs at a time. Does four
- * GF(2^8) dot products across each byte of the input array and four constant
- * sets of coefficients to produce each byte of the outputs. Can be used for
- * erasure coding encode and decode. Function requires pre-calculation of a
- * 4*32*vlen byte constant array based on the four sets of input coefficients.
- * @requires SSE4.1
- *
- * @param len    Length of each vector in bytes. Must be >= 16.
- * @param vlen   Number of vector sources.
- * @param gftbls Pointer to 4*32*vlen byte array of pre-calculated constants
- *               based on the array of input coefficients.
- * @param src    Array of pointers to source inputs.
- * @param dest   Array of pointers to destination data buffers.
- * @returns none
- */
-
-void gf_4vect_dot_prod_sse(int len, int vlen, unsigned char *gftbls,
-                       unsigned char **src, unsigned char **dest);
-
-/**
- * @brief GF(2^8) vector dot product with four outputs.
- *
- * Vector dot product optimized to calculate four ouputs at a time. Does four
- * GF(2^8) dot products across each byte of the input array and four constant
- * sets of coefficients to produce each byte of the outputs. Can be used for
- * erasure coding encode and decode. Function requires pre-calculation of a
- * 4*32*vlen byte constant array based on the four sets of input coefficients.
- * @requires AVX
- *
- * @param len    Length of each vector in bytes. Must be >= 16.
- * @param vlen   Number of vector sources.
- * @param gftbls Pointer to 4*32*vlen byte array of pre-calculated constants
- *               based on the array of input coefficients.
- * @param src    Array of pointers to source inputs.
- * @param dest   Array of pointers to destination data buffers.
- * @returns none
- */
-
-void gf_4vect_dot_prod_avx(int len, int vlen, unsigned char *gftbls,
-                       unsigned char **src, unsigned char **dest);
-
-/**
- * @brief GF(2^8) vector dot product with four outputs.
- *
- * Vector dot product optimized to calculate four ouputs at a time. Does four
- * GF(2^8) dot products across each byte of the input array and four constant
- * sets of coefficients to produce each byte of the outputs. Can be used for
- * erasure coding encode and decode. Function requires pre-calculation of a
- * 4*32*vlen byte constant array based on the four sets of input coefficients.
- * @requires AVX2
- *
- * @param len    Length of each vector in bytes. Must be >= 32.
- * @param vlen   Number of vector sources.
- * @param gftbls Pointer to 4*32*vlen byte array of pre-calculated constants
- *               based on the array of input coefficients.
- * @param src    Array of pointers to source inputs.
- * @param dest   Array of pointers to destination data buffers.
- * @returns none
- */
-
-void gf_4vect_dot_prod_avx2(int len, int vlen, unsigned char *gftbls,
-                       unsigned char **src, unsigned char **dest);
-
-/**
- * @brief GF(2^8) vector dot product with five outputs.
- *
- * Vector dot product optimized to calculate five ouputs at a time. Does five
- * GF(2^8) dot products across each byte of the input array and five constant
- * sets of coefficients to produce each byte of the outputs. Can be used for
- * erasure coding encode and decode. Function requires pre-calculation of a
- * 5*32*vlen byte constant array based on the five sets of input coefficients.
- * @requires SSE4.1
- *
- * @param len    Length of each vector in bytes. Must >= 16.
- * @param vlen   Number of vector sources.
- * @param gftbls Pointer to 5*32*vlen byte array of pre-calculated constants
- *               based on the array of input coefficients.
- * @param src    Array of pointers to source inputs.
- * @param dest   Array of pointers to destination data buffers.
- * @returns none
- */
-
-void gf_5vect_dot_prod_sse(int len, int vlen, unsigned char *gftbls,
-                       unsigned char **src, unsigned char **dest);
-
-/**
- * @brief GF(2^8) vector dot product with five outputs.
- *
- * Vector dot product optimized to calculate five ouputs at a time. Does five
- * GF(2^8) dot products across each byte of the input array and five constant
- * sets of coefficients to produce each byte of the outputs. Can be used for
- * erasure coding encode and decode. Function requires pre-calculation of a
- * 5*32*vlen byte constant array based on the five sets of input coefficients.
- * @requires AVX
- *
- * @param len    Length of each vector in bytes. Must >= 16.
- * @param vlen   Number of vector sources.
- * @param gftbls Pointer to 5*32*vlen byte array of pre-calculated constants
- *               based on the array of input coefficients.
- * @param src    Array of pointers to source inputs.
- * @param dest   Array of pointers to destination data buffers.
- * @returns none
- */
-
-void gf_5vect_dot_prod_avx(int len, int vlen, unsigned char *gftbls,
-                       unsigned char **src, unsigned char **dest);
-
-/**
- * @brief GF(2^8) vector dot product with five outputs.
- *
- * Vector dot product optimized to calculate five ouputs at a time. Does five
- * GF(2^8) dot products across each byte of the input array and five constant
- * sets of coefficients to produce each byte of the outputs. Can be used for
- * erasure coding encode and decode. Function requires pre-calculation of a
- * 5*32*vlen byte constant array based on the five sets of input coefficients.
- * @requires AVX2
- *
- * @param len    Length of each vector in bytes. Must >= 32.
- * @param vlen   Number of vector sources.
- * @param gftbls Pointer to 5*32*vlen byte array of pre-calculated constants
- *               based on the array of input coefficients.
- * @param src    Array of pointers to source inputs.
- * @param dest   Array of pointers to destination data buffers.
- * @returns none
- */
-
-void gf_5vect_dot_prod_avx2(int len, int vlen, unsigned char *gftbls,
-                       unsigned char **src, unsigned char **dest);
-
-/**
- * @brief GF(2^8) vector dot product with six outputs.
- *
- * Vector dot product optimized to calculate six ouputs at a time. Does six
- * GF(2^8) dot products across each byte of the input array and six constant
- * sets of coefficients to produce each byte of the outputs. Can be used for
- * erasure coding encode and decode. Function requires pre-calculation of a
- * 6*32*vlen byte constant array based on the six sets of input coefficients.
- * @requires SSE4.1
- *
- * @param len    Length of each vector in bytes. Must be >= 16.
- * @param vlen   Number of vector sources.
- * @param gftbls Pointer to 6*32*vlen byte array of pre-calculated constants
- *               based on the array of input coefficients.
- * @param src    Array of pointers to source inputs.
- * @param dest   Array of pointers to destination data buffers.
- * @returns none
- */
-
-void gf_6vect_dot_prod_sse(int len, int vlen, unsigned char *gftbls,
-                       unsigned char **src, unsigned char **dest);
-
-/**
- * @brief GF(2^8) vector dot product with six outputs.
- *
- * Vector dot product optimized to calculate six ouputs at a time. Does six
- * GF(2^8) dot products across each byte of the input array and six constant
- * sets of coefficients to produce each byte of the outputs. Can be used for
- * erasure coding encode and decode. Function requires pre-calculation of a
- * 6*32*vlen byte constant array based on the six sets of input coefficients.
- * @requires AVX
- *
- * @param len    Length of each vector in bytes. Must be >= 16.
- * @param vlen   Number of vector sources.
- * @param gftbls Pointer to 6*32*vlen byte array of pre-calculated constants
- *               based on the array of input coefficients.
- * @param src    Array of pointers to source inputs.
- * @param dest   Array of pointers to destination data buffers.
- * @returns none
- */
-
-void gf_6vect_dot_prod_avx(int len, int vlen, unsigned char *gftbls,
-                       unsigned char **src, unsigned char **dest);
-
-/**
- * @brief GF(2^8) vector dot product with six outputs.
- *
- * Vector dot product optimized to calculate six ouputs at a time. Does six
- * GF(2^8) dot products across each byte of the input array and six constant
- * sets of coefficients to produce each byte of the outputs. Can be used for
- * erasure coding encode and decode. Function requires pre-calculation of a
- * 6*32*vlen byte constant array based on the six sets of input coefficients.
- * @requires AVX2
- *
- * @param len    Length of each vector in bytes. Must be >= 32.
- * @param vlen   Number of vector sources.
- * @param gftbls Pointer to 6*32*vlen byte array of pre-calculated constants
- *               based on the array of input coefficients.
- * @param src    Array of pointers to source inputs.
- * @param dest   Array of pointers to destination data buffers.
- * @returns none
- */
-
-void gf_6vect_dot_prod_avx2(int len, int vlen, unsigned char *gftbls,
-                       unsigned char **src, unsigned char **dest);
-
-/**
- * @brief GF(2^8) vector dot product, runs baseline version.
- *
- * Does a GF(2^8) dot product across each byte of the input array and a constant
- * set of coefficients to produce each byte of the output. Can be used for
- * erasure coding encode and decode. Function requires pre-calculation of a
- * 32*vlen byte constant array based on the input coefficients.
- *
- * @param len    Length of each vector in bytes. Must be >= 16.
- * @param vlen   Number of vector sources.
- * @param gftbls Pointer to 32*vlen byte array of pre-calculated constants based
- *               on the array of input coefficients. Only elements 32*CONST*j + 1
- *               of this array are used, where j = (0, 1, 2...) and CONST is the
- *               number of elements in the array of input coefficients. The
- *               elements used correspond to the original input coefficients.
- * @param src    Array of pointers to source inputs.
- * @param dest   Pointer to destination data array.
- * @returns none
- */
-
-void gf_vect_dot_prod_base(int len, int vlen, unsigned char *gftbls,
-                        unsigned char **src, unsigned char *dest);
-
-/**
- * @brief GF(2^8) vector dot product, runs appropriate version.
- *
- * Does a GF(2^8) dot product across each byte of the input array and a constant
- * set of coefficients to produce each byte of the output. Can be used for
- * erasure coding encode and decode. Function requires pre-calculation of a
- * 32*vlen byte constant array based on the input coefficients.
- *
- * This function determines what instruction sets are enabled and
- * selects the appropriate version at runtime.
- *
- * @param len    Length of each vector in bytes. Must be >= 32.
- * @param vlen   Number of vector sources.
- * @param gftbls Pointer to 32*vlen byte array of pre-calculated constants based
- *               on the array of input coefficients.
- * @param src    Array of pointers to source inputs.
- * @param dest   Pointer to destination data array.
- * @returns none
- */
-
-void gf_vect_dot_prod(int len, int vlen, unsigned char *gftbls,
-                        unsigned char **src, unsigned char *dest);
-
-
-/**
- * @brief GF(2^8) vector multiply accumulate, runs appropriate version.
- *
- * Does a GF(2^8) multiply across each byte of input source with expanded
- * constant and add to destination array. Can be used for erasure coding encode
- * and decode update when only one source is available at a time. Function
- * requires pre-calculation of a 32*vec byte constant array based on the input
- * coefficients.
- *
- * This function determines what instruction sets are enabled and selects the
- * appropriate version at runtime.
- *
- * @param len    Length of each vector in bytes. Must be >= 32.
- * @param vec    The number of vector sources or rows in the generator matrix
- *              for coding.
- * @param vec_i  The vector index corresponding to the single input source.
- * @param gftbls Pointer to array of input tables generated from coding
- *              coefficients in ec_init_tables(). Must be of size 32*vec.
- * @param src    Array of pointers to source inputs.
- * @param dest   Pointer to destination data array.
- * @returns none
- */
-
-void gf_vect_mad(int len, int vec, int vec_i, unsigned char *gftbls, unsigned char *src,
-                unsigned char *dest);
-
-/**
- * @brief GF(2^8) vector multiply accumulate, arch specific version.
- *
- * Arch specific version of gf_vect_mad() with same parameters.
- * @requires SSE4.1
- */
-
-void gf_vect_mad_sse(int len, int vec, int vec_i, unsigned char *gftbls, unsigned char *src,
-                    unsigned char *dest);
-/**
- * @brief GF(2^8) vector multiply accumulate, arch specific version.
- *
- * Arch specific version of gf_vect_mad() with same parameters.
- * @requires AVX
- */
-
-void gf_vect_mad_avx(int len, int vec, int vec_i, unsigned char *gftbls, unsigned char *src,
-                    unsigned char *dest);
-
-/**
- * @brief GF(2^8) vector multiply accumulate, arch specific version.
- *
- * Arch specific version of gf_vect_mad() with same parameters.
- * @requires AVX2
- */
-
-void gf_vect_mad_avx2(int len, int vec, int vec_i, unsigned char *gftbls, unsigned char *src,
-                     unsigned char *dest);
-
-/**
- * @brief GF(2^8) vector multiply accumulate, baseline version.
- *
- * Baseline version of gf_vect_mad() with same parameters.
- */
-
-void gf_vect_mad_base(int len, int vec, int vec_i, unsigned char *v, unsigned char *src,
-                     unsigned char *dest);
-
-/**
- * @brief GF(2^8) vector multiply with 2 accumulate.  SSE version.
- *
- * Does a GF(2^8) multiply across each byte of input source with expanded
- * constants and add to destination arrays. Can be used for erasure coding
- * encode and decode update when only one source is available at a
- * time. Function requires pre-calculation of a 32*vec byte constant array based
- * on the input coefficients.
- * @requires SSE4.1
- *
- * @param len    Length of each vector in bytes. Must be >= 32.
- * @param vec    The number of vector sources or rows in the generator matrix
- *              for coding.
- * @param vec_i  The vector index corresponding to the single input source.
- * @param gftbls Pointer to array of input tables generated from coding
- *              coefficients in ec_init_tables(). Must be of size 32*vec.
- * @param src    Pointer to source input array.
- * @param dest   Array of pointers to destination input/outputs.
- * @returns none
- */
-
-void gf_2vect_mad_sse(int len, int vec, int vec_i, unsigned char *gftbls, unsigned char *src,
-                     unsigned char **dest);
-
-/**
- * @brief GF(2^8) vector multiply with 2 accumulate. AVX version of gf_2vect_mad_sse().
- * @requires AVX
- */
-void gf_2vect_mad_avx(int len, int vec, int vec_i, unsigned char *gftbls, unsigned char *src,
-                     unsigned char **dest);
-/**
- * @brief GF(2^8) vector multiply with 2 accumulate. AVX2 version of gf_2vect_mad_sse().
- * @requires AVX2
- */
-void gf_2vect_mad_avx2(int len, int vec, int vec_i, unsigned char *gftbls, unsigned char *src,
-                      unsigned char **dest);
-
-/**
- * @brief GF(2^8) vector multiply with 3 accumulate. SSE version.
- *
- * Does a GF(2^8) multiply across each byte of input source with expanded
- * constants and add to destination arrays. Can be used for erasure coding
- * encode and decode update when only one source is available at a
- * time. Function requires pre-calculation of a 32*vec byte constant array based
- * on the input coefficients.
- * @requires SSE4.1
- *
- * @param len    Length of each vector in bytes. Must be >= 32.
- * @param vec    The number of vector sources or rows in the generator matrix
- *              for coding.
- * @param vec_i  The vector index corresponding to the single input source.
- * @param gftbls Pointer to array of input tables generated from coding
- *              coefficients in ec_init_tables(). Must be of size 32*vec.
- * @param src    Pointer to source input array.
- * @param dest   Array of pointers to destination input/outputs.
- * @returns none
- */
-
-void gf_3vect_mad_sse(int len, int vec, int vec_i, unsigned char *gftbls, unsigned char *src,
-                     unsigned char **dest);
-
-/**
- * @brief GF(2^8) vector multiply with 3 accumulate. AVX version of gf_3vect_mad_sse().
- * @requires AVX
- */
-void gf_3vect_mad_avx(int len, int vec, int vec_i, unsigned char *gftbls, unsigned char *src,
-                     unsigned char **dest);
-
-/**
- * @brief GF(2^8) vector multiply with 3 accumulate. AVX2 version of gf_3vect_mad_sse().
- * @requires AVX2
- */
-void gf_3vect_mad_avx2(int len, int vec, int vec_i, unsigned char *gftbls, unsigned char *src,
-                      unsigned char **dest);
-
-/**
- * @brief GF(2^8) vector multiply with 4 accumulate. SSE version.
- *
- * Does a GF(2^8) multiply across each byte of input source with expanded
- * constants and add to destination arrays. Can be used for erasure coding
- * encode and decode update when only one source is available at a
- * time. Function requires pre-calculation of a 32*vec byte constant array based
- * on the input coefficients.
- * @requires SSE4.1
- *
- * @param len    Length of each vector in bytes. Must be >= 32.
- * @param vec    The number of vector sources or rows in the generator matrix
- *              for coding.
- * @param vec_i  The vector index corresponding to the single input source.
- * @param gftbls Pointer to array of input tables generated from coding
- *              coefficients in ec_init_tables(). Must be of size 32*vec.
- * @param src    Pointer to source input array.
- * @param dest   Array of pointers to destination input/outputs.
- * @returns none
- */
-
-void gf_4vect_mad_sse(int len, int vec, int vec_i, unsigned char *gftbls, unsigned char *src,
-                     unsigned char **dest);
-
-/**
- * @brief GF(2^8) vector multiply with 4 accumulate. AVX version of gf_4vect_mad_sse().
- * @requires AVX
- */
-void gf_4vect_mad_avx(int len, int vec, int vec_i, unsigned char *gftbls, unsigned char *src,
-                     unsigned char **dest);
-/**
- * @brief GF(2^8) vector multiply with 4 accumulate. AVX2 version of gf_4vect_mad_sse().
- * @requires AVX2
- */
-void gf_4vect_mad_avx2(int len, int vec, int vec_i, unsigned char *gftbls, unsigned char *src,
-                      unsigned char **dest);
-
-/**
- * @brief GF(2^8) vector multiply with 5 accumulate. SSE version.
- * @requires SSE4.1
- */
-void gf_5vect_mad_sse(int len, int vec, int vec_i, unsigned char *gftbls, unsigned char *src,
-                     unsigned char **dest);
-
-/**
- * @brief GF(2^8) vector multiply with 5 accumulate. AVX version.
- * @requires AVX
- */
-void gf_5vect_mad_avx(int len, int vec, int vec_i, unsigned char *gftbls, unsigned char *src,
-                     unsigned char **dest);
-/**
- * @brief GF(2^8) vector multiply with 5 accumulate. AVX2 version.
- * @requires AVX2
- */
-void gf_5vect_mad_avx2(int len, int vec, int vec_i, unsigned char *gftbls, unsigned char *src,
-                      unsigned char **dest);
-
-/**
- * @brief GF(2^8) vector multiply with 6 accumulate. SSE version.
- * @requires SSE4.1
- */
-void gf_6vect_mad_sse(int len, int vec, int vec_i, unsigned char *gftbls, unsigned char *src,
-                     unsigned char **dest);
-/**
- * @brief GF(2^8) vector multiply with 6 accumulate. AVX version.
- * @requires AVX
- */
-void gf_6vect_mad_avx(int len, int vec, int vec_i, unsigned char *gftbls, unsigned char *src,
-                     unsigned char **dest);
-
-/**
- * @brief GF(2^8) vector multiply with 6 accumulate. AVX2 version.
- * @requires AVX2
- */
-void gf_6vect_mad_avx2(int len, int vec, int vec_i, unsigned char *gftbls, unsigned char *src,
-                      unsigned char **dest);
-
-
-/**********************************************************************
- * The remaining are lib support functions used in GF(2^8) operations.
- */
-
-/**
- * @brief Single element GF(2^8) multiply.
- *
- * @param a  Multiplicand a
- * @param b  Multiplicand b
- * @returns  Product of a and b in GF(2^8)
- */
-
-unsigned char gf_mul(unsigned char a, unsigned char b);
-
-/**
- * @brief Single element GF(2^8) inverse.
- *
- * @param a  Input element
- * @returns  Field element b such that a x b = {1}
- */
-
-unsigned char gf_inv(unsigned char a);
-
-/**
- * @brief Generate a matrix of coefficients to be used for encoding.
- *
- * Vandermonde matrix example of encoding coefficients where high portion of
- * matrix is identity matrix I and lower portion is constructed as 2^{i*(j-k+1)}
- * i:{0,k-1} j:{k,m-1}. Commonly used method for choosing coefficients in
- * erasure encoding but does not guarantee invertable for every sub matrix.  For
- * large k it is possible to find cases where the decode matrix chosen from
- * sources and parity not in erasure are not invertable. Users may want to
- * adjust for k > 5.
- *
- * @param a  [mxk] array to hold coefficients
- * @param m  number of rows in matrix corresponding to srcs + parity.
- * @param k  number of columns in matrix corresponding to srcs.
- * @returns  none
- */
-
-void gf_gen_rs_matrix(unsigned char *a, int m, int k);
-
-/**
- * @brief Generate a Cauchy matrix of coefficients to be used for encoding.
- *
- * Cauchy matrix example of encoding coefficients where high portion of matrix
- * is identity matrix I and lower portion is constructed as 1/(i + j) | i != j,
- * i:{0,k-1} j:{k,m-1}.  Any sub-matrix of a Cauchy matrix should be invertable.
- *
- * @param a  [mxk] array to hold coefficients
- * @param m  number of rows in matrix corresponding to srcs + parity.
- * @param k  number of columns in matrix corresponding to srcs.
- * @returns  none
- */
-
-void gf_gen_cauchy1_matrix(unsigned char *a, int m, int k);
-
-/**
- * @brief Invert a matrix in GF(2^8)
- *
- * @param in  input matrix
- * @param out output matrix such that [in] x [out] = [I] - identity matrix
- * @param n   size of matrix [nxn]
- * @returns 0 successful, other fail on singular input matrix
- */
-
-int gf_invert_matrix(unsigned char *in, unsigned char *out, const int n);
-
-
-/*************************************************************/
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif //_ERASURE_CODE_H_

diff --git a/src/erasure-code/isa/isa-l/include/gf_vect_mul.h b/src/erasure-code/isa/isa-l/include/gf_vect_mul.h
deleted file mode 100644 (file)
index bf4fd01..0000000
--- a/src/erasure-code/isa/isa-l/include/gf_vect_mul.h
+++ /dev/null
@@ -1,148 +0,0 @@
-/**********************************************************************
-  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-
-  Redistribution and use in source and binary forms, with or without
-  modification, are permitted provided that the following conditions
-  are met:
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-    * Redistributions in binary form must reproduce the above copyright
-      notice, this list of conditions and the following disclaimer in
-      the documentation and/or other materials provided with the
-      distribution.
-    * Neither the name of Intel Corporation nor the names of its
-      contributors may be used to endorse or promote products derived
-      from this software without specific prior written permission.
-
-  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-**********************************************************************/
-
-
-#ifndef _GF_VECT_MUL_H
-#define _GF_VECT_MUL_H
-
-/**
- *  @file gf_vect_mul.h
- *  @brief Interface to functions for vector (block) multiplication in GF(2^8).
- *
- *  This file defines the interface to routines used in fast RAID rebuild and
- *  erasure codes.
- */
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
- /**
- * @brief GF(2^8) vector multiply by constant.
- *
- * Does a GF(2^8) vector multiply b = Ca where a and b are arrays and C
- * is a single field element in GF(2^8). Can be used for RAID6 rebuild
- * and partial write functions. Function requires pre-calculation of a
- * 32-element constant array based on constant C. gftbl(C) = {C{00},
- * C{01}, C{02}, ... , C{0f} }, {C{00}, C{10}, C{20}, ... , C{f0} }. Len
- * and src must be aligned to 32B.
- * @requires SSE4.1
- *
- * @param len   Length of vector in bytes. Must be aligned to 32B.
- * @param gftbl Pointer to 32-byte array of pre-calculated constants based on C.
- * @param src   Pointer to src data array. Must be aligned to 32B.
- * @param dest  Pointer to destination data array. Must be aligned to 32B.
- * @returns 0 pass, other fail
- */
-
-int gf_vect_mul_sse(int len, unsigned char *gftbl, void *src, void *dest);
-
-
- /**
- * @brief GF(2^8) vector multiply by constant.
- *
- * Does a GF(2^8) vector multiply b = Ca where a and b are arrays and C
- * is a single field element in GF(2^8). Can be used for RAID6 rebuild
- * and partial write functions. Function requires pre-calculation of a
- * 32-element constant array based on constant C. gftbl(C) = {C{00},
- * C{01}, C{02}, ... , C{0f} }, {C{00}, C{10}, C{20}, ... , C{f0} }. Len
- * and src must be aligned to 32B.
- * @requires AVX
- *
- * @param len   Length of vector in bytes. Must be aligned to 32B.
- * @param gftbl Pointer to 32-byte array of pre-calculated constants based on C.
- * @param src   Pointer to src data array. Must be aligned to 32B.
- * @param dest  Pointer to destination data array. Must be aligned to 32B.
- * @returns 0 pass, other fail
- */
-
-int gf_vect_mul_avx(int len, unsigned char *gftbl, void *src, void *dest);
-
-
-/**
- * @brief GF(2^8) vector multiply by constant, runs appropriate version.
- *
- * Does a GF(2^8) vector multiply b = Ca where a and b are arrays and C
- * is a single field element in GF(2^8). Can be used for RAID6 rebuild
- * and partial write functions. Function requires pre-calculation of a
- * 32-element constant array based on constant C. gftbl(C) = {C{00},
- * C{01}, C{02}, ... , C{0f} }, {C{00}, C{10}, C{20}, ... , C{f0} }.
- * Len and src must be aligned to 32B.
- *
- * This function determines what instruction sets are enabled
- * and selects the appropriate version at runtime.
- *
- * @param len   Length of vector in bytes. Must be aligned to 32B.
- * @param gftbl Pointer to 32-byte array of pre-calculated constants based on C.
- * @param src   Pointer to src data array. Must be aligned to 32B.
- * @param dest  Pointer to destination data array. Must be aligned to 32B.
- * @returns 0 pass, other fail
- */
-
-int gf_vect_mul(int len, unsigned char *gftbl, void *src, void *dest);
-
-
-/**
- * @brief Initialize 32-byte constant array for GF(2^8) vector multiply
- *
- * Calculates array {C{00}, C{01}, C{02}, ... , C{0f} }, {C{00}, C{10},
- * C{20}, ... , C{f0} } as required by other fast vector multiply
- * functions.
- * @param c     Constant input.
- * @param gftbl Table output.
- */
-
-void gf_vect_mul_init(unsigned char c, unsigned char* gftbl);
-
-
-/**
- * @brief GF(2^8) vector multiply by constant, runs baseline version.
- *
- * Does a GF(2^8) vector multiply b = Ca where a and b are arrays and C
- * is a single field element in GF(2^8). Can be used for RAID6 rebuild
- * and partial write functions. Function requires pre-calculation of a
- * 32-element constant array based on constant C. gftbl(C) = {C{00},
- * C{01}, C{02}, ... , C{0f} }, {C{00}, C{10}, C{20}, ... , C{f0} }. Len
- * and src must be aligned to 32B.
- *
- * @param len   Length of vector in bytes. Must be aligned to 32B.
- * @param a    Pointer to 32-byte array of pre-calculated constants based on C.
- *             only use 2nd element is used.
- * @param src   Pointer to src data array. Must be aligned to 32B.
- * @param dest  Pointer to destination data array. Must be aligned to 32B.
- */
-
-void gf_vect_mul_base(int len, unsigned char *a, unsigned char *src,
-                       unsigned char *dest);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif //_GF_VECT_MUL_H

diff --git a/src/erasure-code/isa/isa-l/include/reg_sizes.asm b/src/erasure-code/isa/isa-l/include/reg_sizes.asm
deleted file mode 100644 (file)
index 650c1fe..0000000
--- a/src/erasure-code/isa/isa-l/include/reg_sizes.asm
+++ /dev/null
@@ -1,123 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-%ifndef _REG_SIZES_ASM_
-%define _REG_SIZES_ASM_
-
-%define EFLAGS_HAS_CPUID        (1<<21)
-%define FLAG_CPUID1_ECX_CLMUL   (1<<1)
-%define FLAG_CPUID1_EDX_SSE2    (1<<26)
-%define FLAG_CPUID1_ECX_SSE3   (1)
-%define FLAG_CPUID1_ECX_SSE4_1  (1<<19)
-%define FLAG_CPUID1_ECX_SSE4_2  (1<<20)
-%define FLAG_CPUID1_ECX_POPCNT  (1<<23)
-%define FLAG_CPUID1_ECX_AESNI   (1<<25)
-%define FLAG_CPUID1_ECX_OSXSAVE (1<<27)
-%define FLAG_CPUID1_ECX_AVX     (1<<28)
-%define FLAG_CPUID1_EBX_AVX2    (1<<5)
-%define FLAG_XGETBV_EAX_XMM_YMM        0x6
-
-%define FLAG_CPUID1_EAX_AVOTON 0x000406d0
-
-; define d and w variants for registers
-
-%define        raxd    eax
-%define raxw   ax
-%define raxb   al
-
-%define        rbxd    ebx
-%define rbxw   bx
-%define rbxb   bl
-
-%define        rcxd    ecx
-%define rcxw   cx
-%define rcxb   cl
-
-%define        rdxd    edx
-%define rdxw   dx
-%define rdxb   dl
-
-%define        rsid    esi
-%define rsiw   si
-%define rsib   sil
-
-%define        rdid    edi
-%define rdiw   di
-%define rdib   dil
-
-%define        rbpd    ebp
-%define rbpw   bp
-%define rbpb   bpl
-
-%define ymm0x xmm0
-%define ymm1x xmm1
-%define ymm2x xmm2
-%define ymm3x xmm3
-%define ymm4x xmm4
-%define ymm5x xmm5
-%define ymm6x xmm6
-%define ymm7x xmm7
-%define ymm8x xmm8
-%define ymm9x xmm9
-%define ymm10x xmm10
-%define ymm11x xmm11
-%define ymm12x xmm12
-%define ymm13x xmm13
-%define ymm14x xmm14
-%define ymm15x xmm15
-
-%define DWORD(reg) reg %+ d
-%define WORD(reg)  reg %+ w
-%define BYTE(reg)  reg %+ b
-
-%define XWORD(reg) reg %+ x
-
-%ifidn __OUTPUT_FORMAT__,elf32
-section .note.GNU-stack noalloc noexec nowrite progbits
-section .text
-%endif
-%ifidn __OUTPUT_FORMAT__,elf64
-section .note.GNU-stack noalloc noexec nowrite progbits
-section .text
-%endif
-%ifidn __OUTPUT_FORMAT__, macho64
-%define elf64 macho64
-%endif
-
-%macro slversion 4
-       section .text
-       global %1_slver_%2%3%4
-       global %1_slver
-       %1_slver:
-       %1_slver_%2%3%4:
-               dw 0x%4
-               db 0x%3, 0x%2
-%endmacro
-
-%endif ; ifndef _REG_SIZES_ASM_

diff --git a/src/erasure-code/isa/isa-l/include/types.h b/src/erasure-code/isa/isa-l/include/types.h
deleted file mode 100644 (file)
index f5775ef..0000000
--- a/src/erasure-code/isa/isa-l/include/types.h
+++ /dev/null
@@ -1,88 +0,0 @@
-/**********************************************************************
-  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
-
-  Redistribution and use in source and binary forms, with or without
-  modification, are permitted provided that the following conditions
-  are met:
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-    * Redistributions in binary form must reproduce the above copyright
-      notice, this list of conditions and the following disclaimer in
-      the documentation and/or other materials provided with the
-      distribution.
-    * Neither the name of Intel Corporation nor the names of its
-      contributors may be used to endorse or promote products derived
-      from this software without specific prior written permission.
-
-  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-**********************************************************************/
-
-
-/**
- *  @file  types.h
- *  @brief Defines standard width types.
- *
- */
-
-#ifndef __TYPES_H
-#define __TYPES_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#ifdef __WIN32__
-#ifdef __MINGW32__
-# include <_mingw.h>
-#endif
-typedef unsigned __int64 UINT64;
-typedef          __int64  INT64;
-typedef unsigned __int32 UINT32;
-typedef unsigned __int16 UINT16;
-typedef unsigned char    UINT8;
-#else
-typedef unsigned long int  UINT64;
-typedef          long int   INT64;
-typedef unsigned int       UINT32;
-typedef unsigned short int UINT16;
-typedef unsigned char      UINT8;
-#endif
-
-
-#if defined  __unix__ || defined __APPLE__
-# define DECLARE_ALIGNED(decl, alignval) decl __attribute__((aligned(alignval)))
-# define __forceinline static inline
-# define aligned_free(x) free(x)
-#else
-# ifdef __MINGW32__
-#   define DECLARE_ALIGNED(decl, alignval) decl __attribute__((aligned(alignval)))
-#   define posix_memalign(p, algn, len) (NULL == (*((char**)(p)) = (void*) _aligned_malloc(len, algn)))
-#   define aligned_free(x) _aligned_free(x)
-# else
-#   define DECLARE_ALIGNED(decl, alignval) __declspec(align(alignval)) decl
-#   define posix_memalign(p, algn, len) (NULL == (*((char**)(p)) = (void*) _aligned_malloc(len, algn)))
-#   define aligned_free(x) _aligned_free(x)
-# endif
-#endif
-
-#ifdef DEBUG
-# define DEBUG_PRINT(x) printf x
-#else
-# define DEBUG_PRINT(x) do {} while (0)
-#endif
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif  //__TYPES_H