EC: add plugin for Intel ISA-L library

diff --git a/src/erasure-code/Makefile.am b/src/erasure-code/Makefile.am
index ea13bcf3a088d692511576c6059e8cf3fd6a4dd9..3edc7310d6b98caee0efddf46a518d2245fb691f 100644 (file)
--- a/src/erasure-code/Makefile.am
+++ b/src/erasure-code/Makefile.am
@@ -1,9 +1,14 @@
 ## erasure code plugins
+
 erasure_codelibdir = $(pkglibdir)/erasure-code
 erasure_codelib_LTLIBRARIES =  
 
 include erasure-code/jerasure/Makefile.am
 
+if WITH_GOOD_YASM_ELF64
+include erasure-code/isa/Makefile.am
+endif # WITH_GOOD_YASM_ELF64
+
 liberasure_code_la_SOURCES = \
        erasure-code/ErasureCodePlugin.cc
 if LINUX

diff --git a/src/erasure-code/isa/ErasureCodeIsa.cc b/src/erasure-code/isa/ErasureCodeIsa.cc
new file mode 100644 (file)
index 0000000..368c978
--- /dev/null
+++ b/src/erasure-code/isa/ErasureCodeIsa.cc
@@ -0,0 +1,553 @@
+/*
+ * Ceph - scalable distributed file system
+ *
+ * Copyright (C) 2014 CERN (Switzerland)
+ *
+ * Author: Andreas-Joachim Peters <Andreas.Joachim.Peters@cern.ch>
+ *
+ *  This library is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU Lesser General Public
+ *  License as published by the Free Software Foundation; either
+ *  version 2.1 of the License, or (at your option) any later version.
+ *
+ */
+
+// -----------------------------------------------------------------------------
+#include <algorithm>
+#include <dlfcn.h>
+#include <errno.h>
+// -----------------------------------------------------------------------------
+#include "common/debug.h"
+#include "ErasureCodeIsa.h"
+#include "xor_op.h"
+#include "crush/CrushWrapper.h"
+#include "osd/osd_types.h"
+// -----------------------------------------------------------------------------
+extern "C" {
+#include "isa-l/include/erasure_code.h"
+}
+// -----------------------------------------------------------------------------
+#define dout_subsys ceph_subsys_osd
+#undef dout_prefix
+#define dout_prefix _prefix(_dout)
+// -----------------------------------------------------------------------------
+
+// -----------------------------------------------------------------------------
+
+static ostream&
+_prefix(std::ostream* _dout)
+{
+  return *_dout << "ErasureCodeIsa: ";
+}
+// -----------------------------------------------------------------------------
+
+int
+ErasureCodeIsa::create_ruleset(const string &name,
+                               CrushWrapper &crush,
+                               ostream *ss) const
+{
+  return crush.add_simple_ruleset(name, ruleset_root, ruleset_failure_domain,
+                                  "indep", pg_pool_t::TYPE_ERASURE, ss);
+}
+
+// -----------------------------------------------------------------------------
+
+void
+ErasureCodeIsa::init(const map<string, string> &parameters)
+{
+  dout(10) << "technique=" << technique << dendl;
+  map<string, string>::const_iterator parameter;
+  parameter = parameters.find("ruleset-root");
+  if (parameter != parameters.end())
+    ruleset_root = parameter->second;
+  parameter = parameters.find("ruleset-failure-domain");
+  if (parameter != parameters.end())
+    ruleset_failure_domain = parameter->second;
+  parse(parameters);
+  prepare();
+}
+
+// -----------------------------------------------------------------------------
+
+unsigned int
+ErasureCodeIsa::get_chunk_size(unsigned int object_size) const
+{
+  unsigned alignment = get_alignment();
+  unsigned tail = object_size % alignment;
+  unsigned padded_length = object_size + (tail ? (alignment - tail) : 0);
+  assert(padded_length % k == 0);
+  return padded_length / k;
+}
+
+// -----------------------------------------------------------------------------
+
+int
+ErasureCodeIsa::minimum_to_decode(const set<int> &want_to_read,
+                                  const set<int> &available_chunks,
+                                  set<int> *minimum)
+{
+  if (includes(available_chunks.begin(), available_chunks.end(),
+               want_to_read.begin(), want_to_read.end())) {
+    *minimum = want_to_read;
+  } else {
+    if (available_chunks.size() < (unsigned) k)
+      return -EIO;
+    set<int>::iterator i;
+    unsigned j;
+    for (i = available_chunks.begin(), j = 0; j < (unsigned) k; ++i, j++)
+      minimum->insert(*i);
+  }
+  return 0;
+}
+
+// -----------------------------------------------------------------------------
+
+int
+ErasureCodeIsa::minimum_to_decode_with_cost(const set<int> &want_to_read,
+                                            const map<int, int> &available,
+                                            set<int> *minimum)
+{
+  set <int> available_chunks;
+  for (map<int, int>::const_iterator i = available.begin();
+       i != available.end();
+       ++i)
+    available_chunks.insert(i->first);
+  return minimum_to_decode(want_to_read, available_chunks, minimum);
+}
+
+// -----------------------------------------------------------------------------
+
+int
+ErasureCodeIsa::encode(const set<int> &want_to_encode,
+                       const bufferlist &in,
+                       map<int, bufferlist> *encoded)
+{
+  unsigned blocksize = get_chunk_size(in.length());
+  unsigned padded_length = blocksize * k;
+  dout(10) << "encode adjusted buffer length from " << in.length()
+    << " to " << padded_length << dendl;
+  assert(padded_length % k == 0);
+  bufferlist out(in);
+
+  if (padded_length - in.length() > 0) {
+    bufferptr pad(padded_length - in.length());
+    pad.zero();
+    out.push_back(pad);
+  }
+  unsigned coding_length = blocksize * m;
+  bufferptr coding(buffer::create_page_aligned(coding_length));
+  out.push_back(coding);
+  out.rebuild_page_aligned();
+  char *chunks[k + m];
+
+  for (int i = 0; i < k + m; i++) {
+    bufferlist &chunk = (*encoded)[i];
+    chunk.substr_of(out, i * blocksize, blocksize);
+    chunks[i] = chunk.c_str();
+  }
+
+  isa_encode(&chunks[0], &chunks[k], blocksize);
+
+  for (int i = 0; i < k + m; i++) {
+    if (want_to_encode.count(i) == 0)
+      encoded->erase(i);
+  }
+
+  return 0;
+}
+
+// -----------------------------------------------------------------------------
+
+int
+ErasureCodeIsa::decode(const set<int> &want_to_read,
+                       const map<int, bufferlist> &chunks,
+                       map<int, bufferlist> *decoded)
+{
+  vector<int> have;
+  have.reserve(chunks.size());
+
+  for (map<int, bufferlist>::const_iterator i = chunks.begin();
+       i != chunks.end();
+       ++i) {
+    have.push_back(i->first);
+  }
+
+  if (includes(
+               have.begin(),
+               have.end(),
+               want_to_read.begin(),
+               want_to_read.end())) {
+    for (set<int>::iterator i = want_to_read.begin();
+         i != want_to_read.end();
+         ++i) {
+      (*decoded)[*i] = chunks.find(*i)->second;
+    }
+    return 0;
+  }
+  unsigned blocksize = (*chunks.begin()).second.length();
+  int erasures[k + m + 1];
+  int erasures_count = 0;
+  char *data[k];
+  char *coding[m];
+
+  for (int i = 0; i < k + m; i++) {
+    if (chunks.find(i) == chunks.end()) {
+      erasures[erasures_count] = i;
+      erasures_count++;
+      bufferptr ptr(buffer::create_page_aligned(blocksize));
+      (*decoded)[i].push_front(ptr);
+    } else {
+      (*decoded)[i] = chunks.find(i)->second;
+      (*decoded)[i].rebuild_page_aligned();
+    }
+    if (i < k) {
+      data[i] = (*decoded)[i].c_str();
+    } else {
+      coding[i - k] = (*decoded)[i].c_str();
+    }
+  }
+  erasures[erasures_count] = -1;
+
+  if (erasures_count > 0) {
+    int retc = isa_decode(erasures, data, coding, blocksize);
+    return retc;
+  } else
+    return 0;
+}
+
+// -----------------------------------------------------------------------------
+
+int
+ErasureCodeIsa::to_int(const std::string &name,
+                       const map<std::string, std::string> &parameters,
+                       int default_value)
+{
+  if (parameters.find(name) == parameters.end() ||
+      parameters.find(name)->second.size() == 0) {
+    dout(10) << name << " defaults to " << default_value << dendl;
+    return default_value;
+  }
+  const std::string value = parameters.find(name)->second;
+  std::string p = value;
+  std::string err;
+  int r = strict_strtol(p.c_str(), 10, &err);
+  if (!err.empty()) {
+    derr << "could not convert " << name << "=" << value
+      << " to int because " << err
+      << ", set to default " << default_value << dendl;
+    return default_value;
+  }
+  dout(10) << name << " set to " << r << dendl;
+  return r;
+}
+
+// -----------------------------------------------------------------------------
+
+void
+ErasureCodeIsaDefault::isa_encode(char **data,
+                                  char **coding,
+                                  int blocksize)
+{
+  ec_encode_data(blocksize, k, m, g_encode_tbls,
+                 (unsigned char**) data, (unsigned char**) coding);
+}
+
+// -----------------------------------------------------------------------------
+
+bool
+ErasureCodeIsaDefault::erasure_contains(int *erasures, int i)
+{
+  for (int l = 0; erasures[l] != -1; l++) {
+    if (erasures[l] == i)
+      return true;
+  }
+  return false;
+}
+
+// -----------------------------------------------------------------------------
+
+bool
+ErasureCodeIsaDefault::get_decoding_table_from_cache(std::string &signature, unsigned char* &table)
+{
+  // --------------------------------------------------------------------------
+  // LRU decoding matrix cache
+  // --------------------------------------------------------------------------
+
+  dout(12) << "[ get table    ] = " << signature << dendl;
+
+  // we try to fetch a decoding table from an LRU cache
+  bool found = false;
+
+  Mutex::Locker lock(g_decode_tbls_guard);
+  if (g_decode_tbls_map.count(signature)) {
+    dout(12) << "[ cached table ] = " << signature << dendl;
+    // copy the table out of the cache
+    memcpy(table, g_decode_tbls_map[signature].second.c_str(), k * (m + k)*32);
+    // find item in LRU queue and push back
+    dout(12) << "[ cache size   ] = " << g_decode_tbls_lru.size() << dendl;
+    g_decode_tbls_lru.splice(g_decode_tbls_map[signature].first, g_decode_tbls_lru, g_decode_tbls_lru.end());
+    found = true;
+  }
+
+  return found;
+}
+
+// -----------------------------------------------------------------------------
+
+void
+ErasureCodeIsaDefault::put_decoding_table_to_cache(std::string &signature, unsigned char* &table)
+{
+  // --------------------------------------------------------------------------
+  // LRU decoding matrix cache
+  // --------------------------------------------------------------------------
+
+  dout(12) << "[ put table    ] = " << signature << dendl;
+
+  // we store a new table to the cache
+
+  bufferptr cachetable;
+
+  Mutex::Locker lock(g_decode_tbls_guard);
+
+  // evt. shrink the LRU queue/map
+  if (g_decode_tbls_lru.size() >= g_decode_tbls_lru_length) {
+    dout(12) << "[ shrink lru   ] = " << signature << dendl;
+    // reuse old buffer
+    cachetable = g_decode_tbls_map[g_decode_tbls_lru.front()].second;
+    // remove from map
+    g_decode_tbls_map.erase(g_decode_tbls_lru.front());
+    // remove from lru
+    g_decode_tbls_lru.pop_front();
+    // add the new to the map
+    g_decode_tbls_map[signature] = std::make_pair(g_decode_tbls_lru.begin(), cachetable);
+    // add to the end of lru
+    g_decode_tbls_lru.push_back(signature);
+  } else {
+    dout(12) << "[ store table  ] = " << signature << dendl;
+    // allocate a new buffer
+    cachetable = buffer::create(k * (m + k)*32);
+    g_decode_tbls_lru.push_back(signature);
+    g_decode_tbls_map[signature] = std::make_pair(g_decode_tbls_lru.begin(), cachetable);
+    dout(12) << "[ cache size   ] = " << g_decode_tbls_lru.size() << dendl;
+  }
+
+  // copy-in the new table
+  memcpy(cachetable.c_str(), table, k * (m + k)*32);
+}
+
+// -----------------------------------------------------------------------------
+
+int
+ErasureCodeIsaDefault::isa_decode(int *erasures,
+                                  char **data,
+                                  char **coding,
+                                  int blocksize)
+{
+  int nerrs = 0;
+  int i, j, r, s;
+
+  // count the errors
+  for (int l = 0; erasures[l] != -1; l++) {
+    nerrs++;
+  }
+
+  unsigned char *recover_source[k];
+  unsigned char *recover_target[m];
+
+  memset(recover_source, 0, sizeof (recover_source));
+  memset(recover_target, 0, sizeof (recover_target));
+
+  // ---------------------------------------------
+  // Assign source and target buffers
+  // ---------------------------------------------
+  for (i = 0, s = 0, r = 0; ((r < k) || (s < nerrs)) && (i < (k + m)); i++) {
+    if (!erasure_contains(erasures, i)) {
+      if (r < k) {
+        if (i < k) {
+          recover_source[r] = (unsigned char*) data[i];
+        } else {
+          recover_source[r] = (unsigned char*) coding[i - k];
+        }
+        r++;
+      }
+    } else {
+      if (s < m) {
+        if (i < k) {
+          recover_target[s] = (unsigned char*) data[i];
+        } else {
+          recover_target[s] = (unsigned char*) coding[i - k];
+        }
+        s++;
+      }
+    }
+  }
+
+  if ((matrixtype == kVandermonde) &&
+      (nerrs == 1) &&
+      (erasures[0] < (k + 1))) {
+    // use xor decoding if a data chunk is missing or the first coding chunk
+    dout(20) << "isa_decode: reconstruct using region xor [" << erasures[0] << "]" << dendl;
+    assert(1 == s);
+    assert(k == r);
+    region_xor(recover_source, recover_target[0], k, blocksize);
+    return 0;
+  }
+
+  unsigned char b[k * (m + k)];
+  unsigned char c[k * (m + k)];
+  unsigned char d[k * (m + k)];
+  unsigned char g_decode_tbls[k * (m + k)*32];
+  unsigned char *p_tbls = g_decode_tbls;
+
+  int decode_index[k];
+
+  if (nerrs > m)
+    return -1;
+
+  std::string erasure_signature; // describes a matrix configuration for caching
+
+  // ---------------------------------------------
+  // Construct b by removing error rows
+  // ---------------------------------------------
+
+  for (i = 0, r = 0; i < k; i++, r++) {
+    char id[128];
+    while (erasure_contains(erasures, r))
+      r++;
+
+    decode_index[i] = r;
+
+    snprintf(id, sizeof (id), "+%d", r);
+    erasure_signature += id;
+  }
+
+  for (int p = 0; p < nerrs; p++) {
+    char id[128];
+    snprintf(id, sizeof (id), "-%d", erasures[p]);
+    erasure_signature += id;
+  }
+
+  // ---------------------------------------------
+  // Try to get an already computed matrix
+  // ---------------------------------------------
+  if (!get_decoding_table_from_cache(erasure_signature, p_tbls)) {
+    for (i = 0; i < k; i++) {
+      r = decode_index[i];
+      for (j = 0; j < k; j++)
+        b[k * i + j] = a[k * r + j];
+    }
+    // ---------------------------------------------
+    // Compute inverted matrix
+    // ---------------------------------------------
+
+    // --------------------------------------------------------
+    // Remark: this may fail for certain Vandermonde matrices !
+    // There is an advanced way trying to use different
+    // source chunks to get an invertible matrix, however
+    // there are also (k,m) combinations which cannot be
+    // inverted when m chunks are lost and this optimizations
+    // does not help. Therefor we keep the code simpler.
+    // --------------------------------------------------------
+    if (gf_invert_matrix(b, d, k) < 0) {
+      dout(0) << "isa_decode: bad matrix" << dendl;
+      return -1;
+    }
+
+    for (int p = 0; p < nerrs; p++) {
+      if (erasures[p] < k) {
+        // decoding matrix elements for data chunks
+        for (j = 0; j < k; j++) {
+          c[k * p + j] = d[k * erasures[p] + j];
+        }
+      } else {
+        int s = 0;
+        // decoding matrix element for coding chunks
+        for (i = 0; i < k; i++) {
+          s = 0;
+          for (j = 0; j < k; j++)
+            s ^= gf_mul(d[j * k + i],
+                        a[k * erasures[p] + j]);
+
+          c[k * p + i] = s;
+        }
+      }
+    }
+
+    // ---------------------------------------------
+    // Initialize Decoding Table
+    // ---------------------------------------------
+    ec_init_tables(k, nerrs, c, g_decode_tbls);
+    put_decoding_table_to_cache(erasure_signature, p_tbls);
+  }
+  // Recover data sources
+  ec_encode_data(blocksize,
+                 k, nerrs, g_decode_tbls, recover_source, recover_target);
+
+
+  return 0;
+}
+
+// -----------------------------------------------------------------------------
+
+unsigned
+ErasureCodeIsaDefault::get_alignment() const
+{
+  return k * EC_ISA_VECTOR_OP_WORDSIZE;
+}
+
+// -----------------------------------------------------------------------------
+
+void
+ErasureCodeIsaDefault::parse(const map<std::string,
+                             std::string> &parameters)
+{
+  k = to_int("k", parameters, DEFAULT_K);
+  m = to_int("m", parameters, DEFAULT_M);
+
+  if (matrixtype == kVandermonde) {
+    // these are verified safe values evaluted using the benchmarktool and 10*(combinatoric for maximum loss) random full erasures
+    if (k > 32) {
+      derr << "Vandermonde: m=" << m
+        << " should be less/equal than 32 : revert to k=32" << dendl;
+      k = 32;
+    }
+
+    if (m > 4) {
+      derr << "Vandermonde: m=" << m
+        << " should be less than 5 to guarantee an MDS codec: revert to m=4" << dendl;
+      m = 4;
+    }
+    switch (m) {
+    case 4:
+      if (k > 21) {
+        derr << "Vandermonde: K=" << k
+          << " should be less than 22 to guarantee an MDS codec with m=4: revert to k=21" << dendl;
+        k = 21;
+      }
+      break;
+    default:
+      ;
+    }
+  }
+}
+
+// -----------------------------------------------------------------------------
+
+void
+ErasureCodeIsaDefault::prepare()
+{
+  a = (unsigned char*) malloc(k * (m + k));
+  g_encode_tbls = (unsigned char*) malloc(k * (m + k)*32);
+
+  unsigned memory_lru_cache = k * (m + k) * 32 * g_decode_tbls_lru_length;
+  dout(10) << "[ cache memory ] = " << memory_lru_cache << " bytes" << dendl;
+  // build encoding table which needs to be computed once for a configure (k,m)
+  assert((matrixtype == kVandermonde) || (matrixtype == kCauchy));
+  if (matrixtype == kVandermonde)
+    gf_gen_rs_matrix(a, k + m, k);
+  if (matrixtype == kCauchy)
+    gf_gen_cauchy1_matrix(a, k + m, k);
+
+  ec_init_tables(k, m, &a[k * k], g_encode_tbls);
+}
+// -----------------------------------------------------------------------------

diff --git a/src/erasure-code/isa/ErasureCodeIsa.h b/src/erasure-code/isa/ErasureCodeIsa.h
new file mode 100644 (file)
index 0000000..1d55308
--- /dev/null
+++ b/src/erasure-code/isa/ErasureCodeIsa.h
@@ -0,0 +1,184 @@
+/*
+ * Ceph - scalable distributed file system
+ *
+ * Copyright (C) 2014 CERN (Switzerland)
+ *
+ * Author: Andreas-Joachim Peters <Andreas.Joachim.Peters@cern.ch>
+ *
+ *  This library is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU Lesser General Public
+ *  License as published by the Free Software Foundation; either
+ *  version 2.1 of the License, or (at your option) any later version.
+ *
+ */
+
+/**
+ * @file   ErasureCodeIsa.cc
+ *
+ * @brief  Erasure Code CODEC using the INTEL ISA-L library.
+ *
+ * The INTEL ISA-L library supports two pre-defined encoding matrices (cauchy = default, reed_sol_van = default)
+ * The default CODEC implementation using these two matrices is implemented in class ErasureCodeIsaDefault.
+ * ISA-L allows to use custom matrices which might be added later as implementations deriving from the base class ErasoreCodeIsa.
+ */
+
+#ifndef CEPH_ERASURE_CODE_ISA_L_H
+#define CEPH_ERASURE_CODE_ISA_L_H
+
+// -----------------------------------------------------------------------------
+#include "common/Mutex.h"
+#include "erasure-code/ErasureCodeInterface.h"
+// -----------------------------------------------------------------------------
+#include <list>
+// -----------------------------------------------------------------------------
+
+class ErasureCodeIsa : public ErasureCodeInterface {
+public:
+  enum eMatrix {kVandermonde=0, kCauchy=1};
+
+  int k;
+  int m;
+  int w;
+  const char *technique;
+  string ruleset_root;
+  string ruleset_failure_domain;
+
+  ErasureCodeIsa(const char *_technique) :
+  technique(_technique),
+  ruleset_root("default"),
+  ruleset_failure_domain("host")
+  {
+  }
+
+  virtual
+  ~ErasureCodeIsa()
+  {
+  }
+
+  virtual int create_ruleset(const string &name,
+                             CrushWrapper &crush,
+                             ostream *ss) const;
+
+  virtual unsigned int
+  get_chunk_count() const
+  {
+    return k + m;
+  }
+
+  virtual unsigned int
+  get_data_chunk_count() const
+  {
+    return k;
+  }
+
+  virtual unsigned int get_chunk_size(unsigned int object_size) const;
+
+  virtual int minimum_to_decode(const set<int> &want_to_read,
+                                const set<int> &available_chunks,
+                                set<int> *minimum);
+
+  virtual int minimum_to_decode_with_cost(const set<int> &want_to_read,
+                                          const map<int, int> &available,
+                                          set<int> *minimum);
+
+  virtual int encode(const set<int> &want_to_encode,
+                     const bufferlist &in,
+                     map<int, bufferlist> *encoded);
+
+  virtual int decode(const set<int> &want_to_read,
+                     const map<int, bufferlist> &chunks,
+                     map<int, bufferlist> *decoded);
+
+  void init(const map<std::string, std::string> &parameters);
+
+  virtual void isa_encode(char **data,
+                          char **coding,
+                          int blocksize) = 0;
+
+
+  virtual int isa_decode(int *erasures,
+                         char **data,
+                         char **coding,
+                         int blocksize) = 0;
+
+  virtual unsigned get_alignment() const = 0;
+
+  virtual void parse(const map<std::string, std::string> &parameters) = 0;
+
+  virtual void prepare() = 0;
+
+  static int to_int(const std::string &name,
+                    const map<std::string, std::string> &parameters,
+                    int default_value);
+};
+
+// -----------------------------------------------------------------------------
+
+class ErasureCodeIsaDefault : public ErasureCodeIsa {
+
+  int matrixtype;
+
+public:
+
+  static const int DEFAULT_K = 7;
+  static const int DEFAULT_M = 3;
+  static const int g_decode_tbls_lru_length=2516; // caches up to 12+4 completely
+
+  unsigned char* a; // encoding coefficient
+  unsigned char* g_encode_tbls; // encoding table
+
+
+  // we create a cache for decoding tables
+  Mutex g_decode_tbls_guard;
+
+  int get_tbls_lru_size()
+  {
+    Mutex::Locker lock(g_decode_tbls_guard);
+    return g_decode_tbls_lru.size();
+  }
+
+  // we implement an LRU cache for coding matrix - the cache size is sufficient up to (10,4) decodings
+  typedef typename std::pair<std::list<std::string>::iterator, bufferptr> lru_entry_t;
+
+  std::map<std::string, lru_entry_t> g_decode_tbls_map;
+  std::list<std::string> g_decode_tbls_lru;
+
+  ErasureCodeIsaDefault(int matrix = kVandermonde) : ErasureCodeIsa("default"),
+    a(0), g_encode_tbls(0), g_decode_tbls_guard("isa-lru-cache")
+  {
+    matrixtype = matrix;
+  }
+
+  virtual
+  ~ErasureCodeIsaDefault()
+  {
+    if (a) {
+      free(a);
+    }
+    if (g_encode_tbls) {
+      free(g_encode_tbls);
+    }
+  }
+
+  virtual void isa_encode(char **data,
+                          char **coding,
+                          int blocksize);
+
+  virtual bool erasure_contains(int *erasures, int i);
+
+  virtual int isa_decode(int *erasures,
+                         char **data,
+                         char **coding,
+                         int blocksize);
+
+  virtual unsigned get_alignment() const;
+
+  virtual void parse(const map<std::string, std::string> &parameters);
+
+  virtual void prepare();
+
+  bool get_decoding_table_from_cache(std::string &signature, unsigned char* &table);
+  void put_decoding_table_to_cache(std::string&, unsigned char*&);
+};
+
+#endif

diff --git a/src/erasure-code/isa/ErasureCodePluginIsa.cc b/src/erasure-code/isa/ErasureCodePluginIsa.cc
new file mode 100644 (file)
index 0000000..f0d32fb
--- /dev/null
+++ b/src/erasure-code/isa/ErasureCodePluginIsa.cc
@@ -0,0 +1,81 @@
+/*
+ * Ceph - scalable distributed file system
+ *
+ * Copyright (C) 2014 CERN (Switzerland)
+ *
+ * Author: Andreas-Joachim Peters <Andreas.Joachim.Peters@cern.ch>
+ *
+ *  This library is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU Lesser General Public
+ *  License as published by the Free Software Foundation; either
+ *  version 2.1 of the License, or (at your option) any later version.
+ *
+ */
+
+
+/**
+ * @file   ErasureCodePluginIsa.cc
+ *
+ * @brief  Erasure Code Plug-in class wrapping the INTEL ISA-L library
+ *
+ * The factory plug-in class allows to call individual encoding techniques.
+ * The INTEL ISA-L library provides two pre-defined encoding matrices (cauchy, reed_sol_van = default).
+ */
+
+// -----------------------------------------------------------------------------
+#include "common/debug.h"
+#include "erasure-code/ErasureCodePlugin.h"
+#include "ErasureCodeIsa.h"
+// -----------------------------------------------------------------------------
+
+
+// -----------------------------------------------------------------------------
+#define dout_subsys ceph_subsys_osd
+#undef dout_prefix
+#define dout_prefix _prefix(_dout)
+// -----------------------------------------------------------------------------
+
+static ostream& _prefix(std::ostream* _dout)
+{
+  return *_dout << "ErasureCodePluginIsa: ";
+}
+
+// -----------------------------------------------------------------------------
+
+class ErasureCodePluginIsa : public ErasureCodePlugin {
+public:
+
+  virtual int factory(const map<std::string, std::string> &parameters,
+                      ErasureCodeInterfaceRef *erasure_code)
+  {
+    ErasureCodeIsa *interface;
+    std::string t = "reed_sol_van";
+    if (parameters.find("technique") != parameters.end())
+      t = parameters.find("technique")->second;
+    if ((t == "reed_sol_van")) {
+      interface = new ErasureCodeIsaDefault(ErasureCodeIsaDefault::kVandermonde);
+    } else {
+      if ((t == "cauchy")) {
+        interface = new ErasureCodeIsaDefault(ErasureCodeIsaDefault::kCauchy);
+      } else {
+        derr << "technique=" << t << " is not a valid coding technique. "
+          << " Choose one of the following: "
+          << "reed_sol_van,"
+          << "cauchy" << dendl;
+        return -ENOENT;
+      }
+    }
+
+    interface->init(parameters);
+    *erasure_code = ErasureCodeInterfaceRef(interface);
+    return 0;
+  }
+};
+
+// -----------------------------------------------------------------------------
+
+int __erasure_code_init(char *plugin_name)
+{
+  ErasureCodePluginRegistry &instance = ErasureCodePluginRegistry::instance();
+  return instance.add(plugin_name, new ErasureCodePluginIsa());
+}

diff --git a/src/erasure-code/isa/Makefile.am b/src/erasure-code/isa/Makefile.am
new file mode 100644 (file)
index 0000000..05a6829
--- /dev/null
+++ b/src/erasure-code/isa/Makefile.am
@@ -0,0 +1,51 @@
+# ISA
+noinst_HEADERS += \
+       erasure-code/isa/isa-l/erasure_code/ec_base.h
+       erasure-code/isa/isa-l/include/erasure_code.h \
+       erasure-code/isa/isa-l/include/reg_sizes.asm \
+       erasure-code/isa/isa-l/include/erasure_code.h \
+       erasure-code/isa/isa-l/include/gf_vect_mul.h \
+       erasure-code/isa/isa-l/include/types.h
+
+isa_sources = \
+       erasure-code/isa/isa-l/erasure_code/ec_base.c \
+       erasure-code/isa/isa-l/erasure_code/ec_highlevel_func.c \
+       erasure-code/isa/isa-l/erasure_code/ec_multibinary.asm.s \
+       erasure-code/isa/isa-l/erasure_code/gf_2vect_dot_prod_avx2.asm.s \
+       erasure-code/isa/isa-l/erasure_code/gf_2vect_dot_prod_avx.asm.s \
+       erasure-code/isa/isa-l/erasure_code/gf_2vect_dot_prod_sse.asm.s \
+       erasure-code/isa/isa-l/erasure_code/gf_3vect_dot_prod_avx2.asm.s \
+       erasure-code/isa/isa-l/erasure_code/gf_3vect_dot_prod_avx.asm.s \
+       erasure-code/isa/isa-l/erasure_code/gf_3vect_dot_prod_sse.asm.s \
+       erasure-code/isa/isa-l/erasure_code/gf_4vect_dot_prod_avx2.asm.s \
+       erasure-code/isa/isa-l/erasure_code/gf_4vect_dot_prod_avx.asm.s \
+       erasure-code/isa/isa-l/erasure_code/gf_4vect_dot_prod_sse.asm.s \
+       erasure-code/isa/isa-l/erasure_code/gf_5vect_dot_prod_avx2.asm.s \
+       erasure-code/isa/isa-l/erasure_code/gf_5vect_dot_prod_avx.asm.s \
+       erasure-code/isa/isa-l/erasure_code/gf_5vect_dot_prod_sse.asm.s \
+       erasure-code/isa/isa-l/erasure_code/gf_6vect_dot_prod_avx2.asm.s \
+       erasure-code/isa/isa-l/erasure_code/gf_6vect_dot_prod_avx.asm.s \
+       erasure-code/isa/isa-l/erasure_code/gf_6vect_dot_prod_sse.asm.s \
+       erasure-code/isa/isa-l/erasure_code/gf_vect_dot_prod_avx2.asm.s \
+       erasure-code/isa/isa-l/erasure_code/gf_vect_dot_prod_avx.asm.s \
+       erasure-code/isa/isa-l/erasure_code/gf_vect_dot_prod_sse.asm.s \
+       erasure-code/isa/isa-l/erasure_code/gf_vect_mul_avx.asm.s \
+       erasure-code/isa/isa-l/erasure_code/gf_vect_mul_sse.asm.s \
+       erasure-code/isa/ErasureCodeIsa.cc \
+       erasure-code/isa/ErasureCodePluginIsa.cc \
+       erasure-code/isa/xor_op.cc
+
+libec_isa_la_SOURCES = ${isa_sources}
+
+libec_isa_la_CFLAGS = ${AM_CFLAGS} -I $(srcdir)/erasure-code/isa/isa-l/include/
+libec_isa_la_CXXFLAGS = ${AM_CXXFLAGS} -I $(srcdir)/erasure-code/isa/isa-l/include/
+libec_isa_la_CCASFLAGS = ${AM_CCASFLAGS} -I $(abs_srcdir)/erasure-code/isa/isa-l/include/
+
+libec_isa_la_LIBADD = $(LIBCRUSH) $(PTHREAD_LIBS) $(EXTRALIBS)
+libec_isa_la_LDFLAGS = ${AM_LDFLAGS} -version-info 2:10:0
+if LINUX
+libec_isa_la_LDFLAGS += -export-symbols-regex '.*__erasure_code_.*'
+endif
+libec_isa_la_LIBTOOLFLAGS = --tag=CC
+
+erasure_codelib_LTLIBRARIES += libec_isa.la

diff --git a/src/erasure-code/isa/README b/src/erasure-code/isa/README
new file mode 100644 (file)
index 0000000..dbbfa67
--- /dev/null
+++ b/src/erasure-code/isa/README
@@ -0,0 +1,62 @@
+============================================
+INTEL ISA library Erasure Coding plugin
+============================================
+
+Build Requirements
+==================
+Plug-in build compiles the included sources of ISA-L v2.10 and links them into the plugin. ISA-L implementation is portable and probes CPU features during runtime. Note that the names of the assembler source files have been renamed from *.asm to *.asm.s to be compatible with Automake.
+
+Run-time Requirements
+=====================
+None
+
+Plug-in Configuration
+=====================
+
+Used parameters are:
+k : number of data chunks
+m : number of coding chunks
+technique : cauchy, reed_sol_van
+
+The plug-in exports only two encoding technique (cauchy, reed_sol_van) using either a Vandermonde matrix or a Cauchy matrix for coding.
+By default a Vandermonde matrix is used. Be aware that sometimes the generated Vandermonde matrix is not always invertible and not fully MDS.
+Therefore the accepted parameter space has limited to maximum (21,4) and (32,3) for Vandermonde matrices.
+
+Run the Test suite
+==================
+cd ceph/src
+make unittest_erasure_code_isa
+./unittest_erasure_code_isa --gtest_filter=*.* --log-to-stderr=true --debug-ods=20
+
+Run the CEPH erasure code benchmark
+===================================
+cd ceph/src
+make ceph_erasure_code_benchmark
+
+# consult ./ceph_erasure_code_benchmark -h for help
+
+# encode performance
+./ceph_erasure_code_benchmark -p isa -P k=8 -P m=3 -S 1048576 -i 1000
+
+# decode performance one lost
+./ceph_erasure_code_benchmark -e 1 -w decode -p isa -P k=8 -P m=3 -S 1048576 -i 1000
+
+# decode performance two lost
+./ceph_erasure_code_benchmark -e 2 -w decode -p isa -P k=8 -P m=3 -S 1048576 -i 1000
+
+# decode performance three lost
+./ceph_erasure_code_benchmark -e 3 -w decode -p isa -P k=8 -P m=3 -S 1048576 -i 1000
+
+
+Developer Notes
+===============
+The plugin requires 16*k byte aligned buffers. The encoding tables are computed only
+once when the EC object is created. Decoding Tables have to be computed for
+each decoding since the available data/coding sources may change between calls.
+Decoding tables are cached in an LRU cache which is sufficiently large up to (12,4).
+
+For larger configurations the cache might expire the 'oldest' tables and decoding might
+slow down. The plug-in uses an optimization to use a pure region XOR to decode single disk
+failures if the erased chunk is within the first (k+1) chunks.
+
+The unittest probes all possible failure scenarios for (12,4) Vandermonde and Cauchy matrices.

diff --git a/src/erasure-code/isa/isa-l/erasure_code/ec_base.c b/src/erasure-code/isa/isa-l/erasure_code/ec_base.c
new file mode 100644 (file)
index 0000000..5e93cb6
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/erasure_code/ec_base.c
@@ -0,0 +1,320 @@
+/**********************************************************************
+  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in
+      the documentation and/or other materials provided with the
+      distribution.
+    * Neither the name of Intel Corporation nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**********************************************************************/
+
+#include <limits.h>
+#include <string.h>            // for memset
+#include "erasure_code.h"
+#include "ec_base.h"           // for GF tables
+#include "types.h"
+
+unsigned char gf_mul(unsigned char a, unsigned char b)
+{
+#ifndef GF_LARGE_TABLES
+       int i;
+
+       if ((a == 0) || (b == 0))
+               return 0;
+
+       return gff_base[(i = gflog_base[a] + gflog_base[b]) > 254 ? i - 255 : i];
+#else
+       return gf_mul_table_base[b * 256 + a];
+#endif
+}
+
+unsigned char gf_inv(unsigned char a)
+{
+#ifndef GF_LARGE_TABLES
+       if (a == 0)
+               return 0;
+
+       return gff_base[255 - gflog_base[a]];
+#else
+       return gf_inv_table_base[a];
+#endif
+}
+
+void gf_gen_rs_matrix(unsigned char *a, int m, int k)
+{
+       int i, j;
+       unsigned char p, gen = 1;
+
+       memset(a, 0, k * m);
+       for (i = 0; i < k; i++)
+               a[k * i + i] = 1;
+
+       for (i = k; i < m; i++) {
+               p = 1;
+               for (j = 0; j < k; j++) {
+                       a[k * i + j] = p;
+                       p = gf_mul(p, gen);
+               }
+               gen = gf_mul(gen, 2);
+       }
+}
+
+void gf_gen_cauchy1_matrix(unsigned char *a, int m, int k)
+{
+       int i, j;
+       unsigned char *p;
+
+       // Identity matrix in high position
+       memset(a, 0, k * m);
+       for (i = 0; i < k; i++)
+               a[k * i + i] = 1;
+
+       // For the rest choose 1/(i + j) | i != j
+       p = &a[k * k];
+       for (i = k; i < m; i++)
+               for (j = 0; j < k; j++)
+                       *p++ = gf_inv(i ^ j);
+
+}
+
+int gf_invert_matrix(unsigned char *in_mat, unsigned char *out_mat, const int n)
+{
+       int i, j, k;
+       unsigned char temp;
+
+       // Set out_mat[] to the identity matrix
+       for (i = 0; i < n * n; i++)     // memset(out_mat, 0, n*n)
+               out_mat[i] = 0;
+
+       for (i = 0; i < n; i++)
+               out_mat[i * n + i] = 1;
+
+       // Inverse
+       for (i = 0; i < n; i++) {
+               // Check for 0 in pivot element
+               if (in_mat[i * n + i] == 0) {
+                       // Find a row with non-zero in current column and swap
+                       for (j = i + 1; j < n; j++)
+                               if (in_mat[j * n + i])
+                                       break;
+
+                       if (j == n)     // Couldn't find means it's singular
+                               return -1;
+
+                       for (k = 0; k < n; k++) {       // Swap rows i,j
+                               temp = in_mat[i * n + k];
+                               in_mat[i * n + k] = in_mat[j * n + k];
+                               in_mat[j * n + k] = temp;
+
+                               temp = out_mat[i * n + k];
+                               out_mat[i * n + k] = out_mat[j * n + k];
+                               out_mat[j * n + k] = temp;
+                       }
+               }
+
+               temp = gf_inv(in_mat[i * n + i]);       // 1/pivot
+               for (j = 0; j < n; j++) {       // Scale row i by 1/pivot
+                       in_mat[i * n + j] = gf_mul(in_mat[i * n + j], temp);
+                       out_mat[i * n + j] = gf_mul(out_mat[i * n + j], temp);
+               }
+
+               for (j = 0; j < n; j++) {
+                       if (j == i)
+                               continue;
+
+                       temp = in_mat[j * n + i];
+                       for (k = 0; k < n; k++) {
+                               out_mat[j * n + k] ^= gf_mul(temp, out_mat[i * n + k]);
+                               in_mat[j * n + k] ^= gf_mul(temp, in_mat[i * n + k]);
+                       }
+               }
+       }
+       return 0;
+}
+
+// Calculates const table gftbl in GF(2^8) from single input A
+// gftbl(A) = {A{00}, A{01}, A{02}, ... , A{0f} }, {A{00}, A{10}, A{20}, ... , A{f0} }
+
+void gf_vect_mul_init(unsigned char c, unsigned char *tbl)
+{
+       unsigned char c2 = (c << 1) ^ ((c & 0x80) ? 0x1d : 0);  //Mult by GF{2}
+       unsigned char c4 = (c2 << 1) ^ ((c2 & 0x80) ? 0x1d : 0);        //Mult by GF{2}
+       unsigned char c8 = (c4 << 1) ^ ((c4 & 0x80) ? 0x1d : 0);        //Mult by GF{2}
+
+#if __WORDSIZE == 64 || _WIN64 || __x86_64__
+       unsigned long long v1, v2, v4, v8, *t;
+       unsigned long long v10, v20, v40, v80;
+       unsigned char c17, c18, c20, c24;
+
+       t = (unsigned long long *)tbl;
+
+       v1 = c * 0x0100010001000100ull;
+       v2 = c2 * 0x0101000001010000ull;
+       v4 = c4 * 0x0101010100000000ull;
+       v8 = c8 * 0x0101010101010101ull;
+
+       v4 = v1 ^ v2 ^ v4;
+       t[0] = v4;
+       t[1] = v8 ^ v4;
+
+       c17 = (c8 << 1) ^ ((c8 & 0x80) ? 0x1d : 0);     //Mult by GF{2}
+       c18 = (c17 << 1) ^ ((c17 & 0x80) ? 0x1d : 0);   //Mult by GF{2}
+       c20 = (c18 << 1) ^ ((c18 & 0x80) ? 0x1d : 0);   //Mult by GF{2}
+       c24 = (c20 << 1) ^ ((c20 & 0x80) ? 0x1d : 0);   //Mult by GF{2}
+
+       v10 = c17 * 0x0100010001000100ull;
+       v20 = c18 * 0x0101000001010000ull;
+       v40 = c20 * 0x0101010100000000ull;
+       v80 = c24 * 0x0101010101010101ull;
+
+       v40 = v10 ^ v20 ^ v40;
+       t[2] = v40;
+       t[3] = v80 ^ v40;
+
+#else // 32-bit or other
+       unsigned char c3, c5, c6, c7, c9, c10, c11, c12, c13, c14, c15;
+       unsigned char c17, c18, c19, c20, c21, c22, c23, c24, c25, c26, c27, c28, c29, c30,
+           c31;
+
+       c3 = c2 ^ c;
+       c5 = c4 ^ c;
+       c6 = c4 ^ c2;
+       c7 = c4 ^ c3;
+
+       c9 = c8 ^ c;
+       c10 = c8 ^ c2;
+       c11 = c8 ^ c3;
+       c12 = c8 ^ c4;
+       c13 = c8 ^ c5;
+       c14 = c8 ^ c6;
+       c15 = c8 ^ c7;
+
+       tbl[0] = 0;
+       tbl[1] = c;
+       tbl[2] = c2;
+       tbl[3] = c3;
+       tbl[4] = c4;
+       tbl[5] = c5;
+       tbl[6] = c6;
+       tbl[7] = c7;
+       tbl[8] = c8;
+       tbl[9] = c9;
+       tbl[10] = c10;
+       tbl[11] = c11;
+       tbl[12] = c12;
+       tbl[13] = c13;
+       tbl[14] = c14;
+       tbl[15] = c15;
+
+       c17 = (c8 << 1) ^ ((c8 & 0x80) ? 0x1d : 0);     //Mult by GF{2}
+       c18 = (c17 << 1) ^ ((c17 & 0x80) ? 0x1d : 0);   //Mult by GF{2}
+       c19 = c18 ^ c17;
+       c20 = (c18 << 1) ^ ((c18 & 0x80) ? 0x1d : 0);   //Mult by GF{2}
+       c21 = c20 ^ c17;
+       c22 = c20 ^ c18;
+       c23 = c20 ^ c19;
+       c24 = (c20 << 1) ^ ((c20 & 0x80) ? 0x1d : 0);   //Mult by GF{2}
+       c25 = c24 ^ c17;
+       c26 = c24 ^ c18;
+       c27 = c24 ^ c19;
+       c28 = c24 ^ c20;
+       c29 = c24 ^ c21;
+       c30 = c24 ^ c22;
+       c31 = c24 ^ c23;
+
+       tbl[16] = 0;
+       tbl[17] = c17;
+       tbl[18] = c18;
+       tbl[19] = c19;
+       tbl[20] = c20;
+       tbl[21] = c21;
+       tbl[22] = c22;
+       tbl[23] = c23;
+       tbl[24] = c24;
+       tbl[25] = c25;
+       tbl[26] = c26;
+       tbl[27] = c27;
+       tbl[28] = c28;
+       tbl[29] = c29;
+       tbl[30] = c30;
+       tbl[31] = c31;
+
+#endif //__WORDSIZE == 64 || _WIN64 || __x86_64__
+}
+
+void gf_vect_dot_prod_base(int len, int vlen, unsigned char *v,
+                          unsigned char **src, unsigned char *dest)
+{
+       int i, j;
+       unsigned char s;
+       for (i = 0; i < len; i++) {
+               s = 0;
+               for (j = 0; j < vlen; j++)
+                       s ^= gf_mul(src[j][i], v[j * 32 + 1]);
+
+               dest[i] = s;
+       }
+}
+
+void ec_encode_data_base(int len, int srcs, int dests, unsigned char *v,
+                        unsigned char **src, unsigned char **dest)
+{
+       int i, j, l;
+       unsigned char s;
+
+       for (l = 0; l < dests; l++) {
+               for (i = 0; i < len; i++) {
+                       s = 0;
+                       for (j = 0; j < srcs; j++)
+                               s ^= gf_mul(src[j][i], v[j * 32 + l * srcs * 32 + 1]);
+
+                       dest[l][i] = s;
+               }
+       }
+}
+
+void gf_vect_mul_base(int len, unsigned char *a, unsigned char *src, unsigned char *dest)
+{
+       //2nd element of table array is ref value used to fill it in
+       unsigned char c = a[1];
+       while (len-- > 0)
+               *dest++ = gf_mul(c, *src++);
+}
+
+struct slver {
+       UINT16 snum;
+       UINT8 ver;
+       UINT8 core;
+};
+
+// Version info
+struct slver gf_vect_mul_init_slver_00020035;
+struct slver gf_vect_mul_init_slver = { 0x0035, 0x02, 0x00 };
+
+struct slver ec_encode_data_base_slver_00010135;
+struct slver ec_encode_data_base_slver = { 0x0135, 0x01, 0x00 };
+
+struct slver gf_vect_mul_base_slver_00010136;
+struct slver gf_vect_mul_base_slver = { 0x0136, 0x01, 0x00 };
+
+struct slver gf_vect_dot_prod_base_slver_00010137;
+struct slver gf_vect_dot_prod_base_slver = { 0x0137, 0x01, 0x00 };

diff --git a/src/erasure-code/isa/isa-l/erasure_code/ec_base.h b/src/erasure-code/isa/isa-l/erasure_code/ec_base.h
new file mode 100644 (file)
index 0000000..519ac7a
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/erasure_code/ec_base.h
@@ -0,0 +1,6680 @@
+/**********************************************************************
+  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in
+      the documentation and/or other materials provided with the
+      distribution.
+    * Neither the name of Intel Corporation nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**********************************************************************/
+
+#ifndef _EC_BASE_H_
+#define _EC_BASE_H_
+
+// Global GF(256) tables
+#ifndef GF_LARGE_TABLES
+unsigned char gff_base[] = {
+       0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x1d, 0x3a,
+       0x74, 0xe8, 0xcd, 0x87, 0x13, 0x26, 0x4c, 0x98, 0x2d, 0x5a,
+       0xb4, 0x75, 0xea, 0xc9, 0x8f, 0x03, 0x06, 0x0c, 0x18, 0x30,
+       0x60, 0xc0, 0x9d, 0x27, 0x4e, 0x9c, 0x25, 0x4a, 0x94, 0x35,
+       0x6a, 0xd4, 0xb5, 0x77, 0xee, 0xc1, 0x9f, 0x23, 0x46, 0x8c,
+       0x05, 0x0a, 0x14, 0x28, 0x50, 0xa0, 0x5d, 0xba, 0x69, 0xd2,
+       0xb9, 0x6f, 0xde, 0xa1, 0x5f, 0xbe, 0x61, 0xc2, 0x99, 0x2f,
+       0x5e, 0xbc, 0x65, 0xca, 0x89, 0x0f, 0x1e, 0x3c, 0x78, 0xf0,
+       0xfd, 0xe7, 0xd3, 0xbb, 0x6b, 0xd6, 0xb1, 0x7f, 0xfe, 0xe1,
+       0xdf, 0xa3, 0x5b, 0xb6, 0x71, 0xe2, 0xd9, 0xaf, 0x43, 0x86,
+       0x11, 0x22, 0x44, 0x88, 0x0d, 0x1a, 0x34, 0x68, 0xd0, 0xbd,
+       0x67, 0xce, 0x81, 0x1f, 0x3e, 0x7c, 0xf8, 0xed, 0xc7, 0x93,
+       0x3b, 0x76, 0xec, 0xc5, 0x97, 0x33, 0x66, 0xcc, 0x85, 0x17,
+       0x2e, 0x5c, 0xb8, 0x6d, 0xda, 0xa9, 0x4f, 0x9e, 0x21, 0x42,
+       0x84, 0x15, 0x2a, 0x54, 0xa8, 0x4d, 0x9a, 0x29, 0x52, 0xa4,
+       0x55, 0xaa, 0x49, 0x92, 0x39, 0x72, 0xe4, 0xd5, 0xb7, 0x73,
+       0xe6, 0xd1, 0xbf, 0x63, 0xc6, 0x91, 0x3f, 0x7e, 0xfc, 0xe5,
+       0xd7, 0xb3, 0x7b, 0xf6, 0xf1, 0xff, 0xe3, 0xdb, 0xab, 0x4b,
+       0x96, 0x31, 0x62, 0xc4, 0x95, 0x37, 0x6e, 0xdc, 0xa5, 0x57,
+       0xae, 0x41, 0x82, 0x19, 0x32, 0x64, 0xc8, 0x8d, 0x07, 0x0e,
+       0x1c, 0x38, 0x70, 0xe0, 0xdd, 0xa7, 0x53, 0xa6, 0x51, 0xa2,
+       0x59, 0xb2, 0x79, 0xf2, 0xf9, 0xef, 0xc3, 0x9b, 0x2b, 0x56,
+       0xac, 0x45, 0x8a, 0x09, 0x12, 0x24, 0x48, 0x90, 0x3d, 0x7a,
+       0xf4, 0xf5, 0xf7, 0xf3, 0xfb, 0xeb, 0xcb, 0x8b, 0x0b, 0x16,
+       0x2c, 0x58, 0xb0, 0x7d, 0xfa, 0xe9, 0xcf, 0x83, 0x1b, 0x36,
+       0x6c, 0xd8, 0xad, 0x47, 0x8e, 0x01
+};
+
+unsigned char gflog_base[] = {
+       0x00, 0xff, 0x01, 0x19, 0x02, 0x32, 0x1a, 0xc6, 0x03, 0xdf,
+       0x33, 0xee, 0x1b, 0x68, 0xc7, 0x4b, 0x04, 0x64, 0xe0, 0x0e,
+       0x34, 0x8d, 0xef, 0x81, 0x1c, 0xc1, 0x69, 0xf8, 0xc8, 0x08,
+       0x4c, 0x71, 0x05, 0x8a, 0x65, 0x2f, 0xe1, 0x24, 0x0f, 0x21,
+       0x35, 0x93, 0x8e, 0xda, 0xf0, 0x12, 0x82, 0x45, 0x1d, 0xb5,
+       0xc2, 0x7d, 0x6a, 0x27, 0xf9, 0xb9, 0xc9, 0x9a, 0x09, 0x78,
+       0x4d, 0xe4, 0x72, 0xa6, 0x06, 0xbf, 0x8b, 0x62, 0x66, 0xdd,
+       0x30, 0xfd, 0xe2, 0x98, 0x25, 0xb3, 0x10, 0x91, 0x22, 0x88,
+       0x36, 0xd0, 0x94, 0xce, 0x8f, 0x96, 0xdb, 0xbd, 0xf1, 0xd2,
+       0x13, 0x5c, 0x83, 0x38, 0x46, 0x40, 0x1e, 0x42, 0xb6, 0xa3,
+       0xc3, 0x48, 0x7e, 0x6e, 0x6b, 0x3a, 0x28, 0x54, 0xfa, 0x85,
+       0xba, 0x3d, 0xca, 0x5e, 0x9b, 0x9f, 0x0a, 0x15, 0x79, 0x2b,
+       0x4e, 0xd4, 0xe5, 0xac, 0x73, 0xf3, 0xa7, 0x57, 0x07, 0x70,
+       0xc0, 0xf7, 0x8c, 0x80, 0x63, 0x0d, 0x67, 0x4a, 0xde, 0xed,
+       0x31, 0xc5, 0xfe, 0x18, 0xe3, 0xa5, 0x99, 0x77, 0x26, 0xb8,
+       0xb4, 0x7c, 0x11, 0x44, 0x92, 0xd9, 0x23, 0x20, 0x89, 0x2e,
+       0x37, 0x3f, 0xd1, 0x5b, 0x95, 0xbc, 0xcf, 0xcd, 0x90, 0x87,
+       0x97, 0xb2, 0xdc, 0xfc, 0xbe, 0x61, 0xf2, 0x56, 0xd3, 0xab,
+       0x14, 0x2a, 0x5d, 0x9e, 0x84, 0x3c, 0x39, 0x53, 0x47, 0x6d,
+       0x41, 0xa2, 0x1f, 0x2d, 0x43, 0xd8, 0xb7, 0x7b, 0xa4, 0x76,
+       0xc4, 0x17, 0x49, 0xec, 0x7f, 0x0c, 0x6f, 0xf6, 0x6c, 0xa1,
+       0x3b, 0x52, 0x29, 0x9d, 0x55, 0xaa, 0xfb, 0x60, 0x86, 0xb1,
+       0xbb, 0xcc, 0x3e, 0x5a, 0xcb, 0x59, 0x5f, 0xb0, 0x9c, 0xa9,
+       0xa0, 0x51, 0x0b, 0xf5, 0x16, 0xeb, 0x7a, 0x75, 0x2c, 0xd7,
+       0x4f, 0xae, 0xd5, 0xe9, 0xe6, 0xe7, 0xad, 0xe8, 0x74, 0xd6,
+       0xf4, 0xea, 0xa8, 0x50, 0x58, 0xaf
+};
+#else
+unsigned char gf_mul_table_base[] = {
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x02, 0x03,
+       0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d,
+       0x0e, 0x0f, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
+       0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, 0x20, 0x21,
+       0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b,
+       0x2c, 0x2d, 0x2e, 0x2f, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35,
+       0x36, 0x37, 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
+       0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49,
+       0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x52, 0x53,
+       0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d,
+       0x5e, 0x5f, 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
+       0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f, 0x70, 0x71,
+       0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7a, 0x7b,
+       0x7c, 0x7d, 0x7e, 0x7f, 0x80, 0x81, 0x82, 0x83, 0x84, 0x85,
+       0x86, 0x87, 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+       0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99,
+       0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, 0xa0, 0xa1, 0xa2, 0xa3,
+       0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad,
+       0xae, 0xaf, 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
+       0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf, 0xc0, 0xc1,
+       0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0xcb,
+       0xcc, 0xcd, 0xce, 0xcf, 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5,
+       0xd6, 0xd7, 0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
+       0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9,
+       0xea, 0xeb, 0xec, 0xed, 0xee, 0xef, 0xf0, 0xf1, 0xf2, 0xf3,
+       0xf4, 0xf5, 0xf6, 0xf7, 0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd,
+       0xfe, 0xff, 0x00, 0x02, 0x04, 0x06, 0x08, 0x0a, 0x0c, 0x0e,
+       0x10, 0x12, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0x1e, 0x20, 0x22,
+       0x24, 0x26, 0x28, 0x2a, 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36,
+       0x38, 0x3a, 0x3c, 0x3e, 0x40, 0x42, 0x44, 0x46, 0x48, 0x4a,
+       0x4c, 0x4e, 0x50, 0x52, 0x54, 0x56, 0x58, 0x5a, 0x5c, 0x5e,
+       0x60, 0x62, 0x64, 0x66, 0x68, 0x6a, 0x6c, 0x6e, 0x70, 0x72,
+       0x74, 0x76, 0x78, 0x7a, 0x7c, 0x7e, 0x80, 0x82, 0x84, 0x86,
+       0x88, 0x8a, 0x8c, 0x8e, 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a,
+       0x9c, 0x9e, 0xa0, 0xa2, 0xa4, 0xa6, 0xa8, 0xaa, 0xac, 0xae,
+       0xb0, 0xb2, 0xb4, 0xb6, 0xb8, 0xba, 0xbc, 0xbe, 0xc0, 0xc2,
+       0xc4, 0xc6, 0xc8, 0xca, 0xcc, 0xce, 0xd0, 0xd2, 0xd4, 0xd6,
+       0xd8, 0xda, 0xdc, 0xde, 0xe0, 0xe2, 0xe4, 0xe6, 0xe8, 0xea,
+       0xec, 0xee, 0xf0, 0xf2, 0xf4, 0xf6, 0xf8, 0xfa, 0xfc, 0xfe,
+       0x1d, 0x1f, 0x19, 0x1b, 0x15, 0x17, 0x11, 0x13, 0x0d, 0x0f,
+       0x09, 0x0b, 0x05, 0x07, 0x01, 0x03, 0x3d, 0x3f, 0x39, 0x3b,
+       0x35, 0x37, 0x31, 0x33, 0x2d, 0x2f, 0x29, 0x2b, 0x25, 0x27,
+       0x21, 0x23, 0x5d, 0x5f, 0x59, 0x5b, 0x55, 0x57, 0x51, 0x53,
+       0x4d, 0x4f, 0x49, 0x4b, 0x45, 0x47, 0x41, 0x43, 0x7d, 0x7f,
+       0x79, 0x7b, 0x75, 0x77, 0x71, 0x73, 0x6d, 0x6f, 0x69, 0x6b,
+       0x65, 0x67, 0x61, 0x63, 0x9d, 0x9f, 0x99, 0x9b, 0x95, 0x97,
+       0x91, 0x93, 0x8d, 0x8f, 0x89, 0x8b, 0x85, 0x87, 0x81, 0x83,
+       0xbd, 0xbf, 0xb9, 0xbb, 0xb5, 0xb7, 0xb1, 0xb3, 0xad, 0xaf,
+       0xa9, 0xab, 0xa5, 0xa7, 0xa1, 0xa3, 0xdd, 0xdf, 0xd9, 0xdb,
+       0xd5, 0xd7, 0xd1, 0xd3, 0xcd, 0xcf, 0xc9, 0xcb, 0xc5, 0xc7,
+       0xc1, 0xc3, 0xfd, 0xff, 0xf9, 0xfb, 0xf5, 0xf7, 0xf1, 0xf3,
+       0xed, 0xef, 0xe9, 0xeb, 0xe5, 0xe7, 0xe1, 0xe3, 0x00, 0x03,
+       0x06, 0x05, 0x0c, 0x0f, 0x0a, 0x09, 0x18, 0x1b, 0x1e, 0x1d,
+       0x14, 0x17, 0x12, 0x11, 0x30, 0x33, 0x36, 0x35, 0x3c, 0x3f,
+       0x3a, 0x39, 0x28, 0x2b, 0x2e, 0x2d, 0x24, 0x27, 0x22, 0x21,
+       0x60, 0x63, 0x66, 0x65, 0x6c, 0x6f, 0x6a, 0x69, 0x78, 0x7b,
+       0x7e, 0x7d, 0x74, 0x77, 0x72, 0x71, 0x50, 0x53, 0x56, 0x55,
+       0x5c, 0x5f, 0x5a, 0x59, 0x48, 0x4b, 0x4e, 0x4d, 0x44, 0x47,
+       0x42, 0x41, 0xc0, 0xc3, 0xc6, 0xc5, 0xcc, 0xcf, 0xca, 0xc9,
+       0xd8, 0xdb, 0xde, 0xdd, 0xd4, 0xd7, 0xd2, 0xd1, 0xf0, 0xf3,
+       0xf6, 0xf5, 0xfc, 0xff, 0xfa, 0xf9, 0xe8, 0xeb, 0xee, 0xed,
+       0xe4, 0xe7, 0xe2, 0xe1, 0xa0, 0xa3, 0xa6, 0xa5, 0xac, 0xaf,
+       0xaa, 0xa9, 0xb8, 0xbb, 0xbe, 0xbd, 0xb4, 0xb7, 0xb2, 0xb1,
+       0x90, 0x93, 0x96, 0x95, 0x9c, 0x9f, 0x9a, 0x99, 0x88, 0x8b,
+       0x8e, 0x8d, 0x84, 0x87, 0x82, 0x81, 0x9d, 0x9e, 0x9b, 0x98,
+       0x91, 0x92, 0x97, 0x94, 0x85, 0x86, 0x83, 0x80, 0x89, 0x8a,
+       0x8f, 0x8c, 0xad, 0xae, 0xab, 0xa8, 0xa1, 0xa2, 0xa7, 0xa4,
+       0xb5, 0xb6, 0xb3, 0xb0, 0xb9, 0xba, 0xbf, 0xbc, 0xfd, 0xfe,
+       0xfb, 0xf8, 0xf1, 0xf2, 0xf7, 0xf4, 0xe5, 0xe6, 0xe3, 0xe0,
+       0xe9, 0xea, 0xef, 0xec, 0xcd, 0xce, 0xcb, 0xc8, 0xc1, 0xc2,
+       0xc7, 0xc4, 0xd5, 0xd6, 0xd3, 0xd0, 0xd9, 0xda, 0xdf, 0xdc,
+       0x5d, 0x5e, 0x5b, 0x58, 0x51, 0x52, 0x57, 0x54, 0x45, 0x46,
+       0x43, 0x40, 0x49, 0x4a, 0x4f, 0x4c, 0x6d, 0x6e, 0x6b, 0x68,
+       0x61, 0x62, 0x67, 0x64, 0x75, 0x76, 0x73, 0x70, 0x79, 0x7a,
+       0x7f, 0x7c, 0x3d, 0x3e, 0x3b, 0x38, 0x31, 0x32, 0x37, 0x34,
+       0x25, 0x26, 0x23, 0x20, 0x29, 0x2a, 0x2f, 0x2c, 0x0d, 0x0e,
+       0x0b, 0x08, 0x01, 0x02, 0x07, 0x04, 0x15, 0x16, 0x13, 0x10,
+       0x19, 0x1a, 0x1f, 0x1c, 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14,
+       0x18, 0x1c, 0x20, 0x24, 0x28, 0x2c, 0x30, 0x34, 0x38, 0x3c,
+       0x40, 0x44, 0x48, 0x4c, 0x50, 0x54, 0x58, 0x5c, 0x60, 0x64,
+       0x68, 0x6c, 0x70, 0x74, 0x78, 0x7c, 0x80, 0x84, 0x88, 0x8c,
+       0x90, 0x94, 0x98, 0x9c, 0xa0, 0xa4, 0xa8, 0xac, 0xb0, 0xb4,
+       0xb8, 0xbc, 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4, 0xd8, 0xdc,
+       0xe0, 0xe4, 0xe8, 0xec, 0xf0, 0xf4, 0xf8, 0xfc, 0x1d, 0x19,
+       0x15, 0x11, 0x0d, 0x09, 0x05, 0x01, 0x3d, 0x39, 0x35, 0x31,
+       0x2d, 0x29, 0x25, 0x21, 0x5d, 0x59, 0x55, 0x51, 0x4d, 0x49,
+       0x45, 0x41, 0x7d, 0x79, 0x75, 0x71, 0x6d, 0x69, 0x65, 0x61,
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+       0xfb, 0x04, 0xc3, 0x3c, 0x20, 0xdf, 0xb3, 0x4c, 0x50, 0xaf,
+       0x68, 0x97, 0x8b, 0x74, 0xc5, 0x3a, 0x26, 0xd9, 0x1e, 0xe1,
+       0xfd, 0x02, 0x6e, 0x91, 0x8d, 0x72, 0xb5, 0x4a, 0x56, 0xa9,
+       0x8e, 0x71, 0x6d, 0x92, 0x55, 0xaa, 0xb6, 0x49, 0x25, 0xda,
+       0xc6, 0x39, 0xfe, 0x01, 0x1d, 0xe2
+};
+
+unsigned char gf_inv_table_base[] = {
+       0x00, 0x01, 0x8e, 0xf4, 0x47, 0xa7, 0x7a, 0xba, 0xad, 0x9d,
+       0xdd, 0x98, 0x3d, 0xaa, 0x5d, 0x96, 0xd8, 0x72, 0xc0, 0x58,
+       0xe0, 0x3e, 0x4c, 0x66, 0x90, 0xde, 0x55, 0x80, 0xa0, 0x83,
+       0x4b, 0x2a, 0x6c, 0xed, 0x39, 0x51, 0x60, 0x56, 0x2c, 0x8a,
+       0x70, 0xd0, 0x1f, 0x4a, 0x26, 0x8b, 0x33, 0x6e, 0x48, 0x89,
+       0x6f, 0x2e, 0xa4, 0xc3, 0x40, 0x5e, 0x50, 0x22, 0xcf, 0xa9,
+       0xab, 0x0c, 0x15, 0xe1, 0x36, 0x5f, 0xf8, 0xd5, 0x92, 0x4e,
+       0xa6, 0x04, 0x30, 0x88, 0x2b, 0x1e, 0x16, 0x67, 0x45, 0x93,
+       0x38, 0x23, 0x68, 0x8c, 0x81, 0x1a, 0x25, 0x61, 0x13, 0xc1,
+       0xcb, 0x63, 0x97, 0x0e, 0x37, 0x41, 0x24, 0x57, 0xca, 0x5b,
+       0xb9, 0xc4, 0x17, 0x4d, 0x52, 0x8d, 0xef, 0xb3, 0x20, 0xec,
+       0x2f, 0x32, 0x28, 0xd1, 0x11, 0xd9, 0xe9, 0xfb, 0xda, 0x79,
+       0xdb, 0x77, 0x06, 0xbb, 0x84, 0xcd, 0xfe, 0xfc, 0x1b, 0x54,
+       0xa1, 0x1d, 0x7c, 0xcc, 0xe4, 0xb0, 0x49, 0x31, 0x27, 0x2d,
+       0x53, 0x69, 0x02, 0xf5, 0x18, 0xdf, 0x44, 0x4f, 0x9b, 0xbc,
+       0x0f, 0x5c, 0x0b, 0xdc, 0xbd, 0x94, 0xac, 0x09, 0xc7, 0xa2,
+       0x1c, 0x82, 0x9f, 0xc6, 0x34, 0xc2, 0x46, 0x05, 0xce, 0x3b,
+       0x0d, 0x3c, 0x9c, 0x08, 0xbe, 0xb7, 0x87, 0xe5, 0xee, 0x6b,
+       0xeb, 0xf2, 0xbf, 0xaf, 0xc5, 0x64, 0x07, 0x7b, 0x95, 0x9a,
+       0xae, 0xb6, 0x12, 0x59, 0xa5, 0x35, 0x65, 0xb8, 0xa3, 0x9e,
+       0xd2, 0xf7, 0x62, 0x5a, 0x85, 0x7d, 0xa8, 0x3a, 0x29, 0x71,
+       0xc8, 0xf6, 0xf9, 0x43, 0xd7, 0xd6, 0x10, 0x73, 0x76, 0x78,
+       0x99, 0x0a, 0x19, 0x91, 0x14, 0x3f, 0xe6, 0xf0, 0x86, 0xb1,
+       0xe2, 0xf1, 0xfa, 0x74, 0xf3, 0xb4, 0x6d, 0x21, 0xb2, 0x6a,
+       0xe3, 0xe7, 0xb5, 0xea, 0x03, 0x8f, 0xd3, 0xc9, 0x42, 0xd4,
+       0xe8, 0x75, 0x7f, 0xff, 0x7e, 0xfd
+};
+#endif // GF_LARGE_TABLES
+
+#endif //_EC_BASE_H_

diff --git a/src/erasure-code/isa/isa-l/erasure_code/ec_highlevel_func.c b/src/erasure-code/isa/isa-l/erasure_code/ec_highlevel_func.c
new file mode 100644 (file)
index 0000000..9cea61e
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/erasure_code/ec_highlevel_func.c
@@ -0,0 +1,152 @@
+/**********************************************************************
+  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in
+      the documentation and/or other materials provided with the
+      distribution.
+    * Neither the name of Intel Corporation nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**********************************************************************/
+#include <limits.h>
+#include "erasure_code.h"
+#include "types.h"
+
+void ec_init_tables(int k, int rows, unsigned char *a, unsigned char *g_tbls)
+{
+       int i, j;
+
+       for (i = 0; i < rows; i++) {
+               for (j = 0; j < k; j++) {
+                       gf_vect_mul_init(*a++, g_tbls);
+                       g_tbls += 32;
+               }
+       }
+}
+
+#if __WORDSIZE == 64 || _WIN64 || __x86_64__
+void ec_encode_data_sse(int len, int k, int rows, unsigned char *g_tbls, unsigned char **data,
+                       unsigned char **coding)
+{
+
+       if (len < 16) {
+               ec_encode_data_base(len, k, rows, g_tbls, data, coding);
+               return;
+       }
+
+       while (rows >= 4) {
+               gf_4vect_dot_prod_sse(len, k, g_tbls, data, coding);
+               g_tbls += 4 * k * 32;
+               coding += 4;
+               rows -= 4;
+       }
+       switch (rows) {
+       case 3:
+               gf_3vect_dot_prod_sse(len, k, g_tbls, data, coding);
+               break;
+       case 2:
+               gf_2vect_dot_prod_sse(len, k, g_tbls, data, coding);
+               break;
+       case 1:
+               gf_vect_dot_prod_sse(len, k, g_tbls, data, *coding);
+               break;
+       case 0:
+               break;
+       }
+
+}
+
+void ec_encode_data_avx(int len, int k, int rows, unsigned char *g_tbls, unsigned char **data,
+                       unsigned char **coding)
+{
+
+       if (len < 16) {
+               ec_encode_data_base(len, k, rows, g_tbls, data, coding);
+               return;
+       }
+
+       while (rows >= 4) {
+               gf_4vect_dot_prod_avx(len, k, g_tbls, data, coding);
+               g_tbls += 4 * k * 32;
+               coding += 4;
+               rows -= 4;
+       }
+       switch (rows) {
+       case 3:
+               gf_3vect_dot_prod_avx(len, k, g_tbls, data, coding);
+               break;
+       case 2:
+               gf_2vect_dot_prod_avx(len, k, g_tbls, data, coding);
+               break;
+       case 1:
+               gf_vect_dot_prod_avx(len, k, g_tbls, data, *coding);
+               break;
+       case 0:
+               break;
+       }
+
+}
+
+void ec_encode_data_avx2(int len, int k, int rows, unsigned char *g_tbls, unsigned char **data,
+                        unsigned char **coding)
+{
+
+       if (len < 32) {
+               ec_encode_data_base(len, k, rows, g_tbls, data, coding);
+               return;
+       }
+
+       while (rows >= 4) {
+               gf_4vect_dot_prod_avx2(len, k, g_tbls, data, coding);
+               g_tbls += 4 * k * 32;
+               coding += 4;
+               rows -= 4;
+       }
+       switch (rows) {
+       case 3:
+               gf_3vect_dot_prod_avx2(len, k, g_tbls, data, coding);
+               break;
+       case 2:
+               gf_2vect_dot_prod_avx2(len, k, g_tbls, data, coding);
+               break;
+       case 1:
+               gf_vect_dot_prod_avx2(len, k, g_tbls, data, *coding);
+               break;
+       case 0:
+               break;
+       }
+
+}
+
+#endif //__WORDSIZE == 64 || _WIN64 || __x86_64__
+
+struct slver {
+       UINT16 snum;
+       UINT8 ver;
+       UINT8 core;
+};
+
+// Version info
+struct slver ec_init_tables_slver_00010068;
+struct slver ec_init_tables_slver = { 0x0068, 0x01, 0x00 };
+
+struct slver ec_encode_data_sse_slver_00020069;
+struct slver ec_encode_data_sse_slver = { 0x0069, 0x02, 0x00 };

diff --git a/src/erasure-code/isa/isa-l/erasure_code/ec_multibinary.asm.s b/src/erasure-code/isa/isa-l/erasure_code/ec_multibinary.asm.s
new file mode 100644 (file)
index 0000000..b565509
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/erasure_code/ec_multibinary.asm.s
@@ -0,0 +1,266 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+%ifidn __OUTPUT_FORMAT__, elf64
+%define WRT_OPT                wrt ..plt
+%else
+%define WRT_OPT
+%endif
+
+%ifidn __OUTPUT_FORMAT__, elf32
+
+[bits 32]
+
+%define def_wrd                dd
+%define wrd_sz         dword
+%define arg1           esi
+
+%else
+
+%include "reg_sizes.asm"
+default rel
+[bits 64]
+
+%define def_wrd        dq
+%define wrd_sz         qword
+%define arg1           rsi
+
+extern ec_encode_data_sse
+extern ec_encode_data_avx
+extern ec_encode_data_avx2
+extern gf_vect_mul_sse
+extern gf_vect_mul_avx
+extern gf_vect_dot_prod_sse
+extern gf_vect_dot_prod_avx
+extern gf_vect_dot_prod_avx2
+%endif
+
+extern gf_vect_mul_base
+extern ec_encode_data_base
+extern gf_vect_dot_prod_base
+
+section .data
+;;; *_mbinit are initial values for *_dispatched; is updated on first call.
+;;; Therefore, *_dispatch_init is only executed on first call.
+
+ec_encode_data_dispatched:
+       def_wrd      ec_encode_data_mbinit
+
+gf_vect_mul_dispatched:
+       def_wrd      gf_vect_mul_mbinit
+
+gf_vect_dot_prod_dispatched:
+       def_wrd      gf_vect_dot_prod_mbinit
+
+section .text
+;;;;
+; ec_encode_data multibinary function
+;;;;
+global ec_encode_data:function
+ec_encode_data_mbinit:
+       call    ec_encode_data_dispatch_init
+
+ec_encode_data:
+       jmp     wrd_sz [ec_encode_data_dispatched]
+
+ec_encode_data_dispatch_init:
+       push    arg1
+%ifidn __OUTPUT_FORMAT__, elf32                ;; 32-bit check
+       lea     arg1, [ec_encode_data_base]
+%else
+       push    rax
+       push    rbx
+       push    rcx
+       push    rdx
+       lea     arg1, [ec_encode_data_base WRT_OPT] ; Default
+
+       mov     eax, 1
+       cpuid
+       lea     rbx, [ec_encode_data_sse WRT_OPT]
+       test    ecx, FLAG_CPUID1_ECX_SSE4_1
+       cmovne  arg1, rbx
+
+       and     ecx, (FLAG_CPUID1_ECX_AVX | FLAG_CPUID1_ECX_OSXSAVE)
+       cmp     ecx, (FLAG_CPUID1_ECX_AVX | FLAG_CPUID1_ECX_OSXSAVE)
+       lea     rbx, [ec_encode_data_avx WRT_OPT]
+
+       jne     _done_ec_encode_data_init
+       mov     rsi, rbx
+
+       ;; Try for AVX2
+       xor     ecx, ecx
+       mov     eax, 7
+       cpuid
+       test    ebx, FLAG_CPUID1_EBX_AVX2
+       lea     rbx, [ec_encode_data_avx2 WRT_OPT]
+       cmovne  rsi, rbx
+
+       ;; Does it have xmm and ymm support
+       xor     ecx, ecx
+       xgetbv
+       and     eax, FLAG_XGETBV_EAX_XMM_YMM
+       cmp     eax, FLAG_XGETBV_EAX_XMM_YMM
+       je      _done_ec_encode_data_init
+       lea     rsi, [ec_encode_data_sse WRT_OPT]
+
+_done_ec_encode_data_init:
+       pop     rdx
+       pop     rcx
+       pop     rbx
+       pop     rax
+%endif                 ;; END 32-bit check
+       mov     [ec_encode_data_dispatched], arg1
+       pop     arg1
+       ret
+
+;;;;
+; gf_vect_mul multibinary function
+;;;;
+global gf_vect_mul:function
+gf_vect_mul_mbinit:
+       call    gf_vect_mul_dispatch_init
+
+gf_vect_mul:
+       jmp     wrd_sz [gf_vect_mul_dispatched]
+
+gf_vect_mul_dispatch_init:
+       push    arg1
+%ifidn __OUTPUT_FORMAT__, elf32                ;; 32-bit check
+       lea     arg1, [gf_vect_mul_base]
+%else
+       push    rax
+       push    rbx
+       push    rcx
+       push    rdx
+       lea     arg1, [gf_vect_mul_base WRT_OPT] ; Default
+
+       mov     eax, 1
+       cpuid
+       test    ecx, FLAG_CPUID1_ECX_SSE4_2
+       lea     rbx, [gf_vect_mul_sse WRT_OPT]
+       je      _done_gf_vect_mul_dispatch_init
+       mov     arg1, rbx
+
+       ;; Try for AVX
+       and     ecx, (FLAG_CPUID1_ECX_OSXSAVE | FLAG_CPUID1_ECX_AVX)
+       cmp     ecx, (FLAG_CPUID1_ECX_OSXSAVE | FLAG_CPUID1_ECX_AVX)
+       jne     _done_gf_vect_mul_dispatch_init
+
+       ;; Does it have xmm and ymm support
+       xor     ecx, ecx
+       xgetbv
+       and     eax, FLAG_XGETBV_EAX_XMM_YMM
+       cmp     eax, FLAG_XGETBV_EAX_XMM_YMM
+       jne     _done_gf_vect_mul_dispatch_init
+       lea     arg1, [gf_vect_mul_avx WRT_OPT]
+
+_done_gf_vect_mul_dispatch_init:
+       pop     rdx
+       pop     rcx
+       pop     rbx
+       pop     rax
+%endif                 ;; END 32-bit check
+       mov     [gf_vect_mul_dispatched], arg1
+       pop     arg1
+       ret
+
+
+;;;;
+; gf_vect_dot_prod multibinary function
+;;;;
+global gf_vect_dot_prod:function
+gf_vect_dot_prod_mbinit:
+       call    gf_vect_dot_prod_dispatch_init
+
+gf_vect_dot_prod:
+       jmp     wrd_sz [gf_vect_dot_prod_dispatched]
+
+gf_vect_dot_prod_dispatch_init:
+       push    arg1
+%ifidn __OUTPUT_FORMAT__, elf32         ;; 32-bit check
+       lea     arg1, [gf_vect_dot_prod_base]
+%else
+       push    rax
+       push    rbx
+       push    rcx
+       push    rdx
+       lea     arg1, [gf_vect_dot_prod_base WRT_OPT] ; Default
+
+       mov     eax, 1
+       cpuid
+       lea     rbx, [gf_vect_dot_prod_sse WRT_OPT]
+       test    ecx, FLAG_CPUID1_ECX_SSE4_1
+       cmovne  arg1, rbx
+
+       and     ecx, (FLAG_CPUID1_ECX_AVX | FLAG_CPUID1_ECX_OSXSAVE)
+       cmp     ecx, (FLAG_CPUID1_ECX_AVX | FLAG_CPUID1_ECX_OSXSAVE)
+       lea     rbx, [gf_vect_dot_prod_avx WRT_OPT]
+
+       jne     _done_gf_vect_dot_prod_init
+       mov     rsi, rbx
+
+       ;; Try for AVX2
+       xor     ecx, ecx
+       mov     eax, 7
+       cpuid
+       test    ebx, FLAG_CPUID1_EBX_AVX2
+       lea     rbx, [gf_vect_dot_prod_avx2 WRT_OPT]
+       cmovne  rsi, rbx
+
+       ;; Does it have xmm and ymm support
+       xor     ecx, ecx
+       xgetbv
+       and     eax, FLAG_XGETBV_EAX_XMM_YMM
+       cmp     eax, FLAG_XGETBV_EAX_XMM_YMM
+       je      _done_gf_vect_dot_prod_init
+       lea     rsi, [gf_vect_dot_prod_sse WRT_OPT]
+
+_done_gf_vect_dot_prod_init:
+       pop     rdx
+       pop     rcx
+       pop     rbx
+       pop     rax
+%endif                 ;; END 32-bit check
+       mov     [gf_vect_dot_prod_dispatched], arg1
+       pop     arg1
+       ret
+
+%macro slversion 4
+global %1_slver_%2%3%4
+global %1_slver
+%1_slver:
+%1_slver_%2%3%4:
+       dw 0x%4
+       db 0x%3, 0x%2
+%endmacro
+
+;;;       func                  core, ver, snum
+slversion ec_encode_data,      00,   02,  0133
+slversion gf_vect_mul,         00,   02,  0134
+slversion gf_vect_dot_prod,    00,   01,  0138

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_dot_prod_avx.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_dot_prod_avx.asm.s
new file mode 100644 (file)
index 0000000..7f8b34b
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_dot_prod_avx.asm.s
@@ -0,0 +1,234 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;;;
+;;; gf_2vect_dot_prod_avx(len, vec, *g_tbls, **buffs, **dests);
+;;;
+;;; Author: Gregory Tucker
+
+
+%ifidn __OUTPUT_FORMAT__, elf64
+ %define arg0  rdi
+ %define arg1  rsi
+ %define arg2  rdx
+ %define arg3  rcx
+ %define arg4  r8
+ %define arg5  r9
+
+ %define tmp   r11
+ %define tmp2  r10
+ %define tmp3  r9
+ %define tmp4  r12             ; must be saved and restored
+ %define return rax
+ %define PS 8
+ %define LOG_PS 3
+
+ %define func(x) x:
+ %macro FUNC_SAVE 0
+       push    r12
+ %endmacro
+ %macro FUNC_RESTORE 0
+       pop     r12
+ %endmacro
+%endif
+
+%ifidn __OUTPUT_FORMAT__, win64
+ %define arg0   rcx
+ %define arg1   rdx
+ %define arg2   r8
+ %define arg3   r9
+
+ %define arg4   r12            ; must be saved, loaded and restored
+ %define tmp    r11
+ %define tmp2   r10
+ %define tmp3   r13            ; must be saved and restored
+ %define tmp4   r14            ; must be saved and restored
+ %define return rax
+ %define PS     8
+ %define LOG_PS 3
+ %define stack_size  3*16 + 3*8        ; must be an odd multiple of 8
+ %define arg(x)      [rsp + stack_size + PS + PS*x]
+
+ %define func(x) proc_frame x
+ %macro FUNC_SAVE 0
+       alloc_stack     stack_size
+       save_xmm128     xmm6, 0*16
+       save_xmm128     xmm7, 1*16
+       save_xmm128     xmm8, 2*16
+       save_reg        r12,  3*16 + 0*8
+       save_reg        r13,  3*16 + 1*8
+       save_reg        r14,  3*16 + 2*8
+       end_prolog
+       mov     arg4, arg(4)
+ %endmacro
+
+ %macro FUNC_RESTORE 0
+       vmovdqa xmm6, [rsp + 0*16]
+       vmovdqa xmm7, [rsp + 1*16]
+       vmovdqa xmm8, [rsp + 2*16]
+       mov     r12,  [rsp + 3*16 + 0*8]
+       mov     r13,  [rsp + 3*16 + 1*8]
+       mov     r14,  [rsp + 3*16 + 2*8]
+       add     rsp, stack_size
+ %endmacro
+%endif
+
+%define len   arg0
+%define vec   arg1
+%define mul_array arg2
+%define        src   arg3
+%define dest1 arg4
+
+%define vec_i tmp2
+%define ptr   tmp3
+%define dest2 tmp4
+%define pos   return
+
+%ifndef EC_ALIGNED_ADDR
+;;; Use Un-aligned load/store
+ %define XLDR vmovdqu
+ %define XSTR vmovdqu
+%else
+;;; Use Non-temporal load/stor
+ %ifdef NO_NT_LDST
+  %define XLDR vmovdqa
+  %define XSTR vmovdqa
+ %else
+  %define XLDR vmovntdqa
+  %define XSTR vmovntdq
+ %endif
+%endif
+
+
+default rel
+
+[bits 64]
+section .text
+
+%define xmask0f   xmm8
+%define xgft1_lo  xmm7
+%define xgft1_hi  xmm6
+%define xgft2_lo  xmm5
+%define xgft2_hi  xmm4
+
+%define x0     xmm0
+%define xtmpa  xmm1
+%define xp1    xmm2
+%define xp2    xmm3
+
+align 16
+global gf_2vect_dot_prod_avx:function
+
+func(gf_2vect_dot_prod_avx)
+       FUNC_SAVE
+       sub     len, 16
+       jl      .return_fail
+       xor     pos, pos
+       vmovdqa xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
+       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
+       mov     dest2, [dest1+PS]
+       mov     dest1, [dest1]
+
+.loop16
+       vpxor   xp1, xp1
+       vpxor   xp2, xp2
+       mov     tmp, mul_array
+       xor     vec_i, vec_i
+
+.next_vect
+       mov     ptr, [src+vec_i]
+
+       vmovdqu xgft1_lo, [tmp]         ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
+       vmovdqu xgft1_hi, [tmp+16]      ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
+       vmovdqu xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
+       vmovdqu xgft2_hi, [tmp+vec*(32/PS)+16]  ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
+
+       XLDR    x0, [ptr+pos]           ;Get next source vector
+       add     tmp, 32
+       add     vec_i, PS
+
+       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
+       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
+       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
+
+       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
+       vpxor   xp1, xgft1_hi           ;xp1 += partial
+
+       vpshufb xgft2_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft2_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft2_hi, xgft2_lo      ;GF add high and low partials
+       vpxor   xp2, xgft2_hi           ;xp2 += partial
+
+       cmp     vec_i, vec
+       jl      .next_vect
+
+       XSTR    [dest1+pos], xp1
+       XSTR    [dest2+pos], xp2
+
+       add     pos, 16                 ;Loop on 16 bytes at a time
+       cmp     pos, len
+       jle     .loop16
+
+       lea     tmp, [len + 16]
+       cmp     pos, tmp
+       je      .return_pass
+
+       ;; Tail len
+       mov     pos, len        ;Overlapped offset length-16
+       jmp     .loop16         ;Do one more overlap pass
+
+.return_pass:
+       mov     return, 0
+       FUNC_RESTORE
+       ret
+
+.return_fail:
+       mov     return, 1
+       FUNC_RESTORE
+       ret
+
+endproc_frame
+
+section .data
+
+align 16
+mask0f: ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
+
+%macro slversion 4
+global %1_slver_%2%3%4
+global %1_slver
+%1_slver:
+%1_slver_%2%3%4:
+       dw 0x%4
+       db 0x%3, 0x%2
+%endmacro
+;;;       func                  core, ver, snum
+slversion gf_2vect_dot_prod_avx, 02,  03,  0191

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_dot_prod_avx2.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_dot_prod_avx2.asm.s
new file mode 100644 (file)
index 0000000..ce9275f
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_dot_prod_avx2.asm.s
@@ -0,0 +1,246 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;;;
+;;; gf_2vect_dot_prod_avx2(len, vec, *g_tbls, **buffs, **dests);
+;;;
+;;; Author: Gregory Tucker
+
+
+%ifidn __OUTPUT_FORMAT__, elf64
+ %define arg0  rdi
+ %define arg1  rsi
+ %define arg2  rdx
+ %define arg3  rcx
+ %define arg4  r8
+ %define arg5  r9
+
+ %define tmp   r11
+ %define tmp.w r11d
+ %define tmp.b r11b
+ %define tmp2  r10
+ %define tmp3  r9
+ %define tmp4  r12             ; must be saved and restored
+ %define return rax
+ %define PS 8
+ %define LOG_PS 3
+
+ %define func(x) x:
+ %macro FUNC_SAVE 0
+       push    r12
+ %endmacro
+ %macro FUNC_RESTORE 0
+       pop     r12
+ %endmacro
+%endif
+
+%ifidn __OUTPUT_FORMAT__, win64
+ %define arg0   rcx
+ %define arg1   rdx
+ %define arg2   r8
+ %define arg3   r9
+
+ %define arg4   r12            ; must be saved, loaded and restored
+ %define tmp    r11
+ %define tmp.w  r11d
+ %define tmp.b  r11b
+ %define tmp2   r10
+ %define tmp3   r13            ; must be saved and restored
+ %define tmp4   r14            ; must be saved and restored
+ %define return rax
+ %define PS     8
+ %define LOG_PS 3
+ %define stack_size  3*16 + 3*8        ; must be an odd multiple of 8
+ %define arg(x)      [rsp + stack_size + PS + PS*x]
+
+ %define func(x) proc_frame x
+ %macro FUNC_SAVE 0
+       alloc_stack     stack_size
+       vmovdqa [rsp + 0*16], xmm6
+       vmovdqa [rsp + 1*16], xmm7
+       vmovdqa [rsp + 2*16], xmm8
+       save_reg        r12,  3*16 + 0*8
+       save_reg        r13,  3*16 + 1*8
+       save_reg        r14,  3*16 + 2*8
+       end_prolog
+       mov     arg4, arg(4)
+ %endmacro
+
+ %macro FUNC_RESTORE 0
+       vmovdqa xmm6, [rsp + 0*16]
+       vmovdqa xmm7, [rsp + 1*16]
+       vmovdqa xmm8, [rsp + 2*16]
+       mov     r12,  [rsp + 3*16 + 0*8]
+       mov     r13,  [rsp + 3*16 + 1*8]
+       mov     r14,  [rsp + 3*16 + 2*8]
+       add     rsp, stack_size
+ %endmacro
+%endif
+
+%define len   arg0
+%define vec   arg1
+%define mul_array arg2
+%define        src   arg3
+%define dest1 arg4
+
+%define vec_i tmp2
+%define ptr   tmp3
+%define dest2 tmp4
+%define pos   return
+
+%ifndef EC_ALIGNED_ADDR
+;;; Use Un-aligned load/store
+ %define XLDR vmovdqu
+ %define XSTR vmovdqu
+%else
+
+;;; Use Non-temporal load/stor
+ %ifdef NO_NT_LDST
+  %define XLDR vmovdqa
+  %define XSTR vmovdqa
+ %else
+  %define XLDR vmovntdqa
+  %define XSTR vmovntdq
+ %endif
+%endif
+
+
+default rel
+
+[bits 64]
+section .text
+
+%define xmask0f   ymm8
+%define xmask0fx  xmm8
+%define xgft1_lo  ymm7
+%define xgft1_hi  ymm6
+%define xgft2_lo  ymm5
+%define xgft2_hi  ymm4
+
+%define x0     ymm0
+%define xtmpa  ymm1
+%define xp1    ymm2
+%define xp2    ymm3
+
+align 16
+global gf_2vect_dot_prod_avx2:function
+
+func(gf_2vect_dot_prod_avx2)
+       FUNC_SAVE
+       sub     len, 32
+       jl      .return_fail
+       xor     pos, pos
+       mov     tmp.b, 0x0f
+       vpinsrb xmask0fx, xmask0fx, tmp.w, 0
+       vpbroadcastb xmask0f, xmask0fx  ;Construct mask 0x0f0f0f...
+
+       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
+       mov     dest2, [dest1+PS]
+       mov     dest1, [dest1]
+
+.loop32
+       vpxor   xp1, xp1
+       vpxor   xp2, xp2
+       mov     tmp, mul_array
+       xor     vec_i, vec_i
+
+.next_vect
+       mov     ptr, [src+vec_i]
+
+       vmovdqu xgft1_lo, [tmp]         ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
+                                       ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
+       vperm2i128 xgft1_hi, xgft1_lo, xgft1_lo, 0x11 ; swapped to hi | hi
+       vperm2i128 xgft1_lo, xgft1_lo, xgft1_lo, 0x00 ; swapped to lo | lo
+
+       vmovdqu xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
+                                               ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
+       vperm2i128 xgft2_hi, xgft2_lo, xgft2_lo, 0x11 ; swapped to hi | hi
+       vperm2i128 xgft2_lo, xgft2_lo, xgft2_lo, 0x00 ; swapped to lo | lo
+
+
+       XLDR    x0, [ptr+pos]           ;Get next source vector
+       add     tmp, 32
+       add     vec_i, PS
+
+       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
+       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
+       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
+
+       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
+       vpxor   xp1, xgft1_hi           ;xp1 += partial
+
+       vpshufb xgft2_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft2_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft2_hi, xgft2_lo      ;GF add high and low partials
+       vpxor   xp2, xgft2_hi           ;xp2 += partial
+
+       cmp     vec_i, vec
+       jl      .next_vect
+
+       XSTR    [dest1+pos], xp1
+       XSTR    [dest2+pos], xp2
+
+       add     pos, 32                 ;Loop on 32 bytes at a time
+       cmp     pos, len
+       jle     .loop32
+
+       lea     tmp, [len + 32]
+       cmp     pos, tmp
+       je      .return_pass
+
+       ;; Tail len
+       mov     pos, len        ;Overlapped offset length-16
+       jmp     .loop32         ;Do one more overlap pass
+
+.return_pass:
+       mov     return, 0
+       FUNC_RESTORE
+       ret
+
+.return_fail:
+       mov     return, 1
+       FUNC_RESTORE
+       ret
+
+endproc_frame
+
+section .data
+
+%macro slversion 4
+global %1_slver_%2%3%4
+global %1_slver
+%1_slver:
+%1_slver_%2%3%4:
+       dw 0x%4
+       db 0x%3, 0x%2
+%endmacro
+;;;       func                   core, ver, snum
+slversion gf_2vect_dot_prod_avx2, 04,  03,  0196

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_dot_prod_sse.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_dot_prod_sse.asm.s
new file mode 100644 (file)
index 0000000..2520f9f
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/erasure_code/gf_2vect_dot_prod_sse.asm.s
@@ -0,0 +1,236 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;;;
+;;; gf_2vect_dot_prod_sse(len, vec, *g_tbls, **buffs, **dests);
+;;;
+;;; Author: Gregory Tucker
+
+
+%ifidn __OUTPUT_FORMAT__, elf64
+ %define arg0  rdi
+ %define arg1  rsi
+ %define arg2  rdx
+ %define arg3  rcx
+ %define arg4  r8
+ %define arg5  r9
+
+ %define tmp   r11
+ %define tmp2  r10
+ %define tmp3  r9
+ %define tmp4  r12             ; must be saved and restored
+ %define return rax
+ %define PS 8
+ %define LOG_PS 3
+
+ %define func(x) x:
+ %macro FUNC_SAVE 0
+       push    r12
+ %endmacro
+ %macro FUNC_RESTORE 0
+       pop     r12
+ %endmacro
+%endif
+
+%ifidn __OUTPUT_FORMAT__, win64
+ %define arg0   rcx
+ %define arg1   rdx
+ %define arg2   r8
+ %define arg3   r9
+
+ %define arg4   r12            ; must be saved, loaded and restored
+ %define tmp    r11
+ %define tmp2   r10
+ %define tmp3   r13            ; must be saved and restored
+ %define tmp4   r14            ; must be saved and restored
+ %define return rax
+ %define PS     8
+ %define LOG_PS 3
+ %define stack_size  3*16 + 3*8        ; must be an odd multiple of 8
+ %define arg(x)      [rsp + stack_size + PS + PS*x]
+
+ %define func(x) proc_frame x
+ %macro FUNC_SAVE 0
+       alloc_stack     stack_size
+       save_xmm128     xmm6, 0*16
+       save_xmm128     xmm7, 1*16
+       save_xmm128     xmm8, 2*16
+       save_reg        r12,  3*16 + 0*8
+       save_reg        r13,  3*16 + 1*8
+       save_reg        r14,  3*16 + 2*8
+       end_prolog
+       mov     arg4, arg(4)
+ %endmacro
+
+ %macro FUNC_RESTORE 0
+       movdqa  xmm6, [rsp + 0*16]
+       movdqa  xmm7, [rsp + 1*16]
+       movdqa  xmm8, [rsp + 2*16]
+       mov     r12,  [rsp + 3*16 + 0*8]
+       mov     r13,  [rsp + 3*16 + 1*8]
+       mov     r14,  [rsp + 3*16 + 2*8]
+       add     rsp, stack_size
+ %endmacro
+%endif
+
+%define len   arg0
+%define vec   arg1
+%define mul_array arg2
+%define        src   arg3
+%define dest1 arg4
+
+%define vec_i tmp2
+%define ptr   tmp3
+%define dest2 tmp4
+%define pos   return
+
+%ifndef EC_ALIGNED_ADDR
+;;; Use Un-aligned load/store
+ %define XLDR movdqu
+ %define XSTR movdqu
+%else
+
+;;; Use Non-temporal load/stor
+ %ifdef NO_NT_LDST
+  %define XLDR movdqa
+  %define XSTR movdqa
+ %else
+  %define XLDR movntdqa
+  %define XSTR movntdq
+ %endif
+%endif
+
+
+default rel
+
+[bits 64]
+section .text
+
+%define xmask0f   xmm8
+%define xgft1_lo  xmm7
+%define xgft1_hi  xmm6
+%define xgft2_lo  xmm5
+%define xgft2_hi  xmm4
+
+%define x0     xmm0
+%define xtmpa  xmm1
+%define xp1    xmm2
+%define xp2    xmm3
+
+align 16
+global gf_2vect_dot_prod_sse:function
+
+func(gf_2vect_dot_prod_sse)
+       FUNC_SAVE
+       sub     len, 16
+       jl      .return_fail
+       xor     pos, pos
+       movdqa  xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
+       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
+       mov     dest2, [dest1+PS]
+       mov     dest1, [dest1]
+
+.loop16
+       pxor    xp1, xp1
+       pxor    xp2, xp2
+       mov     tmp, mul_array
+       xor     vec_i, vec_i
+
+.next_vect
+       mov     ptr, [src+vec_i]
+
+       movdqu  xgft1_lo, [tmp]         ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
+       movdqu  xgft1_hi, [tmp+16]      ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
+       movdqu  xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
+       movdqu  xgft2_hi, [tmp+vec*(32/PS)+16]  ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
+
+       XLDR    x0, [ptr+pos]           ;Get next source vector
+       add     tmp, 32
+       add     vec_i, PS
+
+       movdqa  xtmpa, x0               ;Keep unshifted copy of src
+       psraw   x0, 4                   ;Shift to put high nibble into bits 4-0
+       pand    x0, xmask0f             ;Mask high src nibble in bits 4-0
+       pand    xtmpa, xmask0f          ;Mask low src nibble in bits 4-0
+
+       pshufb  xgft1_hi, x0            ;Lookup mul table of high nibble
+       pshufb  xgft1_lo, xtmpa         ;Lookup mul table of low nibble
+       pxor    xgft1_hi, xgft1_lo      ;GF add high and low partials
+       pxor    xp1, xgft1_hi           ;xp1 += partial
+
+       pshufb  xgft2_hi, x0            ;Lookup mul table of high nibble
+       pshufb  xgft2_lo, xtmpa         ;Lookup mul table of low nibble
+       pxor    xgft2_hi, xgft2_lo      ;GF add high and low partials
+       pxor    xp2, xgft2_hi           ;xp2 += partial
+
+       cmp     vec_i, vec
+       jl      .next_vect
+
+       XSTR    [dest1+pos], xp1
+       XSTR    [dest2+pos], xp2
+
+       add     pos, 16                 ;Loop on 16 bytes at a time
+       cmp     pos, len
+       jle     .loop16
+
+       lea     tmp, [len + 16]
+       cmp     pos, tmp
+       je      .return_pass
+
+       ;; Tail len
+       mov     pos, len        ;Overlapped offset length-16
+       jmp     .loop16         ;Do one more overlap pass
+
+.return_pass:
+       mov     return, 0
+       FUNC_RESTORE
+       ret
+
+.return_fail:
+       mov     return, 1
+       FUNC_RESTORE
+       ret
+
+endproc_frame
+
+section .data
+
+align 16
+mask0f: ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
+
+%macro slversion 4
+global %1_slver_%2%3%4
+global %1_slver
+%1_slver:
+%1_slver_%2%3%4:
+       dw 0x%4
+       db 0x%3, 0x%2
+%endmacro
+;;;       func                  core, ver, snum
+slversion gf_2vect_dot_prod_sse, 00,  02,  0062

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_dot_prod_avx.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_dot_prod_avx.asm.s
new file mode 100644 (file)
index 0000000..3c82160
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_dot_prod_avx.asm.s
@@ -0,0 +1,258 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;;;
+;;; gf_3vect_dot_prod_avx(len, vec, *g_tbls, **buffs, **dests);
+;;;
+;;; Author: Gregory Tucker
+
+
+%ifidn __OUTPUT_FORMAT__, elf64
+ %define arg0  rdi
+ %define arg1  rsi
+ %define arg2  rdx
+ %define arg3  rcx
+ %define arg4  r8
+ %define arg5  r9
+
+ %define tmp   r11
+ %define tmp2  r10
+ %define tmp3  r13             ; must be saved and restored
+ %define tmp4  r12             ; must be saved and restored
+ %define return rax
+ %define PS 8
+ %define LOG_PS 3
+
+ %define func(x) x:
+ %macro FUNC_SAVE 0
+       push    r12
+       push    r13
+ %endmacro
+ %macro FUNC_RESTORE 0
+       pop     r13
+       pop     r12
+ %endmacro
+%endif
+
+%ifidn __OUTPUT_FORMAT__, win64
+ %define arg0   rcx
+ %define arg1   rdx
+ %define arg2   r8
+ %define arg3   r9
+
+ %define arg4   r12            ; must be saved, loaded and restored
+ %define arg5   r15            ; must be saved and restored
+ %define tmp    r11
+ %define tmp2   r10
+ %define tmp3   r13            ; must be saved and restored
+ %define tmp4   r14            ; must be saved and restored
+ %define return rax
+ %define PS     8
+ %define LOG_PS 3
+ %define stack_size  6*16 + 5*8        ; must be an odd multiple of 8
+ %define arg(x)      [rsp + stack_size + PS + PS*x]
+
+ %define func(x) proc_frame x
+ %macro FUNC_SAVE 0
+       alloc_stack     stack_size
+       save_xmm128     xmm6, 0*16
+       save_xmm128     xmm7, 1*16
+       save_xmm128     xmm8, 2*16
+       save_xmm128     xmm9, 3*16
+       save_xmm128     xmm10, 4*16
+       save_xmm128     xmm11, 5*16
+       save_reg        r12,  6*16 + 0*8
+       save_reg        r13,  6*16 + 1*8
+       save_reg        r14,  6*16 + 2*8
+       save_reg        r15,  6*16 + 3*8
+       end_prolog
+       mov     arg4, arg(4)
+ %endmacro
+
+ %macro FUNC_RESTORE 0
+       vmovdqa xmm6, [rsp + 0*16]
+       vmovdqa xmm7, [rsp + 1*16]
+       vmovdqa xmm8, [rsp + 2*16]
+       vmovdqa xmm9, [rsp + 3*16]
+       vmovdqa xmm10, [rsp + 4*16]
+       vmovdqa xmm11, [rsp + 5*16]
+       mov     r12,  [rsp + 6*16 + 0*8]
+       mov     r13,  [rsp + 6*16 + 1*8]
+       mov     r14,  [rsp + 6*16 + 2*8]
+       mov     r15,  [rsp + 6*16 + 3*8]
+       add     rsp, stack_size
+ %endmacro
+%endif
+
+%define len   arg0
+%define vec   arg1
+%define mul_array arg2
+%define        src   arg3
+%define dest1 arg4
+%define ptr   arg5
+%define vec_i tmp2
+%define dest2 tmp3
+%define dest3 tmp4
+%define pos   return
+
+%ifndef EC_ALIGNED_ADDR
+;;; Use Un-aligned load/store
+ %define XLDR vmovdqu
+ %define XSTR vmovdqu
+%else
+;;; Use Non-temporal load/stor
+ %ifdef NO_NT_LDST
+  %define XLDR vmovdqa
+  %define XSTR vmovdqa
+ %else
+  %define XLDR vmovntdqa
+  %define XSTR vmovntdq
+ %endif
+%endif
+
+
+default rel
+
+[bits 64]
+section .text
+
+%define xmask0f   xmm11
+%define xgft1_lo  xmm10
+%define xgft1_hi  xmm9
+%define xgft2_lo  xmm8
+%define xgft2_hi  xmm7
+%define xgft3_lo  xmm6
+%define xgft3_hi  xmm5
+
+%define x0     xmm0
+%define xtmpa  xmm1
+%define xp1    xmm2
+%define xp2    xmm3
+%define xp3    xmm4
+
+align 16
+global gf_3vect_dot_prod_avx:function
+func(gf_3vect_dot_prod_avx)
+       FUNC_SAVE
+       sub     len, 16
+       jl      .return_fail
+       xor     pos, pos
+       vmovdqa xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
+       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
+       mov     dest2, [dest1+PS]
+       mov     dest3, [dest1+2*PS]
+       mov     dest1, [dest1]
+
+
+.loop16:
+       vpxor   xp1, xp1
+       vpxor   xp2, xp2
+       vpxor   xp3, xp3
+       mov     tmp, mul_array
+       xor     vec_i, vec_i
+
+.next_vect:
+       mov     ptr, [src+vec_i]
+
+       vmovdqu xgft1_lo, [tmp]         ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
+       vmovdqu xgft1_hi, [tmp+16]      ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
+       vmovdqu xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
+       vmovdqu xgft2_hi, [tmp+vec*(32/PS)+16]  ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
+       vmovdqu xgft3_lo, [tmp+vec*(64/PS)]     ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
+       vmovdqu xgft3_hi, [tmp+vec*(64/PS)+16]  ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
+
+       add     tmp, 32
+       add     vec_i, PS
+       XLDR    x0, [ptr+pos]           ;Get next source vector
+
+       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
+       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
+       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
+
+       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
+       vpxor   xp1, xgft1_hi           ;xp1 += partial
+
+       vpshufb xgft2_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft2_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft2_hi, xgft2_lo      ;GF add high and low partials
+       vpxor   xp2, xgft2_hi           ;xp2 += partial
+
+       vpshufb xgft3_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft3_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft3_hi, xgft3_lo      ;GF add high and low partials
+       vpxor   xp3, xgft3_hi           ;xp3 += partial
+
+       cmp     vec_i, vec
+       jl      .next_vect
+
+       XSTR    [dest1+pos], xp1
+       XSTR    [dest2+pos], xp2
+       XSTR    [dest3+pos], xp3
+
+       add     pos, 16                 ;Loop on 16 bytes at a time
+       cmp     pos, len
+       jle     .loop16
+
+       lea     tmp, [len + 16]
+       cmp     pos, tmp
+       je      .return_pass
+
+       ;; Tail len
+       mov     pos, len        ;Overlapped offset length-16
+       jmp     .loop16         ;Do one more overlap pass
+
+.return_pass:
+       mov     return, 0
+       FUNC_RESTORE
+       ret
+
+.return_fail:
+       mov     return, 1
+       FUNC_RESTORE
+       ret
+
+endproc_frame
+
+section .data
+
+align 16
+mask0f: ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
+
+%macro slversion 4
+global %1_slver_%2%3%4
+global %1_slver
+%1_slver:
+%1_slver_%2%3%4:
+       dw 0x%4
+       db 0x%3, 0x%2
+%endmacro
+;;;       func                  core, ver, snum
+slversion gf_3vect_dot_prod_avx, 02,  03,  0192

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_dot_prod_avx2.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_dot_prod_avx2.asm.s
new file mode 100644 (file)
index 0000000..bff6e75
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_dot_prod_avx2.asm.s
@@ -0,0 +1,271 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;;;
+;;; gf_3vect_dot_prod_avx2(len, vec, *g_tbls, **buffs, **dests);
+;;;
+;;; Author: Gregory Tucker
+
+
+%ifidn __OUTPUT_FORMAT__, elf64
+ %define arg0  rdi
+ %define arg1  rsi
+ %define arg2  rdx
+ %define arg3  rcx
+ %define arg4  r8
+ %define arg5  r9
+
+ %define tmp   r11
+ %define tmp.w r11d
+ %define tmp.b r11b
+ %define tmp2  r10
+ %define tmp3  r13             ; must be saved and restored
+ %define tmp4  r12             ; must be saved and restored
+ %define return rax
+ %define PS 8
+ %define LOG_PS 3
+
+ %define func(x) x:
+ %macro FUNC_SAVE 0
+       push    r12
+       push    r13
+ %endmacro
+ %macro FUNC_RESTORE 0
+       pop     r13
+       pop     r12
+ %endmacro
+%endif
+
+%ifidn __OUTPUT_FORMAT__, win64
+ %define arg0   rcx
+ %define arg1   rdx
+ %define arg2   r8
+ %define arg3   r9
+
+ %define arg4   r12            ; must be saved, loaded and restored
+ %define arg5   r15            ; must be saved and restored
+ %define tmp    r11
+ %define tmp.w  r11d
+ %define tmp.b  r11b
+ %define tmp2   r10
+ %define tmp3   r13            ; must be saved and restored
+ %define tmp4   r14            ; must be saved and restored
+ %define return rax
+ %define PS     8
+ %define LOG_PS 3
+ %define stack_size  6*16 + 5*8        ; must be an odd multiple of 8
+ %define arg(x)      [rsp + stack_size + PS + PS*x]
+
+ %define func(x) proc_frame x
+ %macro FUNC_SAVE 0
+       alloc_stack     stack_size
+       vmovdqa [rsp + 0*16], xmm6
+       vmovdqa [rsp + 1*16], xmm7
+       vmovdqa [rsp + 2*16], xmm8
+       vmovdqa [rsp + 3*16], xmm9
+       vmovdqa [rsp + 4*16], xmm10
+       vmovdqa [rsp + 5*16], xmm11
+       save_reg        r12,  6*16 + 0*8
+       save_reg        r13,  6*16 + 1*8
+       save_reg        r14,  6*16 + 2*8
+       save_reg        r15,  6*16 + 3*8
+       end_prolog
+       mov     arg4, arg(4)
+ %endmacro
+
+ %macro FUNC_RESTORE 0
+       vmovdqa xmm6, [rsp + 0*16]
+       vmovdqa xmm7, [rsp + 1*16]
+       vmovdqa xmm8, [rsp + 2*16]
+       vmovdqa xmm9, [rsp + 3*16]
+       vmovdqa xmm10, [rsp + 4*16]
+       vmovdqa xmm11, [rsp + 5*16]
+       mov     r12,  [rsp + 6*16 + 0*8]
+       mov     r13,  [rsp + 6*16 + 1*8]
+       mov     r14,  [rsp + 6*16 + 2*8]
+       mov     r15,  [rsp + 6*16 + 3*8]
+       add     rsp, stack_size
+ %endmacro
+%endif
+
+%define len   arg0
+%define vec   arg1
+%define mul_array arg2
+%define        src   arg3
+%define dest1 arg4
+%define ptr   arg5
+%define vec_i tmp2
+%define dest2 tmp3
+%define dest3 tmp4
+%define pos   return
+
+%ifndef EC_ALIGNED_ADDR
+;;; Use Un-aligned load/store
+ %define XLDR vmovdqu
+ %define XSTR vmovdqu
+%else
+;;; Use Non-temporal load/stor
+ %ifdef NO_NT_LDST
+  %define XLDR vmovdqa
+  %define XSTR vmovdqa
+ %else
+  %define XLDR vmovntdqa
+  %define XSTR vmovntdq
+ %endif
+%endif
+
+
+default rel
+
+[bits 64]
+section .text
+
+%define xmask0f   ymm11
+%define xmask0fx  xmm11
+%define xgft1_lo  ymm10
+%define xgft1_hi  ymm9
+%define xgft2_lo  ymm8
+%define xgft2_hi  ymm7
+%define xgft3_lo  ymm6
+%define xgft3_hi  ymm5
+
+%define x0     ymm0
+%define xtmpa  ymm1
+%define xp1    ymm2
+%define xp2    ymm3
+%define xp3    ymm4
+
+align 16
+global gf_3vect_dot_prod_avx2:function
+func(gf_3vect_dot_prod_avx2)
+       FUNC_SAVE
+       sub     len, 32
+       jl      .return_fail
+       xor     pos, pos
+       mov     tmp.b, 0x0f
+       vpinsrb xmask0fx, xmask0fx, tmp.w, 0
+       vpbroadcastb xmask0f, xmask0fx  ;Construct mask 0x0f0f0f...
+
+       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
+       mov     dest2, [dest1+PS]
+       mov     dest3, [dest1+2*PS]
+       mov     dest1, [dest1]
+
+
+.loop32:
+       vpxor   xp1, xp1
+       vpxor   xp2, xp2
+       vpxor   xp3, xp3
+       mov     tmp, mul_array
+       xor     vec_i, vec_i
+
+.next_vect:
+       mov     ptr, [src+vec_i]
+
+       vmovdqu xgft1_lo, [tmp]         ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
+                                       ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
+       vperm2i128 xgft1_hi, xgft1_lo, xgft1_lo, 0x11 ; swapped to hi | hi
+       vperm2i128 xgft1_lo, xgft1_lo, xgft1_lo, 0x00 ; swapped to lo | lo
+
+       vmovdqu xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
+                                               ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
+       vperm2i128 xgft2_hi, xgft2_lo, xgft2_lo, 0x11 ; swapped to hi | hi
+       vperm2i128 xgft2_lo, xgft2_lo, xgft2_lo, 0x00 ; swapped to lo | lo
+
+       vmovdqu xgft3_lo, [tmp+vec*(64/PS)]     ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
+                                               ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
+       vperm2i128 xgft3_hi, xgft3_lo, xgft3_lo, 0x11 ; swapped to hi | hi
+       vperm2i128 xgft3_lo, xgft3_lo, xgft3_lo, 0x00 ; swapped to lo | lo
+
+       add     tmp, 32
+       add     vec_i, PS
+       XLDR    x0, [ptr+pos]           ;Get next source vector
+
+       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
+       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
+       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
+
+       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
+       vpxor   xp1, xgft1_hi           ;xp1 += partial
+
+       vpshufb xgft2_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft2_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft2_hi, xgft2_lo      ;GF add high and low partials
+       vpxor   xp2, xgft2_hi           ;xp2 += partial
+
+       vpshufb xgft3_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft3_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft3_hi, xgft3_lo      ;GF add high and low partials
+       vpxor   xp3, xgft3_hi           ;xp3 += partial
+
+       cmp     vec_i, vec
+       jl      .next_vect
+
+       XSTR    [dest1+pos], xp1
+       XSTR    [dest2+pos], xp2
+       XSTR    [dest3+pos], xp3
+
+       add     pos, 32                 ;Loop on 32 bytes at a time
+       cmp     pos, len
+       jle     .loop32
+
+       lea     tmp, [len + 32]
+       cmp     pos, tmp
+       je      .return_pass
+
+       ;; Tail len
+       mov     pos, len        ;Overlapped offset length-16
+       jmp     .loop32         ;Do one more overlap pass
+
+.return_pass:
+       mov     return, 0
+       FUNC_RESTORE
+       ret
+
+.return_fail:
+       mov     return, 1
+       FUNC_RESTORE
+       ret
+
+endproc_frame
+
+section .data
+
+%macro slversion 4
+global %1_slver_%2%3%4
+global %1_slver
+%1_slver:
+%1_slver_%2%3%4:
+       dw 0x%4
+       db 0x%3, 0x%2
+%endmacro
+;;;       func                   core, ver, snum
+slversion gf_3vect_dot_prod_avx2, 04,  03,  0197

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_dot_prod_sse.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_dot_prod_sse.asm.s
new file mode 100644 (file)
index 0000000..0436c11
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/erasure_code/gf_3vect_dot_prod_sse.asm.s
@@ -0,0 +1,259 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;;;
+;;; gf_3vect_dot_prod_sse(len, vec, *g_tbls, **buffs, **dests);
+;;;
+;;; Author: Gregory Tucker
+
+
+%ifidn __OUTPUT_FORMAT__, elf64
+ %define arg0  rdi
+ %define arg1  rsi
+ %define arg2  rdx
+ %define arg3  rcx
+ %define arg4  r8
+ %define arg5  r9
+
+ %define tmp   r11
+ %define tmp2  r10
+ %define tmp3  r13             ; must be saved and restored
+ %define tmp4  r12             ; must be saved and restored
+ %define return rax
+ %define PS 8
+ %define LOG_PS 3
+
+ %define func(x) x:
+ %macro FUNC_SAVE 0
+       push    r12
+       push    r13
+ %endmacro
+ %macro FUNC_RESTORE 0
+       pop     r13
+       pop     r12
+ %endmacro
+%endif
+
+%ifidn __OUTPUT_FORMAT__, win64
+ %define arg0   rcx
+ %define arg1   rdx
+ %define arg2   r8
+ %define arg3   r9
+
+ %define arg4   r12            ; must be saved, loaded and restored
+ %define arg5   r15            ; must be saved and restored
+ %define tmp    r11
+ %define tmp2   r10
+ %define tmp3   r13            ; must be saved and restored
+ %define tmp4   r14            ; must be saved and restored
+ %define return rax
+ %define PS     8
+ %define LOG_PS 3
+ %define stack_size  6*16 + 5*8        ; must be an odd multiple of 8
+ %define arg(x)      [rsp + stack_size + PS + PS*x]
+
+ %define func(x) proc_frame x
+ %macro FUNC_SAVE 0
+       alloc_stack     stack_size
+       save_xmm128     xmm6, 0*16
+       save_xmm128     xmm7, 1*16
+       save_xmm128     xmm8, 2*16
+       save_xmm128     xmm9, 3*16
+       save_xmm128     xmm10, 4*16
+       save_xmm128     xmm11, 5*16
+       save_reg        r12,  6*16 + 0*8
+       save_reg        r13,  6*16 + 1*8
+       save_reg        r14,  6*16 + 2*8
+       save_reg        r15,  6*16 + 3*8
+       end_prolog
+       mov     arg4, arg(4)
+ %endmacro
+
+ %macro FUNC_RESTORE 0
+       movdqa  xmm6, [rsp + 0*16]
+       movdqa  xmm7, [rsp + 1*16]
+       movdqa  xmm8, [rsp + 2*16]
+       movdqa  xmm9, [rsp + 3*16]
+       movdqa  xmm10, [rsp + 4*16]
+       movdqa  xmm11, [rsp + 5*16]
+       mov     r12,  [rsp + 6*16 + 0*8]
+       mov     r13,  [rsp + 6*16 + 1*8]
+       mov     r14,  [rsp + 6*16 + 2*8]
+       mov     r15,  [rsp + 6*16 + 3*8]
+       add     rsp, stack_size
+ %endmacro
+%endif
+
+%define len   arg0
+%define vec   arg1
+%define mul_array arg2
+%define        src   arg3
+%define dest1 arg4
+%define ptr   arg5
+%define vec_i tmp2
+%define dest2 tmp3
+%define dest3 tmp4
+%define pos   return
+
+%ifndef EC_ALIGNED_ADDR
+;;; Use Un-aligned load/store
+ %define XLDR movdqu
+ %define XSTR movdqu
+%else
+;;; Use Non-temporal load/stor
+ %ifdef NO_NT_LDST
+  %define XLDR movdqa
+  %define XSTR movdqa
+ %else
+  %define XLDR movntdqa
+  %define XSTR movntdq
+ %endif
+%endif
+
+
+default rel
+
+[bits 64]
+section .text
+
+%define xmask0f   xmm11
+%define xgft1_lo  xmm10
+%define xgft1_hi  xmm9
+%define xgft2_lo  xmm8
+%define xgft2_hi  xmm7
+%define xgft3_lo  xmm6
+%define xgft3_hi  xmm5
+
+%define x0     xmm0
+%define xtmpa  xmm1
+%define xp1    xmm2
+%define xp2    xmm3
+%define xp3    xmm4
+
+align 16
+global gf_3vect_dot_prod_sse:function
+func(gf_3vect_dot_prod_sse)
+       FUNC_SAVE
+       sub     len, 16
+       jl      .return_fail
+       xor     pos, pos
+       movdqa  xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
+       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
+       mov     dest2, [dest1+PS]
+       mov     dest3, [dest1+2*PS]
+       mov     dest1, [dest1]
+
+
+.loop16:
+       pxor    xp1, xp1
+       pxor    xp2, xp2
+       pxor    xp3, xp3
+       mov     tmp, mul_array
+       xor     vec_i, vec_i
+
+.next_vect:
+       mov     ptr, [src+vec_i]
+
+       movdqu  xgft1_lo, [tmp]         ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
+       movdqu  xgft1_hi, [tmp+16]      ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
+       movdqu  xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
+       movdqu  xgft2_hi, [tmp+vec*(32/PS)+16]  ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
+       movdqu  xgft3_lo, [tmp+vec*(64/PS)]     ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
+       movdqu  xgft3_hi, [tmp+vec*(64/PS)+16]  ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
+
+       add     tmp, 32
+       add     vec_i, PS
+       XLDR    x0, [ptr+pos]           ;Get next source vector
+
+       movdqa  xtmpa, x0               ;Keep unshifted copy of src
+       psraw   x0, 4                   ;Shift to put high nibble into bits 4-0
+       pand    x0, xmask0f             ;Mask high src nibble in bits 4-0
+       pand    xtmpa, xmask0f          ;Mask low src nibble in bits 4-0
+
+       pshufb  xgft1_hi, x0            ;Lookup mul table of high nibble
+       pshufb  xgft1_lo, xtmpa         ;Lookup mul table of low nibble
+       pxor    xgft1_hi, xgft1_lo      ;GF add high and low partials
+       pxor    xp1, xgft1_hi           ;xp1 += partial
+
+       pshufb  xgft2_hi, x0            ;Lookup mul table of high nibble
+       pshufb  xgft2_lo, xtmpa         ;Lookup mul table of low nibble
+       pxor    xgft2_hi, xgft2_lo      ;GF add high and low partials
+       pxor    xp2, xgft2_hi           ;xp2 += partial
+
+       pshufb  xgft3_hi, x0            ;Lookup mul table of high nibble
+       pshufb  xgft3_lo, xtmpa         ;Lookup mul table of low nibble
+       pxor    xgft3_hi, xgft3_lo      ;GF add high and low partials
+       pxor    xp3, xgft3_hi           ;xp3 += partial
+
+       cmp     vec_i, vec
+       jl      .next_vect
+
+       XSTR    [dest1+pos], xp1
+       XSTR    [dest2+pos], xp2
+       XSTR    [dest3+pos], xp3
+
+       add     pos, 16                 ;Loop on 16 bytes at a time
+       cmp     pos, len
+       jle     .loop16
+
+       lea     tmp, [len + 16]
+       cmp     pos, tmp
+       je      .return_pass
+
+       ;; Tail len
+       mov     pos, len        ;Overlapped offset length-16
+       jmp     .loop16         ;Do one more overlap pass
+
+.return_pass:
+       mov     return, 0
+       FUNC_RESTORE
+       ret
+
+.return_fail:
+       mov     return, 1
+       FUNC_RESTORE
+       ret
+
+endproc_frame
+
+section .data
+
+align 16
+mask0f: ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
+
+%macro slversion 4
+global %1_slver_%2%3%4
+global %1_slver
+%1_slver:
+%1_slver_%2%3%4:
+       dw 0x%4
+       db 0x%3, 0x%2
+%endmacro
+;;;       func                  core, ver, snum
+slversion gf_3vect_dot_prod_sse, 00,  03,  0063

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_dot_prod_avx.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_dot_prod_avx.asm.s
new file mode 100644 (file)
index 0000000..c621d32
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_dot_prod_avx.asm.s
@@ -0,0 +1,296 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;;;
+;;; gf_4vect_dot_prod_avx(len, vec, *g_tbls, **buffs, **dests);
+;;;
+;;; Author: Gregory Tucker
+
+
+%ifidn __OUTPUT_FORMAT__, elf64
+ %define arg0  rdi
+ %define arg1  rsi
+ %define arg2  rdx
+ %define arg3  rcx
+ %define arg4  r8
+ %define arg5  r9
+
+ %define tmp   r11
+ %define tmp2  r10
+ %define tmp3  r13             ; must be saved and restored
+ %define tmp4  r12             ; must be saved and restored
+ %define tmp5  r14             ; must be saved and restored
+ %define tmp6  r15             ; must be saved and restored
+ %define return rax
+ %define PS 8
+ %define LOG_PS 3
+
+ %define func(x) x:
+ %macro FUNC_SAVE 0
+       push    r12
+       push    r13
+       push    r14
+       push    r15
+ %endmacro
+ %macro FUNC_RESTORE 0
+       pop     r15
+       pop     r14
+       pop     r13
+       pop     r12
+ %endmacro
+%endif
+
+%ifidn __OUTPUT_FORMAT__, win64
+ %define arg0   rcx
+ %define arg1   rdx
+ %define arg2   r8
+ %define arg3   r9
+
+ %define arg4   r12            ; must be saved, loaded and restored
+ %define arg5   r15            ; must be saved and restored
+ %define tmp    r11
+ %define tmp2   r10
+ %define tmp3   r13            ; must be saved and restored
+ %define tmp4   r14            ; must be saved and restored
+ %define tmp5   rdi            ; must be saved and restored
+ %define tmp6   rsi            ; must be saved and restored
+ %define return rax
+ %define PS     8
+ %define LOG_PS 3
+ %define stack_size  9*16 + 7*8                ; must be an odd multiple of 8
+ %define arg(x)      [rsp + stack_size + PS + PS*x]
+
+ %define func(x) proc_frame x
+ %macro FUNC_SAVE 0
+       alloc_stack     stack_size
+       save_xmm128     xmm6, 0*16
+       save_xmm128     xmm7, 1*16
+       save_xmm128     xmm8, 2*16
+       save_xmm128     xmm9, 3*16
+       save_xmm128     xmm10, 4*16
+       save_xmm128     xmm11, 5*16
+       save_xmm128     xmm12, 6*16
+       save_xmm128     xmm13, 7*16
+       save_xmm128     xmm14, 8*16
+       save_reg        r12,  9*16 + 0*8
+       save_reg        r13,  9*16 + 1*8
+       save_reg        r14,  9*16 + 2*8
+       save_reg        r15,  9*16 + 3*8
+       save_reg        rdi,  9*16 + 4*8
+       save_reg        rsi,  9*16 + 5*8
+       end_prolog
+       mov     arg4, arg(4)
+ %endmacro
+
+ %macro FUNC_RESTORE 0
+       vmovdqa xmm6, [rsp + 0*16]
+       vmovdqa xmm7, [rsp + 1*16]
+       vmovdqa xmm8, [rsp + 2*16]
+       vmovdqa xmm9, [rsp + 3*16]
+       vmovdqa xmm10, [rsp + 4*16]
+       vmovdqa xmm11, [rsp + 5*16]
+       vmovdqa xmm12, [rsp + 6*16]
+       vmovdqa xmm13, [rsp + 7*16]
+       vmovdqa xmm14, [rsp + 8*16]
+       mov     r12,  [rsp + 9*16 + 0*8]
+       mov     r13,  [rsp + 9*16 + 1*8]
+       mov     r14,  [rsp + 9*16 + 2*8]
+       mov     r15,  [rsp + 9*16 + 3*8]
+       mov     rdi,  [rsp + 9*16 + 4*8]
+       mov     rsi,  [rsp + 9*16 + 5*8]
+       add     rsp, stack_size
+ %endmacro
+%endif
+
+
+%define len    arg0
+%define vec    arg1
+%define mul_array arg2
+%define        src    arg3
+%define dest1  arg4
+%define ptr    arg5
+%define vec_i  tmp2
+%define dest2  tmp3
+%define dest3  tmp4
+%define dest4  tmp5
+%define vskip3 tmp6
+%define pos   return
+
+%ifndef EC_ALIGNED_ADDR
+;;; Use Un-aligned load/store
+ %define XLDR vmovdqu
+ %define XSTR vmovdqu
+%else
+;;; Use Non-temporal load/stor
+ %ifdef NO_NT_LDST
+  %define XLDR vmovdqa
+  %define XSTR vmovdqa
+ %else
+  %define XLDR vmovntdqa
+  %define XSTR vmovntdq
+ %endif
+%endif
+
+
+default rel
+
+[bits 64]
+section .text
+
+%define xmask0f   xmm14
+%define xgft1_lo  xmm13
+%define xgft1_hi  xmm12
+%define xgft2_lo  xmm11
+%define xgft2_hi  xmm10
+%define xgft3_lo  xmm9
+%define xgft3_hi  xmm8
+%define xgft4_lo  xmm7
+%define xgft4_hi  xmm6
+
+
+%define x0     xmm0
+%define xtmpa  xmm1
+%define xp1    xmm2
+%define xp2    xmm3
+%define xp3    xmm4
+%define xp4    xmm5
+
+align 16
+global gf_4vect_dot_prod_avx:function
+func(gf_4vect_dot_prod_avx)
+       FUNC_SAVE
+       sub     len, 16
+       jl      .return_fail
+       xor     pos, pos
+       vmovdqa xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
+       mov     vskip3, vec
+       imul    vskip3, 96
+       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
+       mov     dest2, [dest1+PS]
+       mov     dest3, [dest1+2*PS]
+       mov     dest4, [dest1+3*PS]
+       mov     dest1, [dest1]
+
+
+.loop16:
+       vpxor   xp1, xp1
+       vpxor   xp2, xp2
+       vpxor   xp3, xp3
+       vpxor   xp4, xp4
+       mov     tmp, mul_array
+       xor     vec_i, vec_i
+
+.next_vect:
+       mov     ptr, [src+vec_i]
+
+       vmovdqu xgft1_lo, [tmp]                 ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
+       vmovdqu xgft1_hi, [tmp+16]              ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
+       vmovdqu xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
+       vmovdqu xgft2_hi, [tmp+vec*(32/PS)+16]  ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
+       vmovdqu xgft3_lo, [tmp+vec*(64/PS)]     ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
+       vmovdqu xgft3_hi, [tmp+vec*(64/PS)+16]  ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
+       vmovdqu xgft4_lo, [tmp+vskip3]          ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
+       vmovdqu xgft4_hi, [tmp+vskip3+16]       ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
+
+       XLDR    x0, [ptr+pos]           ;Get next source vector
+       add     tmp, 32
+       add     vec_i, PS
+
+       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
+       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
+       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
+
+
+       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
+       vpxor   xp1, xgft1_hi           ;xp1 += partial
+
+       vpshufb xgft2_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft2_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft2_hi, xgft2_lo      ;GF add high and low partials
+       vpxor   xp2, xgft2_hi           ;xp2 += partial
+
+       vpshufb xgft3_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft3_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft3_hi, xgft3_lo      ;GF add high and low partials
+       vpxor   xp3, xgft3_hi           ;xp3 += partial
+
+       vpshufb xgft4_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft4_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft4_hi, xgft4_lo      ;GF add high and low partials
+       vpxor   xp4, xgft4_hi           ;xp4 += partial
+
+       cmp     vec_i, vec
+       jl      .next_vect
+
+       XSTR    [dest1+pos], xp1
+       XSTR    [dest2+pos], xp2
+       XSTR    [dest3+pos], xp3
+       XSTR    [dest4+pos], xp4
+
+       add     pos, 16                 ;Loop on 16 bytes at a time
+       cmp     pos, len
+       jle     .loop16
+
+       lea     tmp, [len + 16]
+       cmp     pos, tmp
+       je      .return_pass
+
+       ;; Tail len
+       mov     pos, len        ;Overlapped offset length-16
+       jmp     .loop16         ;Do one more overlap pass
+
+.return_pass:
+       mov     return, 0
+       FUNC_RESTORE
+       ret
+
+.return_fail:
+       mov     return, 1
+       FUNC_RESTORE
+       ret
+
+endproc_frame
+
+section .data
+
+align 16
+mask0f:        ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
+
+%macro slversion 4
+global %1_slver_%2%3%4
+global %1_slver
+%1_slver:
+%1_slver_%2%3%4:
+       dw 0x%4
+       db 0x%3, 0x%2
+%endmacro
+;;;       func                  core, ver, snum
+slversion gf_4vect_dot_prod_avx, 00,  02,  0064

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_dot_prod_avx2.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_dot_prod_avx2.asm.s
new file mode 100644 (file)
index 0000000..3f29c76
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_dot_prod_avx2.asm.s
@@ -0,0 +1,305 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;;;
+;;; gf_4vect_dot_prod_avx2(len, vec, *g_tbls, **buffs, **dests);
+;;;
+;;; Author: Gregory Tucker
+
+
+%ifidn __OUTPUT_FORMAT__, elf64
+ %define arg0  rdi
+ %define arg1  rsi
+ %define arg2  rdx
+ %define arg3  rcx
+ %define arg4  r8
+ %define arg5  r9
+
+ %define tmp   r11
+ %define tmp.w r11d
+ %define tmp.b r11b
+ %define tmp2  r10
+ %define tmp3  r13             ; must be saved and restored
+ %define tmp4  r12             ; must be saved and restored
+ %define tmp5  r14             ; must be saved and restored
+ %define tmp6  r15             ; must be saved and restored
+ %define return rax
+ %define PS 8
+ %define LOG_PS 3
+
+ %define func(x) x:
+ %macro FUNC_SAVE 0
+       push    r12
+       push    r13
+       push    r14
+       push    r15
+ %endmacro
+ %macro FUNC_RESTORE 0
+       pop     r15
+       pop     r14
+       pop     r13
+       pop     r12
+ %endmacro
+%endif
+
+%ifidn __OUTPUT_FORMAT__, win64
+ %define arg0   rcx
+ %define arg1   rdx
+ %define arg2   r8
+ %define arg3   r9
+
+ %define arg4   r12            ; must be saved, loaded and restored
+ %define arg5   r15            ; must be saved and restored
+ %define tmp    r11
+ %define tmp.w  r11d
+ %define tmp.b  r11b
+ %define tmp2   r10
+ %define tmp3   r13            ; must be saved and restored
+ %define tmp4   r14            ; must be saved and restored
+ %define tmp5   rdi            ; must be saved and restored
+ %define tmp6   rsi            ; must be saved and restored
+ %define return rax
+ %define PS     8
+ %define LOG_PS 3
+ %define stack_size  9*16 + 7*8                ; must be an odd multiple of 8
+ %define arg(x)      [rsp + stack_size + PS + PS*x]
+
+ %define func(x) proc_frame x
+ %macro FUNC_SAVE 0
+       alloc_stack     stack_size
+       vmovdqa [rsp + 0*16], xmm6
+       vmovdqa [rsp + 1*16], xmm7
+       vmovdqa [rsp + 2*16], xmm8
+       vmovdqa [rsp + 3*16], xmm9
+       vmovdqa [rsp + 4*16], xmm10
+       vmovdqa [rsp + 5*16], xmm11
+       vmovdqa [rsp + 6*16], xmm12
+       vmovdqa [rsp + 7*16], xmm13
+       vmovdqa [rsp + 8*16], xmm14
+       save_reg        r12,  9*16 + 0*8
+       save_reg        r13,  9*16 + 1*8
+       save_reg        r14,  9*16 + 2*8
+       save_reg        r15,  9*16 + 3*8
+       save_reg        rdi,  9*16 + 4*8
+       save_reg        rsi,  9*16 + 5*8
+       end_prolog
+       mov     arg4, arg(4)
+ %endmacro
+
+ %macro FUNC_RESTORE 0
+       vmovdqa xmm6, [rsp + 0*16]
+       vmovdqa xmm7, [rsp + 1*16]
+       vmovdqa xmm8, [rsp + 2*16]
+       vmovdqa xmm9, [rsp + 3*16]
+       vmovdqa xmm10, [rsp + 4*16]
+       vmovdqa xmm11, [rsp + 5*16]
+       vmovdqa xmm12, [rsp + 6*16]
+       vmovdqa xmm13, [rsp + 7*16]
+       vmovdqa xmm14, [rsp + 8*16]
+       mov     r12,  [rsp + 9*16 + 0*8]
+       mov     r13,  [rsp + 9*16 + 1*8]
+       mov     r14,  [rsp + 9*16 + 2*8]
+       mov     r15,  [rsp + 9*16 + 3*8]
+       mov     rdi,  [rsp + 9*16 + 4*8]
+       mov     rsi,  [rsp + 9*16 + 5*8]
+       add     rsp, stack_size
+ %endmacro
+%endif
+
+
+%define len    arg0
+%define vec    arg1
+%define mul_array arg2
+%define        src    arg3
+%define dest1  arg4
+%define ptr    arg5
+%define vec_i  tmp2
+%define dest2  tmp3
+%define dest3  tmp4
+%define dest4  tmp5
+%define vskip3 tmp6
+%define pos   return
+
+%ifndef EC_ALIGNED_ADDR
+;;; Use Un-aligned load/store
+ %define XLDR vmovdqu
+ %define XSTR vmovdqu
+%else
+;;; Use Non-temporal load/stor
+ %ifdef NO_NT_LDST
+  %define XLDR vmovdqa
+  %define XSTR vmovdqa
+ %else
+  %define XLDR vmovntdqa
+  %define XSTR vmovntdq
+ %endif
+%endif
+
+
+default rel
+
+[bits 64]
+section .text
+
+%define xmask0f   ymm14
+%define xmask0fx  xmm14
+%define xgft1_lo  ymm13
+%define xgft1_hi  ymm12
+%define xgft2_lo  ymm11
+%define xgft2_hi  ymm10
+%define xgft3_lo  ymm9
+%define xgft3_hi  ymm8
+%define xgft4_lo  ymm7
+%define xgft4_hi  ymm6
+
+
+%define x0     ymm0
+%define xtmpa  ymm1
+%define xp1    ymm2
+%define xp2    ymm3
+%define xp3    ymm4
+%define xp4    ymm5
+
+align 16
+global gf_4vect_dot_prod_avx2:function
+func(gf_4vect_dot_prod_avx2)
+       FUNC_SAVE
+       sub     len, 32
+       jl      .return_fail
+       xor     pos, pos
+       mov     tmp.b, 0x0f
+       vpinsrb xmask0fx, xmask0fx, tmp.w, 0
+       vpbroadcastb xmask0f, xmask0fx  ;Construct mask 0x0f0f0f...
+       mov     vskip3, vec
+       imul    vskip3, 96
+       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
+       mov     dest2, [dest1+PS]
+       mov     dest3, [dest1+2*PS]
+       mov     dest4, [dest1+3*PS]
+       mov     dest1, [dest1]
+
+
+.loop32:
+       vpxor   xp1, xp1
+       vpxor   xp2, xp2
+       vpxor   xp3, xp3
+       vpxor   xp4, xp4
+       mov     tmp, mul_array
+       xor     vec_i, vec_i
+
+.next_vect:
+       mov     ptr, [src+vec_i]
+       XLDR    x0, [ptr+pos]           ;Get next source vector
+       add     vec_i, PS
+
+       vpand   xgft4_lo, x0, xmask0f   ;Mask low src nibble in bits 4-0
+       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
+       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
+       vperm2i128 xtmpa, xgft4_lo, x0, 0x30    ;swap xtmpa from 1lo|2lo to 1lo|2hi
+       vperm2i128 x0, xgft4_lo, x0, 0x12       ;swap x0 from    1hi|2hi to 1hi|2lo
+
+       vmovdqu xgft1_lo, [tmp]                 ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
+                                               ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
+       vmovdqu xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
+                                               ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
+       vmovdqu xgft3_lo, [tmp+vec*(64/PS)]     ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
+                                               ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
+       vmovdqu xgft4_lo, [tmp+vskip3]          ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
+                                               ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
+
+       vperm2i128 xgft1_hi, xgft1_lo, xgft1_lo, 0x01 ; swapped to hi | lo
+       vperm2i128 xgft2_hi, xgft2_lo, xgft2_lo, 0x01 ; swapped to hi | lo
+       vperm2i128 xgft3_hi, xgft3_lo, xgft3_lo, 0x01 ; swapped to hi | lo
+       vperm2i128 xgft4_hi, xgft4_lo, xgft4_lo, 0x01 ; swapped to hi | lo
+       add     tmp, 32
+
+       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
+       vpxor   xp1, xgft1_hi           ;xp1 += partial
+
+       vpshufb xgft2_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft2_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft2_hi, xgft2_lo      ;GF add high and low partials
+       vpxor   xp2, xgft2_hi           ;xp2 += partial
+
+       vpshufb xgft3_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft3_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft3_hi, xgft3_lo      ;GF add high and low partials
+       vpxor   xp3, xgft3_hi           ;xp3 += partial
+
+       vpshufb xgft4_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft4_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft4_hi, xgft4_lo      ;GF add high and low partials
+       vpxor   xp4, xgft4_hi           ;xp4 += partial
+
+       cmp     vec_i, vec
+       jl      .next_vect
+
+       XSTR    [dest1+pos], xp1
+       XSTR    [dest2+pos], xp2
+       XSTR    [dest3+pos], xp3
+       XSTR    [dest4+pos], xp4
+
+       add     pos, 32                 ;Loop on 32 bytes at a time
+       cmp     pos, len
+       jle     .loop32
+
+       lea     tmp, [len + 32]
+       cmp     pos, tmp
+       je      .return_pass
+
+       ;; Tail len
+       mov     pos, len        ;Overlapped offset length-32
+       jmp     .loop32         ;Do one more overlap pass
+
+.return_pass:
+       mov     return, 0
+       FUNC_RESTORE
+       ret
+
+.return_fail:
+       mov     return, 1
+       FUNC_RESTORE
+       ret
+
+endproc_frame
+
+section .data
+
+%macro slversion 4
+global %1_slver_%2%3%4
+global %1_slver
+%1_slver:
+%1_slver_%2%3%4:
+       dw 0x%4
+       db 0x%3, 0x%2
+%endmacro
+;;;       func                   core, ver, snum
+slversion gf_4vect_dot_prod_avx2, 04,  03,  0064

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_dot_prod_sse.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_dot_prod_sse.asm.s
new file mode 100644 (file)
index 0000000..3626e42
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/erasure_code/gf_4vect_dot_prod_sse.asm.s
@@ -0,0 +1,296 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;;;
+;;; gf_4vect_dot_prod_sse(len, vec, *g_tbls, **buffs, **dests);
+;;;
+;;; Author: Gregory Tucker
+
+
+%ifidn __OUTPUT_FORMAT__, elf64
+ %define arg0  rdi
+ %define arg1  rsi
+ %define arg2  rdx
+ %define arg3  rcx
+ %define arg4  r8
+ %define arg5  r9
+
+ %define tmp   r11
+ %define tmp2  r10
+ %define tmp3  r13             ; must be saved and restored
+ %define tmp4  r12             ; must be saved and restored
+ %define tmp5  r14             ; must be saved and restored
+ %define tmp6  r15             ; must be saved and restored
+ %define return rax
+ %define PS 8
+ %define LOG_PS 3
+
+ %define func(x) x:
+ %macro FUNC_SAVE 0
+       push    r12
+       push    r13
+       push    r14
+       push    r15
+ %endmacro
+ %macro FUNC_RESTORE 0
+       pop     r15
+       pop     r14
+       pop     r13
+       pop     r12
+ %endmacro
+%endif
+
+%ifidn __OUTPUT_FORMAT__, win64
+ %define arg0   rcx
+ %define arg1   rdx
+ %define arg2   r8
+ %define arg3   r9
+
+ %define arg4   r12            ; must be saved, loaded and restored
+ %define arg5   r15            ; must be saved and restored
+ %define tmp    r11
+ %define tmp2   r10
+ %define tmp3   r13            ; must be saved and restored
+ %define tmp4   r14            ; must be saved and restored
+ %define tmp5   rdi            ; must be saved and restored
+ %define tmp6   rsi            ; must be saved and restored
+ %define return rax
+ %define PS     8
+ %define LOG_PS 3
+ %define stack_size  9*16 + 7*8                ; must be an odd multiple of 8
+ %define arg(x)      [rsp + stack_size + PS + PS*x]
+
+ %define func(x) proc_frame x
+ %macro FUNC_SAVE 0
+       alloc_stack     stack_size
+       save_xmm128     xmm6, 0*16
+       save_xmm128     xmm7, 1*16
+       save_xmm128     xmm8, 2*16
+       save_xmm128     xmm9, 3*16
+       save_xmm128     xmm10, 4*16
+       save_xmm128     xmm11, 5*16
+       save_xmm128     xmm12, 6*16
+       save_xmm128     xmm13, 7*16
+       save_xmm128     xmm14, 8*16
+       save_reg        r12,  9*16 + 0*8
+       save_reg        r13,  9*16 + 1*8
+       save_reg        r14,  9*16 + 2*8
+       save_reg        r15,  9*16 + 3*8
+       save_reg        rdi,  9*16 + 4*8
+       save_reg        rsi,  9*16 + 5*8
+       end_prolog
+       mov     arg4, arg(4)
+ %endmacro
+
+ %macro FUNC_RESTORE 0
+       movdqa  xmm6, [rsp + 0*16]
+       movdqa  xmm7, [rsp + 1*16]
+       movdqa  xmm8, [rsp + 2*16]
+       movdqa  xmm9, [rsp + 3*16]
+       movdqa  xmm10, [rsp + 4*16]
+       movdqa  xmm11, [rsp + 5*16]
+       movdqa  xmm12, [rsp + 6*16]
+       movdqa  xmm13, [rsp + 7*16]
+       movdqa  xmm14, [rsp + 8*16]
+       mov     r12,  [rsp + 9*16 + 0*8]
+       mov     r13,  [rsp + 9*16 + 1*8]
+       mov     r14,  [rsp + 9*16 + 2*8]
+       mov     r15,  [rsp + 9*16 + 3*8]
+       mov     rdi,  [rsp + 9*16 + 4*8]
+       mov     rsi,  [rsp + 9*16 + 5*8]
+       add     rsp, stack_size
+ %endmacro
+%endif
+
+
+%define len    arg0
+%define vec    arg1
+%define mul_array arg2
+%define        src    arg3
+%define dest1  arg4
+%define ptr    arg5
+%define vec_i  tmp2
+%define dest2  tmp3
+%define dest3  tmp4
+%define dest4  tmp5
+%define vskip3 tmp6
+%define pos   return
+
+%ifndef EC_ALIGNED_ADDR
+;;; Use Un-aligned load/store
+ %define XLDR movdqu
+ %define XSTR movdqu
+%else
+;;; Use Non-temporal load/stor
+ %ifdef NO_NT_LDST
+  %define XLDR movdqa
+  %define XSTR movdqa
+ %else
+  %define XLDR movntdqa
+  %define XSTR movntdq
+ %endif
+%endif
+
+
+default rel
+
+[bits 64]
+section .text
+
+%define xmask0f   xmm14
+%define xgft1_lo  xmm13
+%define xgft1_hi  xmm12
+%define xgft2_lo  xmm11
+%define xgft2_hi  xmm10
+%define xgft3_lo  xmm9
+%define xgft3_hi  xmm8
+%define xgft4_lo  xmm7
+%define xgft4_hi  xmm6
+
+
+%define x0     xmm0
+%define xtmpa  xmm1
+%define xp1    xmm2
+%define xp2    xmm3
+%define xp3    xmm4
+%define xp4    xmm5
+
+align 16
+global gf_4vect_dot_prod_sse:function
+func(gf_4vect_dot_prod_sse)
+       FUNC_SAVE
+       sub     len, 16
+       jl      .return_fail
+       xor     pos, pos
+       movdqa  xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
+       mov     vskip3, vec
+       imul    vskip3, 96
+       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
+       mov     dest2, [dest1+PS]
+       mov     dest3, [dest1+2*PS]
+       mov     dest4, [dest1+3*PS]
+       mov     dest1, [dest1]
+
+
+.loop16:
+       pxor    xp1, xp1
+       pxor    xp2, xp2
+       pxor    xp3, xp3
+       pxor    xp4, xp4
+       mov     tmp, mul_array
+       xor     vec_i, vec_i
+
+.next_vect:
+       mov     ptr, [src+vec_i]
+
+       movdqu  xgft1_lo, [tmp]                 ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
+       movdqu  xgft1_hi, [tmp+16]              ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
+       movdqu  xgft2_lo, [tmp+vec*(32/PS)]     ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
+       movdqu  xgft2_hi, [tmp+vec*(32/PS)+16]  ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
+       movdqu  xgft3_lo, [tmp+vec*(64/PS)]     ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
+       movdqu  xgft3_hi, [tmp+vec*(64/PS)+16]  ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
+       movdqu  xgft4_lo, [tmp+vskip3]          ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
+       movdqu  xgft4_hi, [tmp+vskip3+16]       ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
+
+       XLDR    x0, [ptr+pos]           ;Get next source vector
+       add     tmp, 32
+       add     vec_i, PS
+
+       movdqa  xtmpa, x0               ;Keep unshifted copy of src
+       psraw   x0, 4                   ;Shift to put high nibble into bits 4-0
+       pand    x0, xmask0f             ;Mask high src nibble in bits 4-0
+       pand    xtmpa, xmask0f          ;Mask low src nibble in bits 4-0
+
+       pshufb  xgft1_hi, x0            ;Lookup mul table of high nibble
+       pshufb  xgft1_lo, xtmpa         ;Lookup mul table of low nibble
+       pxor    xgft1_hi, xgft1_lo      ;GF add high and low partials
+       pxor    xp1, xgft1_hi           ;xp1 += partial
+
+       pshufb  xgft2_hi, x0            ;Lookup mul table of high nibble
+       pshufb  xgft2_lo, xtmpa         ;Lookup mul table of low nibble
+       pxor    xgft2_hi, xgft2_lo      ;GF add high and low partials
+       pxor    xp2, xgft2_hi           ;xp2 += partial
+
+       pshufb  xgft3_hi, x0            ;Lookup mul table of high nibble
+       pshufb  xgft3_lo, xtmpa         ;Lookup mul table of low nibble
+       pxor    xgft3_hi, xgft3_lo      ;GF add high and low partials
+       pxor    xp3, xgft3_hi           ;xp3 += partial
+
+       pshufb  xgft4_hi, x0            ;Lookup mul table of high nibble
+       pshufb  xgft4_lo, xtmpa         ;Lookup mul table of low nibble
+       pxor    xgft4_hi, xgft4_lo      ;GF add high and low partials
+       pxor    xp4, xgft4_hi           ;xp4 += partial
+
+       cmp     vec_i, vec
+       jl      .next_vect
+
+       XSTR    [dest1+pos], xp1
+       XSTR    [dest2+pos], xp2
+       XSTR    [dest3+pos], xp3
+       XSTR    [dest4+pos], xp4
+
+       add     pos, 16                 ;Loop on 16 bytes at a time
+       cmp     pos, len
+       jle     .loop16
+
+       lea     tmp, [len + 16]
+       cmp     pos, tmp
+       je      .return_pass
+
+       ;; Tail len
+       mov     pos, len        ;Overlapped offset length-16
+       jmp     .loop16         ;Do one more overlap pass
+
+.return_pass:
+       mov     return, 0
+       FUNC_RESTORE
+       ret
+
+.return_fail:
+       mov     return, 1
+       FUNC_RESTORE
+       ret
+
+endproc_frame
+
+section .data
+
+align 16
+mask0f:        ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
+
+%macro slversion 4
+global %1_slver_%2%3%4
+global %1_slver
+%1_slver:
+%1_slver_%2%3%4:
+       dw 0x%4
+       db 0x%3, 0x%2
+%endmacro
+;;;       func                  core, ver, snum
+slversion gf_4vect_dot_prod_sse, 00,  03,  0064

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_dot_prod_avx.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_dot_prod_avx.asm.s
new file mode 100644 (file)
index 0000000..8855a2f
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_dot_prod_avx.asm.s
@@ -0,0 +1,311 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;;;
+;;; gf_5vect_dot_prod_avx(len, vec, *g_tbls, **buffs, **dests);
+;;;
+;;; Author: Gregory Tucker
+
+
+%ifidn __OUTPUT_FORMAT__, elf64
+ %define arg0  rdi
+ %define arg1  rsi
+ %define arg2  rdx
+ %define arg3  rcx
+ %define arg4  r8
+ %define arg5  r9
+
+ %define tmp   r11
+ %define tmp2  r10
+ %define tmp3  r13             ; must be saved and restored
+ %define tmp4  r12             ; must be saved and restored
+ %define tmp5  r14             ; must be saved and restored
+ %define tmp6  r15             ; must be saved and restored
+ %define return rax
+ %define PS 8
+ %define LOG_PS 3
+
+ %define func(x) x:
+ %macro FUNC_SAVE 0
+       push    r12
+       push    r13
+       push    r14
+       push    r15
+ %endmacro
+ %macro FUNC_RESTORE 0
+       pop     r15
+       pop     r14
+       pop     r13
+       pop     r12
+ %endmacro
+%endif
+
+%ifidn __OUTPUT_FORMAT__, win64
+ %define arg0   rcx
+ %define arg1   rdx
+ %define arg2   r8
+ %define arg3   r9
+
+ %define arg4   r12            ; must be saved, loaded and restored
+ %define arg5   r15            ; must be saved and restored
+ %define tmp    r11
+ %define tmp2   r10
+ %define tmp3   r13            ; must be saved and restored
+ %define tmp4   r14            ; must be saved and restored
+ %define tmp5   rdi            ; must be saved and restored
+ %define tmp6   rsi            ; must be saved and restored
+ %define return rax
+ %define PS     8
+ %define LOG_PS 3
+ %define stack_size  10*16 + 7*8               ; must be an odd multiple of 8
+ %define arg(x)      [rsp + stack_size + PS + PS*x]
+
+ %define func(x) proc_frame x
+ %macro FUNC_SAVE 0
+       alloc_stack     stack_size
+       save_xmm128     xmm6, 0*16
+       save_xmm128     xmm7, 1*16
+       save_xmm128     xmm8, 2*16
+       save_xmm128     xmm9, 3*16
+       save_xmm128     xmm10, 4*16
+       save_xmm128     xmm11, 5*16
+       save_xmm128     xmm12, 6*16
+       save_xmm128     xmm13, 7*16
+       save_xmm128     xmm14, 8*16
+       save_xmm128     xmm15, 9*16
+       save_reg        r12,  10*16 + 0*8
+       save_reg        r13,  10*16 + 1*8
+       save_reg        r14,  10*16 + 2*8
+       save_reg        r15,  10*16 + 3*8
+       save_reg        rdi,  10*16 + 4*8
+       save_reg        rsi,  10*16 + 5*8
+       end_prolog
+       mov     arg4, arg(4)
+ %endmacro
+
+ %macro FUNC_RESTORE 0
+       vmovdqa xmm6, [rsp + 0*16]
+       vmovdqa xmm7, [rsp + 1*16]
+       vmovdqa xmm8, [rsp + 2*16]
+       vmovdqa xmm9, [rsp + 3*16]
+       vmovdqa xmm10, [rsp + 4*16]
+       vmovdqa xmm11, [rsp + 5*16]
+       vmovdqa xmm12, [rsp + 6*16]
+       vmovdqa xmm13, [rsp + 7*16]
+       vmovdqa xmm14, [rsp + 8*16]
+       vmovdqa xmm15, [rsp + 9*16]
+       mov     r12,  [rsp + 10*16 + 0*8]
+       mov     r13,  [rsp + 10*16 + 1*8]
+       mov     r14,  [rsp + 10*16 + 2*8]
+       mov     r15,  [rsp + 10*16 + 3*8]
+       mov     rdi,  [rsp + 10*16 + 4*8]
+       mov     rsi,  [rsp + 10*16 + 5*8]
+       add     rsp, stack_size
+ %endmacro
+%endif
+
+%define len    arg0
+%define vec    arg1
+%define mul_array arg2
+%define        src    arg3
+%define dest   arg4
+%define ptr    arg5
+%define vec_i  tmp2
+%define dest1  tmp3
+%define dest2  tmp4
+%define vskip1 tmp5
+%define vskip3 tmp6
+%define pos    return
+
+
+%ifndef EC_ALIGNED_ADDR
+;;; Use Un-aligned load/store
+ %define XLDR vmovdqu
+ %define XSTR vmovdqu
+%else
+;;; Use Non-temporal load/stor
+ %ifdef NO_NT_LDST
+  %define XLDR vmovdqa
+  %define XSTR vmovdqa
+ %else
+  %define XLDR vmovntdqa
+  %define XSTR vmovntdq
+ %endif
+%endif
+
+default rel
+
+[bits 64]
+section .text
+
+%define xmask0f   xmm15
+%define xgft1_lo  xmm14
+%define xgft1_hi  xmm13
+%define xgft2_lo  xmm12
+%define xgft2_hi  xmm11
+%define xgft3_lo  xmm10
+%define xgft3_hi  xmm9
+%define xgft4_lo  xmm8
+%define xgft4_hi  xmm7
+
+
+%define x0     xmm0
+%define xtmpa  xmm1
+%define xp1    xmm2
+%define xp2    xmm3
+%define xp3    xmm4
+%define xp4    xmm5
+%define xp5    xmm6
+
+align 16
+global gf_5vect_dot_prod_avx:function
+func(gf_5vect_dot_prod_avx)
+       FUNC_SAVE
+       sub     len, 16
+       jl      .return_fail
+       xor     pos, pos
+       vmovdqa xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
+       mov     vskip1, vec
+       imul    vskip1, 32
+       mov     vskip3, vec
+       imul    vskip3, 96
+       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
+       mov     dest1, [dest]
+       mov     dest2, [dest+PS]
+
+
+.loop16:
+       mov     tmp, mul_array
+       xor     vec_i, vec_i
+       vpxor   xp1, xp1
+       vpxor   xp2, xp2
+       vpxor   xp3, xp3
+       vpxor   xp4, xp4
+       vpxor   xp5, xp5
+
+
+.next_vect:
+       mov     ptr, [src+vec_i]
+       add     vec_i, PS
+       XLDR    x0, [ptr+pos]           ;Get next source vector
+
+       vmovdqu xgft1_lo, [tmp]                 ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
+       vmovdqu xgft1_hi, [tmp+16]              ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
+       vmovdqu xgft2_lo, [tmp+vskip1*1]        ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
+       vmovdqu xgft2_hi, [tmp+vskip1*1+16]     ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
+       vmovdqu xgft3_lo, [tmp+vskip1*2]        ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
+       vmovdqu xgft3_hi, [tmp+vskip1*2+16]     ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
+       vmovdqu xgft4_lo, [tmp+vskip3]          ;Load array Dx{00}, Dx{01}, ..., Dx{0f}
+       vmovdqu xgft4_hi, [tmp+vskip3+16]       ;     "     Dx{00}, Dx{10}, ..., Dx{f0}
+
+       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
+       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
+       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
+
+       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
+       vpxor   xp1, xgft1_hi           ;xp1 += partial
+
+       vpshufb xgft2_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft2_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft2_hi, xgft2_lo      ;GF add high and low partials
+       vpxor   xp2, xgft2_hi           ;xp2 += partial
+
+       vmovdqu xgft1_lo, [tmp+vskip1*4]        ;Load array Ex{00}, Ex{01}, ..., Ex{0f}
+       vmovdqu xgft1_hi, [tmp+vskip1*4+16]     ;     "     Ex{00}, Ex{10}, ..., Ex{f0}
+       add     tmp, 32
+
+       vpshufb xgft3_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft3_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft3_hi, xgft3_lo      ;GF add high and low partials
+       vpxor   xp3, xgft3_hi           ;xp3 += partial
+
+       vpshufb xgft4_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft4_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft4_hi, xgft4_lo      ;GF add high and low partials
+       vpxor   xp4, xgft4_hi           ;xp4 += partial
+
+       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
+       vpxor   xp5, xgft1_hi           ;xp5 += partial
+
+       cmp     vec_i, vec
+       jl      .next_vect
+
+       mov     tmp, [dest+2*PS]
+       mov     ptr, [dest+3*PS]
+       mov     vec_i, [dest+4*PS]
+
+       XSTR    [dest1+pos], xp1
+       XSTR    [dest2+pos], xp2
+       XSTR    [tmp+pos], xp3
+       XSTR    [ptr+pos], xp4
+       XSTR    [vec_i+pos], xp5
+
+       add     pos, 16                 ;Loop on 16 bytes at a time
+       cmp     pos, len
+       jle     .loop16
+
+       lea     tmp, [len + 16]
+       cmp     pos, tmp
+       je      .return_pass
+
+       ;; Tail len
+       mov     pos, len        ;Overlapped offset length-16
+       jmp     .loop16         ;Do one more overlap pass
+
+.return_pass:
+       FUNC_RESTORE
+       mov     return, 0
+       ret
+
+.return_fail:
+       FUNC_RESTORE
+       mov     return, 1
+       ret
+
+endproc_frame
+
+section .data
+
+align 16
+mask0f:        ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
+
+%macro slversion 4
+global %1_slver_%2%3%4
+global %1_slver
+%1_slver:
+%1_slver_%2%3%4:
+       dw 0x%4
+       db 0x%3, 0x%2
+%endmacro
+;;;       func                  core, ver, snum
+slversion gf_5vect_dot_prod_avx, 02,  03,  0194

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_dot_prod_avx2.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_dot_prod_avx2.asm.s
new file mode 100644 (file)
index 0000000..e932053
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_dot_prod_avx2.asm.s
@@ -0,0 +1,323 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;;;
+;;; gf_5vect_dot_prod_avx2(len, vec, *g_tbls, **buffs, **dests);
+;;;
+;;; Author: Gregory Tucker
+
+
+%ifidn __OUTPUT_FORMAT__, elf64
+ %define arg0  rdi
+ %define arg1  rsi
+ %define arg2  rdx
+ %define arg3  rcx
+ %define arg4  r8
+ %define arg5  r9
+
+ %define tmp   r11
+ %define tmp.w r11d
+ %define tmp.b r11b
+ %define tmp2  r10
+ %define tmp3  r13             ; must be saved and restored
+ %define tmp4  r12             ; must be saved and restored
+ %define tmp5  r14             ; must be saved and restored
+ %define tmp6  r15             ; must be saved and restored
+ %define return rax
+ %define PS 8
+ %define LOG_PS 3
+
+ %define func(x) x:
+ %macro FUNC_SAVE 0
+       push    r12
+       push    r13
+       push    r14
+       push    r15
+ %endmacro
+ %macro FUNC_RESTORE 0
+       pop     r15
+       pop     r14
+       pop     r13
+       pop     r12
+ %endmacro
+%endif
+
+%ifidn __OUTPUT_FORMAT__, win64
+ %define arg0   rcx
+ %define arg1   rdx
+ %define arg2   r8
+ %define arg3   r9
+
+ %define arg4   r12            ; must be saved, loaded and restored
+ %define arg5   r15            ; must be saved and restored
+ %define tmp    r11
+ %define tmp.w  r11d
+ %define tmp.b  r11b
+ %define tmp2   r10
+ %define tmp3   r13            ; must be saved and restored
+ %define tmp4   r14            ; must be saved and restored
+ %define tmp5   rdi            ; must be saved and restored
+ %define tmp6   rsi            ; must be saved and restored
+ %define return rax
+ %define PS     8
+ %define LOG_PS 3
+ %define stack_size  10*16 + 7*8               ; must be an odd multiple of 8
+ %define arg(x)      [rsp + stack_size + PS + PS*x]
+
+ %define func(x) proc_frame x
+ %macro FUNC_SAVE 0
+       alloc_stack     stack_size
+       vmovdqa [rsp + 0*16], xmm6
+       vmovdqa [rsp + 1*16], xmm7
+       vmovdqa [rsp + 2*16], xmm8
+       vmovdqa [rsp + 3*16], xmm9
+       vmovdqa [rsp + 4*16], xmm10
+       vmovdqa [rsp + 5*16], xmm11
+       vmovdqa [rsp + 6*16], xmm12
+       vmovdqa [rsp + 7*16], xmm13
+       vmovdqa [rsp + 8*16], xmm14
+       vmovdqa [rsp + 9*16], xmm15
+       save_reg        r12,  10*16 + 0*8
+       save_reg        r13,  10*16 + 1*8
+       save_reg        r14,  10*16 + 2*8
+       save_reg        r15,  10*16 + 3*8
+       save_reg        rdi,  10*16 + 4*8
+       save_reg        rsi,  10*16 + 5*8
+       end_prolog
+       mov     arg4, arg(4)
+ %endmacro
+
+ %macro FUNC_RESTORE 0
+       vmovdqa xmm6, [rsp + 0*16]
+       vmovdqa xmm7, [rsp + 1*16]
+       vmovdqa xmm8, [rsp + 2*16]
+       vmovdqa xmm9, [rsp + 3*16]
+       vmovdqa xmm10, [rsp + 4*16]
+       vmovdqa xmm11, [rsp + 5*16]
+       vmovdqa xmm12, [rsp + 6*16]
+       vmovdqa xmm13, [rsp + 7*16]
+       vmovdqa xmm14, [rsp + 8*16]
+       vmovdqa xmm15, [rsp + 9*16]
+       mov     r12,  [rsp + 10*16 + 0*8]
+       mov     r13,  [rsp + 10*16 + 1*8]
+       mov     r14,  [rsp + 10*16 + 2*8]
+       mov     r15,  [rsp + 10*16 + 3*8]
+       mov     rdi,  [rsp + 10*16 + 4*8]
+       mov     rsi,  [rsp + 10*16 + 5*8]
+       add     rsp, stack_size
+ %endmacro
+%endif
+
+%define len    arg0
+%define vec    arg1
+%define mul_array arg2
+%define        src    arg3
+%define dest   arg4
+%define ptr    arg5
+%define vec_i  tmp2
+%define dest1  tmp3
+%define dest2  tmp4
+%define vskip1 tmp5
+%define vskip3 tmp6
+%define pos    return
+
+
+%ifndef EC_ALIGNED_ADDR
+;;; Use Un-aligned load/store
+ %define XLDR vmovdqu
+ %define XSTR vmovdqu
+%else
+;;; Use Non-temporal load/stor
+ %ifdef NO_NT_LDST
+  %define XLDR vmovdqa
+  %define XSTR vmovdqa
+ %else
+  %define XLDR vmovntdqa
+  %define XSTR vmovntdq
+ %endif
+%endif
+
+default rel
+
+[bits 64]
+section .text
+
+%define xmask0f   ymm15
+%define xmask0fx  xmm15
+%define xgft1_lo  ymm14
+%define xgft1_hi  ymm13
+%define xgft2_lo  ymm12
+%define xgft2_hi  ymm11
+%define xgft3_lo  ymm10
+%define xgft3_hi  ymm9
+%define xgft4_lo  ymm8
+%define xgft4_hi  ymm7
+
+
+%define x0     ymm0
+%define xtmpa  ymm1
+%define xp1    ymm2
+%define xp2    ymm3
+%define xp3    ymm4
+%define xp4    ymm5
+%define xp5    ymm6
+
+align 16
+global gf_5vect_dot_prod_avx2:function
+func(gf_5vect_dot_prod_avx2)
+       FUNC_SAVE
+       sub     len, 32
+       jl      .return_fail
+       xor     pos, pos
+       mov     tmp.b, 0x0f
+       vpinsrb xmask0fx, xmask0fx, tmp.w, 0
+       vpbroadcastb xmask0f, xmask0fx  ;Construct mask 0x0f0f0f...
+       mov     vskip1, vec
+       imul    vskip1, 32
+       mov     vskip3, vec
+       imul    vskip3, 96
+       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
+       mov     dest1, [dest]
+       mov     dest2, [dest+PS]
+
+
+.loop32:
+       mov     tmp, mul_array
+       xor     vec_i, vec_i
+       vpxor   xp1, xp1
+       vpxor   xp2, xp2
+       vpxor   xp3, xp3
+       vpxor   xp4, xp4
+       vpxor   xp5, xp5
+
+
+.next_vect:
+       mov     ptr, [src+vec_i]
+       XLDR    x0, [ptr+pos]           ;Get next source vector
+       add     vec_i, PS
+
+       vpand   xgft4_lo, x0, xmask0f   ;Mask low src nibble in bits 4-0
+       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
+       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
+       vperm2i128 xtmpa, xgft4_lo, x0, 0x30    ;swap xtmpa from 1lo|2lo to 1lo|2hi
+       vperm2i128 x0, xgft4_lo, x0, 0x12       ;swap x0 from    1hi|2hi to 1hi|2lo
+
+       vmovdqu xgft1_lo, [tmp]                 ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
+                                               ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
+       vmovdqu xgft2_lo, [tmp+vskip1*1]        ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
+                                               ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
+       vmovdqu xgft3_lo, [tmp+vskip1*2]        ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
+                                               ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
+       vmovdqu xgft4_lo, [tmp+vskip3]          ;Load array Dx{00}, Dx{01}, ..., Dx{0f}
+                                               ;     "     Dx{00}, Dx{10}, ..., Dx{f0}
+
+       vperm2i128 xgft1_hi, xgft1_lo, xgft1_lo, 0x01 ; swapped to hi | lo
+       vperm2i128 xgft2_hi, xgft2_lo, xgft2_lo, 0x01 ; swapped to hi | lo
+       vperm2i128 xgft3_hi, xgft3_lo, xgft3_lo, 0x01 ; swapped to hi | lo
+       vperm2i128 xgft4_hi, xgft4_lo, xgft4_lo, 0x01 ; swapped to hi | lo
+
+       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
+       vpxor   xp1, xgft1_hi           ;xp1 += partial
+
+       vpshufb xgft2_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft2_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft2_hi, xgft2_lo      ;GF add high and low partials
+       vpxor   xp2, xgft2_hi           ;xp2 += partial
+
+       vmovdqu xgft1_lo, [tmp+vskip1*4]        ;Load array Ex{00}, Ex{01}, ..., Ex{0f}
+                                               ;     "     Ex{00}, Ex{10}, ..., Ex{f0}
+       vperm2i128 xgft1_hi, xgft1_lo, xgft1_lo, 0x01 ; swapped to hi | lo
+       add     tmp, 32
+
+       vpshufb xgft3_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft3_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft3_hi, xgft3_lo      ;GF add high and low partials
+       vpxor   xp3, xgft3_hi           ;xp3 += partial
+
+       vpshufb xgft4_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft4_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft4_hi, xgft4_lo      ;GF add high and low partials
+       vpxor   xp4, xgft4_hi           ;xp4 += partial
+
+       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
+       vpxor   xp5, xgft1_hi           ;xp5 += partial
+
+       cmp     vec_i, vec
+       jl      .next_vect
+
+       mov     tmp, [dest+2*PS]
+       mov     ptr, [dest+3*PS]
+       mov     vec_i, [dest+4*PS]
+
+       XSTR    [dest1+pos], xp1
+       XSTR    [dest2+pos], xp2
+       XSTR    [tmp+pos], xp3
+       XSTR    [ptr+pos], xp4
+       XSTR    [vec_i+pos], xp5
+
+       add     pos, 32                 ;Loop on 32 bytes at a time
+       cmp     pos, len
+       jle     .loop32
+
+       lea     tmp, [len + 32]
+       cmp     pos, tmp
+       je      .return_pass
+
+       ;; Tail len
+       mov     pos, len        ;Overlapped offset length-16
+       jmp     .loop32         ;Do one more overlap pass
+
+.return_pass:
+       FUNC_RESTORE
+       mov     return, 0
+       ret
+
+.return_fail:
+       FUNC_RESTORE
+       mov     return, 1
+       ret
+
+endproc_frame
+
+section .data
+
+%macro slversion 4
+global %1_slver_%2%3%4
+global %1_slver
+%1_slver:
+%1_slver_%2%3%4:
+       dw 0x%4
+       db 0x%3, 0x%2
+%endmacro
+;;;       func                  core, ver, snum
+slversion gf_5vect_dot_prod_avx2, 04,  03,  0199

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_dot_prod_sse.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_dot_prod_sse.asm.s
new file mode 100644 (file)
index 0000000..b33bab0
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/erasure_code/gf_5vect_dot_prod_sse.asm.s
@@ -0,0 +1,312 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;;;
+;;; gf_5vect_dot_prod_sse(len, vec, *g_tbls, **buffs, **dests);
+;;;
+;;; Author: Gregory Tucker
+
+
+%ifidn __OUTPUT_FORMAT__, elf64
+ %define arg0  rdi
+ %define arg1  rsi
+ %define arg2  rdx
+ %define arg3  rcx
+ %define arg4  r8
+ %define arg5  r9
+
+ %define tmp   r11
+ %define tmp2  r10
+ %define tmp3  r13             ; must be saved and restored
+ %define tmp4  r12             ; must be saved and restored
+ %define tmp5  r14             ; must be saved and restored
+ %define tmp6  r15             ; must be saved and restored
+ %define return rax
+ %define PS 8
+ %define LOG_PS 3
+
+ %define func(x) x:
+ %macro FUNC_SAVE 0
+       push    r12
+       push    r13
+       push    r14
+       push    r15
+ %endmacro
+ %macro FUNC_RESTORE 0
+       pop     r15
+       pop     r14
+       pop     r13
+       pop     r12
+ %endmacro
+%endif
+
+%ifidn __OUTPUT_FORMAT__, win64
+ %define arg0   rcx
+ %define arg1   rdx
+ %define arg2   r8
+ %define arg3   r9
+
+ %define arg4   r12            ; must be saved, loaded and restored
+ %define arg5   r15            ; must be saved and restored
+ %define tmp    r11
+ %define tmp2   r10
+ %define tmp3   r13            ; must be saved and restored
+ %define tmp4   r14            ; must be saved and restored
+ %define tmp5   rdi            ; must be saved and restored
+ %define tmp6   rsi            ; must be saved and restored
+ %define return rax
+ %define PS     8
+ %define LOG_PS 3
+ %define stack_size  10*16 + 7*8               ; must be an odd multiple of 8
+ %define arg(x)      [rsp + stack_size + PS + PS*x]
+
+ %define func(x) proc_frame x
+ %macro FUNC_SAVE 0
+       alloc_stack     stack_size
+       save_xmm128     xmm6, 0*16
+       save_xmm128     xmm7, 1*16
+       save_xmm128     xmm8, 2*16
+       save_xmm128     xmm9, 3*16
+       save_xmm128     xmm10, 4*16
+       save_xmm128     xmm11, 5*16
+       save_xmm128     xmm12, 6*16
+       save_xmm128     xmm13, 7*16
+       save_xmm128     xmm14, 8*16
+       save_xmm128     xmm15, 9*16
+       save_reg        r12,  10*16 + 0*8
+       save_reg        r13,  10*16 + 1*8
+       save_reg        r14,  10*16 + 2*8
+       save_reg        r15,  10*16 + 3*8
+       save_reg        rdi,  10*16 + 4*8
+       save_reg        rsi,  10*16 + 5*8
+       end_prolog
+       mov     arg4, arg(4)
+ %endmacro
+
+ %macro FUNC_RESTORE 0
+       movdqa  xmm6, [rsp + 0*16]
+       movdqa  xmm7, [rsp + 1*16]
+       movdqa  xmm8, [rsp + 2*16]
+       movdqa  xmm9, [rsp + 3*16]
+       movdqa  xmm10, [rsp + 4*16]
+       movdqa  xmm11, [rsp + 5*16]
+       movdqa  xmm12, [rsp + 6*16]
+       movdqa  xmm13, [rsp + 7*16]
+       movdqa  xmm14, [rsp + 8*16]
+       movdqa  xmm15, [rsp + 9*16]
+       mov     r12,  [rsp + 10*16 + 0*8]
+       mov     r13,  [rsp + 10*16 + 1*8]
+       mov     r14,  [rsp + 10*16 + 2*8]
+       mov     r15,  [rsp + 10*16 + 3*8]
+       mov     rdi,  [rsp + 10*16 + 4*8]
+       mov     rsi,  [rsp + 10*16 + 5*8]
+       add     rsp, stack_size
+ %endmacro
+%endif
+
+%define len    arg0
+%define vec    arg1
+%define mul_array arg2
+%define        src    arg3
+%define dest   arg4
+%define ptr    arg5
+%define vec_i  tmp2
+%define dest1  tmp3
+%define dest2  tmp4
+%define vskip1 tmp5
+%define vskip3 tmp6
+%define pos    return
+
+
+%ifndef EC_ALIGNED_ADDR
+;;; Use Un-aligned load/store
+ %define XLDR movdqu
+ %define XSTR movdqu
+%else
+;;; Use Non-temporal load/stor
+ %ifdef NO_NT_LDST
+  %define XLDR movdqa
+  %define XSTR movdqa
+ %else
+  %define XLDR movntdqa
+  %define XSTR movntdq
+ %endif
+%endif
+
+default rel
+
+[bits 64]
+section .text
+
+%define xmask0f   xmm15
+%define xgft1_lo  xmm14
+%define xgft1_hi  xmm13
+%define xgft2_lo  xmm12
+%define xgft2_hi  xmm11
+%define xgft3_lo  xmm10
+%define xgft3_hi  xmm9
+%define xgft4_lo  xmm8
+%define xgft4_hi  xmm7
+
+
+%define x0     xmm0
+%define xtmpa  xmm1
+%define xp1    xmm2
+%define xp2    xmm3
+%define xp3    xmm4
+%define xp4    xmm5
+%define xp5    xmm6
+
+align 16
+global gf_5vect_dot_prod_sse:function
+func(gf_5vect_dot_prod_sse)
+       FUNC_SAVE
+       sub     len, 16
+       jl      .return_fail
+       xor     pos, pos
+       movdqa  xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
+       mov     vskip1, vec
+       imul    vskip1, 32
+       mov     vskip3, vec
+       imul    vskip3, 96
+       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
+       mov     dest1, [dest]
+       mov     dest2, [dest+PS]
+
+
+.loop16:
+       mov     tmp, mul_array
+       xor     vec_i, vec_i
+       pxor    xp1, xp1
+       pxor    xp2, xp2
+       pxor    xp3, xp3
+       pxor    xp4, xp4
+       pxor    xp5, xp5
+
+
+.next_vect:
+       mov     ptr, [src+vec_i]
+       add     vec_i, PS
+       XLDR    x0, [ptr+pos]           ;Get next source vector
+
+       movdqu  xgft1_lo, [tmp]                 ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
+       movdqu  xgft1_hi, [tmp+16]              ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
+       movdqu  xgft2_lo, [tmp+vskip1*1]        ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
+       movdqu  xgft2_hi, [tmp+vskip1*1+16]     ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
+       movdqu  xgft3_lo, [tmp+vskip1*2]        ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
+       movdqu  xgft3_hi, [tmp+vskip1*2+16]     ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
+       movdqu  xgft4_lo, [tmp+vskip3]          ;Load array Dx{00}, Dx{01}, ..., Dx{0f}
+       movdqu  xgft4_hi, [tmp+vskip3+16]       ;     "     Dx{00}, Dx{10}, ..., Dx{f0}
+
+       movdqa  xtmpa, x0               ;Keep unshifted copy of src
+       psraw   x0, 4                   ;Shift to put high nibble into bits 4-0
+       pand    x0, xmask0f             ;Mask high src nibble in bits 4-0
+       pand    xtmpa, xmask0f          ;Mask low src nibble in bits 4-0
+
+       pshufb  xgft1_hi, x0            ;Lookup mul table of high nibble
+       pshufb  xgft1_lo, xtmpa         ;Lookup mul table of low nibble
+       pxor    xgft1_hi, xgft1_lo      ;GF add high and low partials
+       pxor    xp1, xgft1_hi           ;xp1 += partial
+
+       pshufb  xgft2_hi, x0            ;Lookup mul table of high nibble
+       pshufb  xgft2_lo, xtmpa         ;Lookup mul table of low nibble
+       pxor    xgft2_hi, xgft2_lo      ;GF add high and low partials
+       pxor    xp2, xgft2_hi           ;xp2 += partial
+
+       movdqu  xgft1_lo, [tmp+vskip1*4]        ;Load array Ex{00}, Ex{01}, ..., Ex{0f}
+       movdqu  xgft1_hi, [tmp+vskip1*4+16]     ;     "     Ex{00}, Ex{10}, ..., Ex{f0}
+       add     tmp, 32
+
+       pshufb  xgft3_hi, x0            ;Lookup mul table of high nibble
+       pshufb  xgft3_lo, xtmpa         ;Lookup mul table of low nibble
+       pxor    xgft3_hi, xgft3_lo      ;GF add high and low partials
+       pxor    xp3, xgft3_hi           ;xp3 += partial
+
+       pshufb  xgft4_hi, x0            ;Lookup mul table of high nibble
+       pshufb  xgft4_lo, xtmpa         ;Lookup mul table of low nibble
+       pxor    xgft4_hi, xgft4_lo      ;GF add high and low partials
+       pxor    xp4, xgft4_hi           ;xp4 += partial
+
+       pshufb  xgft1_hi, x0            ;Lookup mul table of high nibble
+       pshufb  xgft1_lo, xtmpa         ;Lookup mul table of low nibble
+       pxor    xgft1_hi, xgft1_lo      ;GF add high and low partials
+       pxor    xp5, xgft1_hi           ;xp5 += partial
+
+       cmp     vec_i, vec
+       jl      .next_vect
+
+       mov     tmp, [dest+2*PS]
+       mov     ptr, [dest+3*PS]
+       mov     vec_i, [dest+4*PS]
+
+       XSTR    [dest1+pos], xp1
+       XSTR    [dest2+pos], xp2
+       XSTR    [tmp+pos], xp3
+       XSTR    [ptr+pos], xp4
+       XSTR    [vec_i+pos], xp5
+
+       add     pos, 16                 ;Loop on 16 bytes at a time
+       cmp     pos, len
+       jle     .loop16
+
+       lea     tmp, [len + 16]
+       cmp     pos, tmp
+       je      .return_pass
+
+       ;; Tail len
+       mov     pos, len        ;Overlapped offset length-16
+       jmp     .loop16         ;Do one more overlap pass
+
+.return_pass:
+       FUNC_RESTORE
+       mov     return, 0
+       ret
+
+.return_fail:
+       FUNC_RESTORE
+       mov     return, 1
+       ret
+
+endproc_frame
+
+section .data
+
+align 16
+mask0f:        ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
+
+%macro slversion 4
+global %1_slver_%2%3%4
+global %1_slver
+%1_slver:
+%1_slver_%2%3%4:
+       dw 0x%4
+       db 0x%3, 0x%2
+%endmacro
+;;;       func                  core, ver, snum
+slversion gf_5vect_dot_prod_sse, 00,  03,  0065

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_dot_prod_avx.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_dot_prod_avx.asm.s
new file mode 100644 (file)
index 0000000..4e03e8e
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_dot_prod_avx.asm.s
@@ -0,0 +1,323 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;;;
+;;; gf_6vect_dot_prod_avx(len, vec, *g_tbls, **buffs, **dests);
+;;;
+;;; Author: Gregory Tucker
+
+
+%ifidn __OUTPUT_FORMAT__, elf64
+ %define arg0  rdi
+ %define arg1  rsi
+ %define arg2  rdx
+ %define arg3  rcx
+ %define arg4  r8
+ %define arg5  r9
+
+ %define tmp   r11
+ %define tmp2  r10
+ %define tmp3  r13             ; must be saved and restored
+ %define tmp4  r12             ; must be saved and restored
+ %define tmp5  r14             ; must be saved and restored
+ %define tmp6  r15             ; must be saved and restored
+ %define return rax
+ %define PS 8
+ %define LOG_PS 3
+
+ %define func(x) x:
+ %macro FUNC_SAVE 0
+       push    r12
+       push    r13
+       push    r14
+       push    r15
+ %endmacro
+ %macro FUNC_RESTORE 0
+       pop     r15
+       pop     r14
+       pop     r13
+       pop     r12
+ %endmacro
+%endif
+
+%ifidn __OUTPUT_FORMAT__, win64
+ %define arg0   rcx
+ %define arg1   rdx
+ %define arg2   r8
+ %define arg3   r9
+
+ %define arg4   r12            ; must be saved, loaded and restored
+ %define arg5   r15            ; must be saved and restored
+ %define tmp    r11
+ %define tmp2   r10
+ %define tmp3   r13            ; must be saved and restored
+ %define tmp4   r14            ; must be saved and restored
+ %define tmp5   rdi            ; must be saved and restored
+ %define tmp6   rsi            ; must be saved and restored
+ %define return rax
+ %define PS     8
+ %define LOG_PS 3
+ %define stack_size  10*16 + 7*8               ; must be an odd multiple of 8
+ %define arg(x)      [rsp + stack_size + PS + PS*x]
+
+ %define func(x) proc_frame x
+ %macro FUNC_SAVE 0
+       alloc_stack     stack_size
+       save_xmm128     xmm6, 0*16
+       save_xmm128     xmm7, 1*16
+       save_xmm128     xmm8, 2*16
+       save_xmm128     xmm9, 3*16
+       save_xmm128     xmm10, 4*16
+       save_xmm128     xmm11, 5*16
+       save_xmm128     xmm12, 6*16
+       save_xmm128     xmm13, 7*16
+       save_xmm128     xmm14, 8*16
+       save_xmm128     xmm15, 9*16
+       save_reg        r12,  10*16 + 0*8
+       save_reg        r13,  10*16 + 1*8
+       save_reg        r14,  10*16 + 2*8
+       save_reg        r15,  10*16 + 3*8
+       save_reg        rdi,  10*16 + 4*8
+       save_reg        rsi,  10*16 + 5*8
+       end_prolog
+       mov     arg4, arg(4)
+ %endmacro
+
+ %macro FUNC_RESTORE 0
+       vmovdqa xmm6, [rsp + 0*16]
+       vmovdqa xmm7, [rsp + 1*16]
+       vmovdqa xmm8, [rsp + 2*16]
+       vmovdqa xmm9, [rsp + 3*16]
+       vmovdqa xmm10, [rsp + 4*16]
+       vmovdqa xmm11, [rsp + 5*16]
+       vmovdqa xmm12, [rsp + 6*16]
+       vmovdqa xmm13, [rsp + 7*16]
+       vmovdqa xmm14, [rsp + 8*16]
+       vmovdqa xmm15, [rsp + 9*16]
+       mov     r12,  [rsp + 10*16 + 0*8]
+       mov     r13,  [rsp + 10*16 + 1*8]
+       mov     r14,  [rsp + 10*16 + 2*8]
+       mov     r15,  [rsp + 10*16 + 3*8]
+       mov     rdi,  [rsp + 10*16 + 4*8]
+       mov     rsi,  [rsp + 10*16 + 5*8]
+       add     rsp, stack_size
+ %endmacro
+%endif
+
+%define len    arg0
+%define vec    arg1
+%define mul_array arg2
+%define        src    arg3
+%define dest   arg4
+%define ptr    arg5
+%define vec_i  tmp2
+%define dest1  tmp3
+%define dest2  tmp4
+%define vskip1 tmp5
+%define vskip3 tmp6
+%define pos    return
+
+
+%ifndef EC_ALIGNED_ADDR
+;;; Use Un-aligned load/store
+ %define XLDR vmovdqu
+ %define XSTR vmovdqu
+%else
+;;; Use Non-temporal load/stor
+ %ifdef NO_NT_LDST
+  %define XLDR vmovdqa
+  %define XSTR vmovdqa
+ %else
+  %define XLDR vmovntdqa
+  %define XSTR vmovntdq
+ %endif
+%endif
+
+
+default rel
+
+[bits 64]
+section .text
+
+%define xmask0f   xmm15
+%define xgft1_lo  xmm14
+%define xgft1_hi  xmm13
+%define xgft2_lo  xmm12
+%define xgft2_hi  xmm11
+%define xgft3_lo  xmm10
+%define xgft3_hi  xmm9
+%define x0     xmm0
+%define xtmpa  xmm1
+%define xp1    xmm2
+%define xp2    xmm3
+%define xp3    xmm4
+%define xp4    xmm5
+%define xp5    xmm6
+%define xp6    xmm7
+
+align 16
+global gf_6vect_dot_prod_avx:function
+func(gf_6vect_dot_prod_avx)
+       FUNC_SAVE
+       sub     len, 16
+       jl      .return_fail
+       xor     pos, pos
+       vmovdqa xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
+       mov     vskip1, vec
+       imul    vskip1, 32
+       mov     vskip3, vec
+       imul    vskip3, 96
+       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
+       mov     dest1, [dest]
+       mov     dest2, [dest+PS]
+
+
+.loop16:
+       mov     tmp, mul_array
+       xor     vec_i, vec_i
+       vpxor   xp1, xp1
+       vpxor   xp2, xp2
+       vpxor   xp3, xp3
+       vpxor   xp4, xp4
+       vpxor   xp5, xp5
+       vpxor   xp6, xp6
+
+.next_vect:
+       mov     ptr, [src+vec_i]
+       add     vec_i, PS
+       XLDR    x0, [ptr+pos]           ;Get next source vector
+
+       vmovdqu xgft1_lo, [tmp]                 ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
+       vmovdqu xgft1_hi, [tmp+16]              ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
+       vmovdqu xgft2_lo, [tmp+vskip1*1]        ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
+       vmovdqu xgft2_hi, [tmp+vskip1*1+16]     ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
+       vmovdqu xgft3_lo, [tmp+vskip1*2]        ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
+       vmovdqu xgft3_hi, [tmp+vskip1*2+16]     ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
+       lea     ptr, [vskip1 + vskip1*4]        ;ptr = vskip5
+
+       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
+       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
+       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
+
+
+       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
+       vpxor   xp1, xgft1_hi           ;xp1 += partial
+
+       vpshufb xgft2_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft2_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft2_hi, xgft2_lo      ;GF add high and low partials
+       vpxor   xp2, xgft2_hi           ;xp2 += partial
+
+       vpshufb xgft3_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft3_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft3_hi, xgft3_lo      ;GF add high and low partials
+       vpxor   xp3, xgft3_hi           ;xp3 += partial
+
+
+       vmovdqu xgft1_lo, [tmp+vskip3]          ;Load array Dx{00}, Dx{01}, ..., Dx{0f}
+       vmovdqu xgft1_hi, [tmp+vskip3+16]       ;     "     Dx{00}, Dx{10}, ..., Dx{f0}
+       vmovdqu xgft2_lo, [tmp+vskip1*4]        ;Load array Ex{00}, Ex{01}, ..., Ex{0f}
+       vmovdqu xgft2_hi, [tmp+vskip1*4+16]     ;     "     Ex{00}, Ex{10}, ..., Ex{f0}
+       vmovdqu xgft3_lo, [tmp+ptr]             ;Load array Fx{00}, Fx{01}, ..., Fx{0f}
+       vmovdqu xgft3_hi, [tmp+ptr+16]          ;     "     Fx{00}, Fx{10}, ..., Fx{f0}
+       add     tmp, 32
+
+
+       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
+       vpxor   xp4, xgft1_hi           ;xp4 += partial
+
+       vpshufb xgft2_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft2_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft2_hi, xgft2_lo      ;GF add high and low partials
+       vpxor   xp5, xgft2_hi           ;xp5 += partial
+
+       vpshufb xgft3_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft3_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft3_hi, xgft3_lo      ;GF add high and low partials
+       vpxor   xp6, xgft3_hi           ;xp6 += partial
+
+       cmp     vec_i, vec
+       jl      .next_vect
+
+
+       mov     tmp, [dest+2*PS]
+       mov     ptr, [dest+3*PS]
+       mov     vec_i, [dest+4*PS]
+
+       XSTR    [dest1+pos], xp1
+       XSTR    [dest2+pos], xp2
+       XSTR    [tmp+pos], xp3
+       mov     tmp, [dest+5*PS]
+       XSTR    [ptr+pos], xp4
+       XSTR    [vec_i+pos], xp5
+       XSTR    [tmp+pos], xp6
+
+       add     pos, 16                 ;Loop on 16 bytes at a time
+       cmp     pos, len
+       jle     .loop16
+
+       lea     tmp, [len + 16]
+       cmp     pos, tmp
+       je      .return_pass
+
+       ;; Tail len
+       mov     pos, len        ;Overlapped offset length-16
+       jmp     .loop16         ;Do one more overlap pass
+
+.return_pass:
+       FUNC_RESTORE
+       mov     return, 0
+       ret
+
+.return_fail:
+       FUNC_RESTORE
+       mov     return, 1
+       ret
+
+endproc_frame
+
+section .data
+
+align 16
+mask0f:        ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
+
+%macro slversion 4
+global %1_slver_%2%3%4
+global %1_slver
+%1_slver:
+%1_slver_%2%3%4:
+       dw 0x%4
+       db 0x%3, 0x%2
+%endmacro
+;;;       func                  core, ver, snum
+slversion gf_6vect_dot_prod_avx, 02,  03,  0195

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_dot_prod_avx2.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_dot_prod_avx2.asm.s
new file mode 100644 (file)
index 0000000..7826fb2
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_dot_prod_avx2.asm.s
@@ -0,0 +1,334 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;;;
+;;; gf_6vect_dot_prod_avx2(len, vec, *g_tbls, **buffs, **dests);
+;;;
+;;; Author: Gregory Tucker
+
+
+%ifidn __OUTPUT_FORMAT__, elf64
+ %define arg0  rdi
+ %define arg1  rsi
+ %define arg2  rdx
+ %define arg3  rcx
+ %define arg4  r8
+ %define arg5  r9
+
+ %define tmp   r11
+ %define tmp.w r11d
+ %define tmp.b r11b
+ %define tmp2  r10
+ %define tmp3  r13             ; must be saved and restored
+ %define tmp4  r12             ; must be saved and restored
+ %define tmp5  r14             ; must be saved and restored
+ %define tmp6  r15             ; must be saved and restored
+ %define return rax
+ %define PS 8
+ %define LOG_PS 3
+
+ %define func(x) x:
+ %macro FUNC_SAVE 0
+       push    r12
+       push    r13
+       push    r14
+       push    r15
+ %endmacro
+ %macro FUNC_RESTORE 0
+       pop     r15
+       pop     r14
+       pop     r13
+       pop     r12
+ %endmacro
+%endif
+
+%ifidn __OUTPUT_FORMAT__, win64
+ %define arg0   rcx
+ %define arg1   rdx
+ %define arg2   r8
+ %define arg3   r9
+
+ %define arg4   r12            ; must be saved, loaded and restored
+ %define arg5   r15            ; must be saved and restored
+ %define tmp    r11
+ %define tmp.w  r11d
+ %define tmp.b  r11b
+ %define tmp2   r10
+ %define tmp3   r13            ; must be saved and restored
+ %define tmp4   r14            ; must be saved and restored
+ %define tmp5   rdi            ; must be saved and restored
+ %define tmp6   rsi            ; must be saved and restored
+ %define return rax
+ %define PS     8
+ %define LOG_PS 3
+ %define stack_size  10*16 + 7*8               ; must be an odd multiple of 8
+ %define arg(x)      [rsp + stack_size + PS + PS*x]
+
+ %define func(x) proc_frame x
+ %macro FUNC_SAVE 0
+       alloc_stack     stack_size
+       vmovdqa [rsp + 0*16], xmm6
+       vmovdqa [rsp + 1*16], xmm7
+       vmovdqa [rsp + 2*16], xmm8
+       vmovdqa [rsp + 3*16], xmm9
+       vmovdqa [rsp + 4*16], xmm10
+       vmovdqa [rsp + 5*16], xmm11
+       vmovdqa [rsp + 6*16], xmm12
+       vmovdqa [rsp + 7*16], xmm13
+       vmovdqa [rsp + 8*16], xmm14
+       vmovdqa [rsp + 9*16], xmm15
+       save_reg        r12,  10*16 + 0*8
+       save_reg        r13,  10*16 + 1*8
+       save_reg        r14,  10*16 + 2*8
+       save_reg        r15,  10*16 + 3*8
+       save_reg        rdi,  10*16 + 4*8
+       save_reg        rsi,  10*16 + 5*8
+       end_prolog
+       mov     arg4, arg(4)
+ %endmacro
+
+ %macro FUNC_RESTORE 0
+       vmovdqa xmm6, [rsp + 0*16]
+       vmovdqa xmm7, [rsp + 1*16]
+       vmovdqa xmm8, [rsp + 2*16]
+       vmovdqa xmm9, [rsp + 3*16]
+       vmovdqa xmm10, [rsp + 4*16]
+       vmovdqa xmm11, [rsp + 5*16]
+       vmovdqa xmm12, [rsp + 6*16]
+       vmovdqa xmm13, [rsp + 7*16]
+       vmovdqa xmm14, [rsp + 8*16]
+       vmovdqa xmm15, [rsp + 9*16]
+       mov     r12,  [rsp + 10*16 + 0*8]
+       mov     r13,  [rsp + 10*16 + 1*8]
+       mov     r14,  [rsp + 10*16 + 2*8]
+       mov     r15,  [rsp + 10*16 + 3*8]
+       mov     rdi,  [rsp + 10*16 + 4*8]
+       mov     rsi,  [rsp + 10*16 + 5*8]
+       add     rsp, stack_size
+ %endmacro
+%endif
+
+%define len    arg0
+%define vec    arg1
+%define mul_array arg2
+%define        src    arg3
+%define dest   arg4
+%define ptr    arg5
+%define vec_i  tmp2
+%define dest1  tmp3
+%define dest2  tmp4
+%define vskip1 tmp5
+%define vskip3 tmp6
+%define pos    return
+
+
+%ifndef EC_ALIGNED_ADDR
+;;; Use Un-aligned load/store
+ %define XLDR vmovdqu
+ %define XSTR vmovdqu
+%else
+;;; Use Non-temporal load/stor
+ %ifdef NO_NT_LDST
+  %define XLDR vmovdqa
+  %define XSTR vmovdqa
+ %else
+  %define XLDR vmovntdqa
+  %define XSTR vmovntdq
+ %endif
+%endif
+
+
+default rel
+
+[bits 64]
+section .text
+
+%define xmask0f   ymm15
+%define xmask0fx  xmm15
+%define xgft1_lo  ymm14
+%define xgft1_hi  ymm13
+%define xgft2_lo  ymm12
+%define xgft2_hi  ymm11
+%define xgft3_lo  ymm10
+%define xgft3_hi  ymm9
+%define x0     ymm0
+%define xtmpa  ymm1
+%define xp1    ymm2
+%define xp2    ymm3
+%define xp3    ymm4
+%define xp4    ymm5
+%define xp5    ymm6
+%define xp6    ymm7
+
+align 16
+global gf_6vect_dot_prod_avx2:function
+func(gf_6vect_dot_prod_avx2)
+       FUNC_SAVE
+       sub     len, 32
+       jl      .return_fail
+       xor     pos, pos
+       mov     tmp.b, 0x0f
+       vpinsrb xmask0fx, xmask0fx, tmp.w, 0
+       vpbroadcastb xmask0f, xmask0fx  ;Construct mask 0x0f0f0f...
+       mov     vskip1, vec
+       imul    vskip1, 32
+       mov     vskip3, vec
+       imul    vskip3, 96
+       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
+       mov     dest1, [dest]
+       mov     dest2, [dest+PS]
+
+
+.loop32:
+       mov     tmp, mul_array
+       xor     vec_i, vec_i
+       vpxor   xp1, xp1
+       vpxor   xp2, xp2
+       vpxor   xp3, xp3
+       vpxor   xp4, xp4
+       vpxor   xp5, xp5
+       vpxor   xp6, xp6
+
+.next_vect:
+       mov     ptr, [src+vec_i]
+       XLDR    x0, [ptr+pos]           ;Get next source vector
+       add     vec_i, PS
+
+       vpand   xgft3_lo, x0, xmask0f   ;Mask low src nibble in bits 4-0
+       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
+       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
+       vperm2i128 xtmpa, xgft3_lo, x0, 0x30    ;swap xtmpa from 1lo|2lo to 1lo|2hi
+       vperm2i128 x0, xgft3_lo, x0, 0x12       ;swap x0 from    1hi|2hi to 1hi|2lo
+
+       vmovdqu xgft1_lo, [tmp]                 ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
+                                               ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
+       vmovdqu xgft2_lo, [tmp+vskip1*1]        ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
+                                               ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
+       vmovdqu xgft3_lo, [tmp+vskip1*2]        ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
+                                               ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
+       lea     ptr, [vskip1 + vskip1*4]        ;ptr = vskip5
+
+       vperm2i128 xgft1_hi, xgft1_lo, xgft1_lo, 0x01 ; swapped to hi | lo
+       vperm2i128 xgft2_hi, xgft2_lo, xgft2_lo, 0x01 ; swapped to hi | lo
+       vperm2i128 xgft3_hi, xgft3_lo, xgft3_lo, 0x01 ; swapped to hi | lo
+
+       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
+       vpxor   xp1, xgft1_hi           ;xp1 += partial
+
+       vpshufb xgft2_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft2_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft2_hi, xgft2_lo      ;GF add high and low partials
+       vpxor   xp2, xgft2_hi           ;xp2 += partial
+
+       vpshufb xgft3_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft3_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft3_hi, xgft3_lo      ;GF add high and low partials
+       vpxor   xp3, xgft3_hi           ;xp3 += partial
+
+
+       vmovdqu xgft1_lo, [tmp+vskip3]          ;Load array Dx{00}, Dx{01}, ..., Dx{0f}
+                                               ;     "     Dx{00}, Dx{10}, ..., Dx{f0}
+       vmovdqu xgft2_lo, [tmp+vskip1*4]        ;Load array Ex{00}, Ex{01}, ..., Ex{0f}
+                                               ;     "     Ex{00}, Ex{10}, ..., Ex{f0}
+       vmovdqu xgft3_lo, [tmp+ptr]             ;Load array Fx{00}, Fx{01}, ..., Fx{0f}
+                                               ;     "     Fx{00}, Fx{10}, ..., Fx{f0}
+       add     tmp, 32
+       vperm2i128 xgft1_hi, xgft1_lo, xgft1_lo, 0x01 ; swapped to hi | lo
+       vperm2i128 xgft2_hi, xgft2_lo, xgft2_lo, 0x01 ; swapped to hi | lo
+       vperm2i128 xgft3_hi, xgft3_lo, xgft3_lo, 0x01 ; swapped to hi | lo
+
+       vpshufb xgft1_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft1_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft1_hi, xgft1_lo      ;GF add high and low partials
+       vpxor   xp4, xgft1_hi           ;xp4 += partial
+
+       vpshufb xgft2_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft2_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft2_hi, xgft2_lo      ;GF add high and low partials
+       vpxor   xp5, xgft2_hi           ;xp5 += partial
+
+       vpshufb xgft3_hi, x0            ;Lookup mul table of high nibble
+       vpshufb xgft3_lo, xtmpa         ;Lookup mul table of low nibble
+       vpxor   xgft3_hi, xgft3_lo      ;GF add high and low partials
+       vpxor   xp6, xgft3_hi           ;xp6 += partial
+
+       cmp     vec_i, vec
+       jl      .next_vect
+
+
+       mov     tmp, [dest+2*PS]
+       mov     ptr, [dest+3*PS]
+       mov     vec_i, [dest+4*PS]
+
+       XSTR    [dest1+pos], xp1
+       XSTR    [dest2+pos], xp2
+       XSTR    [tmp+pos], xp3
+       mov     tmp, [dest+5*PS]
+       XSTR    [ptr+pos], xp4
+       XSTR    [vec_i+pos], xp5
+       XSTR    [tmp+pos], xp6
+
+       add     pos, 32                 ;Loop on 32 bytes at a time
+       cmp     pos, len
+       jle     .loop32
+
+       lea     tmp, [len + 32]
+       cmp     pos, tmp
+       je      .return_pass
+
+       ;; Tail len
+       mov     pos, len        ;Overlapped offset length-16
+       jmp     .loop32         ;Do one more overlap pass
+
+.return_pass:
+       FUNC_RESTORE
+       mov     return, 0
+       ret
+
+.return_fail:
+       FUNC_RESTORE
+       mov     return, 1
+       ret
+
+endproc_frame
+
+section .data
+
+%macro slversion 4
+global %1_slver_%2%3%4
+global %1_slver
+%1_slver:
+%1_slver_%2%3%4:
+       dw 0x%4
+       db 0x%3, 0x%2
+%endmacro
+;;;       func                   core, ver, snum
+slversion gf_6vect_dot_prod_avx2, 04,  03,  019a

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_dot_prod_sse.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_dot_prod_sse.asm.s
new file mode 100644 (file)
index 0000000..23ef3d9
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/erasure_code/gf_6vect_dot_prod_sse.asm.s
@@ -0,0 +1,323 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;;;
+;;; gf_6vect_dot_prod_sse(len, vec, *g_tbls, **buffs, **dests);
+;;;
+;;; Author: Gregory Tucker
+
+
+%ifidn __OUTPUT_FORMAT__, elf64
+ %define arg0  rdi
+ %define arg1  rsi
+ %define arg2  rdx
+ %define arg3  rcx
+ %define arg4  r8
+ %define arg5  r9
+
+ %define tmp   r11
+ %define tmp2  r10
+ %define tmp3  r13             ; must be saved and restored
+ %define tmp4  r12             ; must be saved and restored
+ %define tmp5  r14             ; must be saved and restored
+ %define tmp6  r15             ; must be saved and restored
+ %define return rax
+ %define PS 8
+ %define LOG_PS 3
+
+ %define func(x) x:
+ %macro FUNC_SAVE 0
+       push    r12
+       push    r13
+       push    r14
+       push    r15
+ %endmacro
+ %macro FUNC_RESTORE 0
+       pop     r15
+       pop     r14
+       pop     r13
+       pop     r12
+ %endmacro
+%endif
+
+%ifidn __OUTPUT_FORMAT__, win64
+ %define arg0   rcx
+ %define arg1   rdx
+ %define arg2   r8
+ %define arg3   r9
+
+ %define arg4   r12            ; must be saved, loaded and restored
+ %define arg5   r15            ; must be saved and restored
+ %define tmp    r11
+ %define tmp2   r10
+ %define tmp3   r13            ; must be saved and restored
+ %define tmp4   r14            ; must be saved and restored
+ %define tmp5   rdi            ; must be saved and restored
+ %define tmp6   rsi            ; must be saved and restored
+ %define return rax
+ %define PS     8
+ %define LOG_PS 3
+ %define stack_size  10*16 + 7*8               ; must be an odd multiple of 8
+ %define arg(x)      [rsp + stack_size + PS + PS*x]
+
+ %define func(x) proc_frame x
+ %macro FUNC_SAVE 0
+       alloc_stack     stack_size
+       save_xmm128     xmm6, 0*16
+       save_xmm128     xmm7, 1*16
+       save_xmm128     xmm8, 2*16
+       save_xmm128     xmm9, 3*16
+       save_xmm128     xmm10, 4*16
+       save_xmm128     xmm11, 5*16
+       save_xmm128     xmm12, 6*16
+       save_xmm128     xmm13, 7*16
+       save_xmm128     xmm14, 8*16
+       save_xmm128     xmm15, 9*16
+       save_reg        r12,  10*16 + 0*8
+       save_reg        r13,  10*16 + 1*8
+       save_reg        r14,  10*16 + 2*8
+       save_reg        r15,  10*16 + 3*8
+       save_reg        rdi,  10*16 + 4*8
+       save_reg        rsi,  10*16 + 5*8
+       end_prolog
+       mov     arg4, arg(4)
+ %endmacro
+
+ %macro FUNC_RESTORE 0
+       movdqa  xmm6, [rsp + 0*16]
+       movdqa  xmm7, [rsp + 1*16]
+       movdqa  xmm8, [rsp + 2*16]
+       movdqa  xmm9, [rsp + 3*16]
+       movdqa  xmm10, [rsp + 4*16]
+       movdqa  xmm11, [rsp + 5*16]
+       movdqa  xmm12, [rsp + 6*16]
+       movdqa  xmm13, [rsp + 7*16]
+       movdqa  xmm14, [rsp + 8*16]
+       movdqa  xmm15, [rsp + 9*16]
+       mov     r12,  [rsp + 10*16 + 0*8]
+       mov     r13,  [rsp + 10*16 + 1*8]
+       mov     r14,  [rsp + 10*16 + 2*8]
+       mov     r15,  [rsp + 10*16 + 3*8]
+       mov     rdi,  [rsp + 10*16 + 4*8]
+       mov     rsi,  [rsp + 10*16 + 5*8]
+       add     rsp, stack_size
+ %endmacro
+%endif
+
+%define len    arg0
+%define vec    arg1
+%define mul_array arg2
+%define        src    arg3
+%define dest   arg4
+%define ptr    arg5
+%define vec_i  tmp2
+%define dest1  tmp3
+%define dest2  tmp4
+%define vskip1 tmp5
+%define vskip3 tmp6
+%define pos    return
+
+
+%ifndef EC_ALIGNED_ADDR
+;;; Use Un-aligned load/store
+ %define XLDR movdqu
+ %define XSTR movdqu
+%else
+;;; Use Non-temporal load/stor
+ %ifdef NO_NT_LDST
+  %define XLDR movdqa
+  %define XSTR movdqa
+ %else
+  %define XLDR movntdqa
+  %define XSTR movntdq
+ %endif
+%endif
+
+
+default rel
+
+[bits 64]
+section .text
+
+%define xmask0f   xmm15
+%define xgft1_lo  xmm14
+%define xgft1_hi  xmm13
+%define xgft2_lo  xmm12
+%define xgft2_hi  xmm11
+%define xgft3_lo  xmm10
+%define xgft3_hi  xmm9
+%define x0     xmm0
+%define xtmpa  xmm1
+%define xp1    xmm2
+%define xp2    xmm3
+%define xp3    xmm4
+%define xp4    xmm5
+%define xp5    xmm6
+%define xp6    xmm7
+
+align 16
+global gf_6vect_dot_prod_sse:function
+func(gf_6vect_dot_prod_sse)
+       FUNC_SAVE
+       sub     len, 16
+       jl      .return_fail
+       xor     pos, pos
+       movdqa  xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
+       mov     vskip1, vec
+       imul    vskip1, 32
+       mov     vskip3, vec
+       imul    vskip3, 96
+       sal     vec, LOG_PS             ;vec *= PS. Make vec_i count by PS
+       mov     dest1, [dest]
+       mov     dest2, [dest+PS]
+
+
+.loop16:
+       mov     tmp, mul_array
+       xor     vec_i, vec_i
+       pxor    xp1, xp1
+       pxor    xp2, xp2
+       pxor    xp3, xp3
+       pxor    xp4, xp4
+       pxor    xp5, xp5
+       pxor    xp6, xp6
+
+.next_vect:
+       mov     ptr, [src+vec_i]
+       add     vec_i, PS
+       XLDR    x0, [ptr+pos]           ;Get next source vector
+
+       movdqu  xgft1_lo, [tmp]                 ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
+       movdqu  xgft1_hi, [tmp+16]              ;     "     Ax{00}, Ax{10}, ..., Ax{f0}
+       movdqu  xgft2_lo, [tmp+vskip1*1]        ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
+       movdqu  xgft2_hi, [tmp+vskip1*1+16]     ;     "     Bx{00}, Bx{10}, ..., Bx{f0}
+       movdqu  xgft3_lo, [tmp+vskip1*2]        ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
+       movdqu  xgft3_hi, [tmp+vskip1*2+16]     ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
+       lea     ptr, [vskip1 + vskip1*4]        ;ptr = vskip5
+
+       movdqa  xtmpa, x0               ;Keep unshifted copy of src
+       psraw   x0, 4                   ;Shift to put high nibble into bits 4-0
+       pand    x0, xmask0f             ;Mask high src nibble in bits 4-0
+       pand    xtmpa, xmask0f          ;Mask low src nibble in bits 4-0
+
+       pshufb  xgft1_hi, x0            ;Lookup mul table of high nibble
+       pshufb  xgft1_lo, xtmpa         ;Lookup mul table of low nibble
+       pxor    xgft1_hi, xgft1_lo      ;GF add high and low partials
+       pxor    xp1, xgft1_hi           ;xp1 += partial
+
+       pshufb  xgft2_hi, x0            ;Lookup mul table of high nibble
+       pshufb  xgft2_lo, xtmpa         ;Lookup mul table of low nibble
+       pxor    xgft2_hi, xgft2_lo      ;GF add high and low partials
+       pxor    xp2, xgft2_hi           ;xp2 += partial
+
+       pshufb  xgft3_hi, x0            ;Lookup mul table of high nibble
+       pshufb  xgft3_lo, xtmpa         ;Lookup mul table of low nibble
+       pxor    xgft3_hi, xgft3_lo      ;GF add high and low partials
+       pxor    xp3, xgft3_hi           ;xp3 += partial
+
+
+       movdqu  xgft1_lo, [tmp+vskip3]          ;Load array Dx{00}, Dx{01}, ..., Dx{0f}
+       movdqu  xgft1_hi, [tmp+vskip3+16]       ;     "     Dx{00}, Dx{10}, ..., Dx{f0}
+       movdqu  xgft2_lo, [tmp+vskip1*4]        ;Load array Ex{00}, Ex{01}, ..., Ex{0f}
+       movdqu  xgft2_hi, [tmp+vskip1*4+16]     ;     "     Ex{00}, Ex{10}, ..., Ex{f0}
+       movdqu  xgft3_lo, [tmp+ptr]             ;Load array Fx{00}, Fx{01}, ..., Fx{0f}
+       movdqu  xgft3_hi, [tmp+ptr+16]          ;     "     Fx{00}, Fx{10}, ..., Fx{f0}
+       add     tmp, 32
+
+
+       pshufb  xgft1_hi, x0            ;Lookup mul table of high nibble
+       pshufb  xgft1_lo, xtmpa         ;Lookup mul table of low nibble
+       pxor    xgft1_hi, xgft1_lo      ;GF add high and low partials
+       pxor    xp4, xgft1_hi           ;xp4 += partial
+
+       pshufb  xgft2_hi, x0            ;Lookup mul table of high nibble
+       pshufb  xgft2_lo, xtmpa         ;Lookup mul table of low nibble
+       pxor    xgft2_hi, xgft2_lo      ;GF add high and low partials
+       pxor    xp5, xgft2_hi           ;xp5 += partial
+
+       pshufb  xgft3_hi, x0            ;Lookup mul table of high nibble
+       pshufb  xgft3_lo, xtmpa         ;Lookup mul table of low nibble
+       pxor    xgft3_hi, xgft3_lo      ;GF add high and low partials
+       pxor    xp6, xgft3_hi           ;xp6 += partial
+
+       cmp     vec_i, vec
+       jl      .next_vect
+
+
+       mov     tmp, [dest+2*PS]
+       mov     ptr, [dest+3*PS]
+       mov     vec_i, [dest+4*PS]
+
+       XSTR    [dest1+pos], xp1
+       XSTR    [dest2+pos], xp2
+       XSTR    [tmp+pos], xp3
+       mov     tmp, [dest+5*PS]
+       XSTR    [ptr+pos], xp4
+       XSTR    [vec_i+pos], xp5
+       XSTR    [tmp+pos], xp6
+
+       add     pos, 16                 ;Loop on 16 bytes at a time
+       cmp     pos, len
+       jle     .loop16
+
+       lea     tmp, [len + 16]
+       cmp     pos, tmp
+       je      .return_pass
+
+       ;; Tail len
+       mov     pos, len        ;Overlapped offset length-16
+       jmp     .loop16         ;Do one more overlap pass
+
+.return_pass:
+       FUNC_RESTORE
+       mov     return, 0
+       ret
+
+.return_fail:
+       FUNC_RESTORE
+       mov     return, 1
+       ret
+
+endproc_frame
+
+section .data
+
+align 16
+mask0f:        ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
+
+%macro slversion 4
+global %1_slver_%2%3%4
+global %1_slver
+%1_slver:
+%1_slver_%2%3%4:
+       dw 0x%4
+       db 0x%3, 0x%2
+%endmacro
+;;;       func                  core, ver, snum
+slversion gf_6vect_dot_prod_sse, 00,  03,  0066

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_vect_dot_prod_avx.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_vect_dot_prod_avx.asm.s
new file mode 100644 (file)
index 0000000..ddc3042
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/erasure_code/gf_vect_dot_prod_avx.asm.s
@@ -0,0 +1,198 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;;;
+;;; gf_vect_dot_prod_avx(len, vec, *g_tbls, **buffs, *dest);
+;;;
+;;; Author: Gregory Tucker
+
+
+%ifidn __OUTPUT_FORMAT__, elf64
+ %define arg0  rdi
+ %define arg1  rsi
+ %define arg2  rdx
+ %define arg3  rcx
+ %define arg4  r8
+ %define arg5  r9
+
+ %define tmp   r11
+ %define tmp2  r10
+ %define tmp3  r9
+ %define return rax
+ %define PS 8
+ %define func(x) x:
+ %define FUNC_SAVE
+ %define FUNC_RESTORE
+%endif
+
+%ifidn __OUTPUT_FORMAT__, win64
+ %define arg0   rcx
+ %define arg1   rdx
+ %define arg2   r8
+ %define arg3   r9
+
+ %define arg4   r12            ; must be saved and loaded
+ %define tmp    r11
+ %define tmp2   r10
+ %define tmp3   rdi            ; must be saved and loaded
+ %define return rax
+ %define PS 8
+ %define frame_size 2*8
+ %define arg(x)      [rsp + frame_size + PS + PS*x]
+
+ %define func(x) proc_frame x
+ %macro FUNC_SAVE 0
+       rex_push_reg    r12
+       push_reg        rdi
+       end_prolog
+       mov     arg4, arg(4)
+ %endmacro
+
+ %macro FUNC_RESTORE 0
+       pop     rdi
+       pop     r12
+ %endmacro
+%endif
+
+
+%define len   arg0
+%define vec   arg1
+%define mul_array arg2
+%define        src   arg3
+%define dest  arg4
+
+%define vec_i tmp2
+%define ptr   tmp3
+%define pos   return
+
+%ifndef EC_ALIGNED_ADDR
+;;; Use Un-aligned load/store
+ %define XLDR vmovdqu
+ %define XSTR vmovdqu
+%else
+;;; Use Non-temporal load/stor
+ %ifdef NO_NT_LDST
+  %define XLDR vmovdqa
+  %define XSTR vmovdqa
+ %else
+  %define XLDR vmovntdqa
+  %define XSTR vmovntdq
+ %endif
+%endif
+
+
+default rel
+
+[bits 64]
+section .text
+
+%define xmask0f  xmm5
+%define xgft_lo  xmm4
+%define xgft_hi  xmm3
+
+%define x0     xmm0
+%define xtmpa  xmm1
+%define xp     xmm2
+
+align 16
+global gf_vect_dot_prod_avx:function
+func(gf_vect_dot_prod_avx)
+       FUNC_SAVE
+       sub     len, 16
+       jl      .return_fail
+       xor     pos, pos
+       vmovdqa xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
+
+.loop16:
+       vpxor   xp, xp
+       mov     tmp, mul_array
+       xor     vec_i, vec_i
+
+.next_vect:
+       mov     ptr, [src+vec_i*PS]
+       vmovdqu xgft_lo, [tmp]          ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
+       vmovdqu xgft_hi, [tmp+16]       ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
+       XLDR    x0, [ptr+pos]           ;Get next source vector
+       add     tmp, 32
+       add     vec_i, 1
+
+       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
+       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
+       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
+
+       vpshufb xgft_hi, xgft_hi, x0    ;Lookup mul table of high nibble
+       vpshufb xgft_lo, xgft_lo, xtmpa ;Lookup mul table of low nibble
+       vpxor   xgft_hi, xgft_hi, xgft_lo ;GF add high and low partials
+       vpxor   xp, xp, xgft_hi         ;xp += partial
+       cmp     vec_i, vec
+       jl      .next_vect
+
+       XSTR    [dest+pos], xp
+       add     pos, 16                 ;Loop on 16 bytes at a time
+       cmp     pos, len
+       jle     .loop16
+
+       lea     tmp, [len + 16]
+       cmp     pos, tmp
+       je      .return_pass
+
+       ;; Tail len
+       mov     pos, len        ;Overlapped offset length-16
+       jmp     .loop16         ;Do one more overlap pass
+
+.return_pass:
+       mov     return, 0
+       FUNC_RESTORE
+       ret
+
+.return_fail:
+       mov     return, 1
+       FUNC_RESTORE
+       ret
+
+endproc_frame
+
+section .data
+
+align 16
+
+poly:
+mask0f:
+ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
+
+%macro slversion 4
+global %1_slver_%2%3%4
+global %1_slver
+%1_slver:
+%1_slver_%2%3%4:
+       dw 0x%4
+       db 0x%3, 0x%2
+%endmacro
+;;;       func                 core, ver, snum
+slversion gf_vect_dot_prod_avx, 02,  03,  0061

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_vect_dot_prod_avx2.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_vect_dot_prod_avx2.asm.s
new file mode 100644 (file)
index 0000000..7eebd27
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/erasure_code/gf_vect_dot_prod_avx2.asm.s
@@ -0,0 +1,203 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;;;
+;;; gf_vect_dot_prod_avx2(len, vec, *g_tbls, **buffs, *dest);
+;;;
+;;; Author: Gregory Tucker
+
+
+%ifidn __OUTPUT_FORMAT__, elf64
+ %define arg0  rdi
+ %define arg1  rsi
+ %define arg2  rdx
+ %define arg3  rcx
+ %define arg4  r8
+ %define arg5  r9
+
+ %define tmp   r11
+ %define tmp.w r11d
+ %define tmp.b r11b
+ %define tmp2  r10
+ %define tmp3  r9
+ %define return rax
+ %define PS 8
+ %define func(x) x:
+ %define FUNC_SAVE
+ %define FUNC_RESTORE
+%endif
+
+%ifidn __OUTPUT_FORMAT__, win64
+ %define arg0   rcx
+ %define arg1   rdx
+ %define arg2   r8
+ %define arg3   r9
+
+ %define arg4   r12            ; must be saved and loaded
+ %define tmp    r11
+ %define tmp.w  r11d
+ %define tmp.b  r11b
+ %define tmp2   r10
+ %define tmp3   rdi            ; must be saved and loaded
+ %define return rax
+ %define PS 8
+ %define frame_size 2*8
+ %define arg(x)      [rsp + frame_size + PS + PS*x]
+
+ %define func(x) proc_frame x
+ %macro FUNC_SAVE 0
+       rex_push_reg    r12
+       push_reg        rdi
+       end_prolog
+       mov     arg4, arg(4)
+ %endmacro
+
+ %macro FUNC_RESTORE 0
+       pop     rdi
+       pop     r12
+ %endmacro
+%endif
+
+
+%define len   arg0
+%define vec   arg1
+%define mul_array arg2
+%define        src   arg3
+%define dest  arg4
+
+%define vec_i tmp2
+%define ptr   tmp3
+%define pos   return
+
+%ifndef EC_ALIGNED_ADDR
+;;; Use Un-aligned load/store
+ %define XLDR vmovdqu
+ %define XSTR vmovdqu
+%else
+;;; Use Non-temporal load/stor
+ %ifdef NO_NT_LDST
+  %define XLDR vmovdqa
+  %define XSTR vmovdqa
+ %else
+  %define XLDR vmovntdqa
+  %define XSTR vmovntdq
+ %endif
+%endif
+
+
+default rel
+
+[bits 64]
+section .text
+
+%define xmask0f  ymm3
+%define xmask0fx xmm3
+%define xgft_lo  ymm4
+%define xgft_hi  ymm5
+
+%define x0     ymm0
+%define xtmpa  ymm1
+%define xp     ymm2
+
+align 16
+global gf_vect_dot_prod_avx2:function
+func(gf_vect_dot_prod_avx2)
+       FUNC_SAVE
+       sub     len, 32
+       jl      .return_fail
+       xor     pos, pos
+       mov     tmp.b, 0x0f
+       vpinsrb xmask0fx, xmask0fx, tmp.w, 0
+       vpbroadcastb xmask0f, xmask0fx  ;Construct mask 0x0f0f0f...
+
+.loop32:
+       vpxor   xp, xp
+       mov     tmp, mul_array
+       xor     vec_i, vec_i
+
+.next_vect:
+       mov     ptr, [src+vec_i*PS]
+
+       vmovdqu xgft_lo, [tmp]          ;Load array Cx{00}, Cx{01}, Cx{02}, ...
+                                       ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
+       vperm2i128 xgft_hi, xgft_lo, xgft_lo, 0x11 ; swapped to hi | hi
+       vperm2i128 xgft_lo, xgft_lo, xgft_lo, 0x00 ; swapped to lo | lo
+
+       XLDR    x0, [ptr+pos]           ;Get next source vector
+       add     tmp, 32
+       add     vec_i, 1
+
+       vpand   xtmpa, x0, xmask0f      ;Mask low src nibble in bits 4-0
+       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
+       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
+
+       vpshufb xgft_hi, xgft_hi, x0    ;Lookup mul table of high nibble
+       vpshufb xgft_lo, xgft_lo, xtmpa ;Lookup mul table of low nibble
+       vpxor   xgft_hi, xgft_hi, xgft_lo ;GF add high and low partials
+       vpxor   xp, xp, xgft_hi         ;xp += partial
+       cmp     vec_i, vec
+       jl      .next_vect
+
+       XSTR    [dest+pos], xp
+       add     pos, 32                 ;Loop on 32 bytes at a time
+       cmp     pos, len
+       jle     .loop32
+
+       lea     tmp, [len + 32]
+       cmp     pos, tmp
+       je      .return_pass
+
+       ;; Tail len
+       mov     pos, len        ;Overlapped offset length-32
+       jmp     .loop32         ;Do one more overlap pass
+
+.return_pass:
+       mov     return, 0
+       FUNC_RESTORE
+       ret
+
+.return_fail:
+       mov     return, 1
+       FUNC_RESTORE
+       ret
+
+endproc_frame
+
+section .data
+
+%macro slversion 4
+global %1_slver_%2%3%4
+global %1_slver
+%1_slver:
+%1_slver_%2%3%4:
+       dw 0x%4
+       db 0x%3, 0x%2
+%endmacro
+;;;       func                  core, ver, snum
+slversion gf_vect_dot_prod_avx2, 04,  03,  0190

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_vect_dot_prod_sse.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_vect_dot_prod_sse.asm.s
new file mode 100644 (file)
index 0000000..fd51ee5
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/erasure_code/gf_vect_dot_prod_sse.asm.s
@@ -0,0 +1,195 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;;;
+;;; gf_vect_dot_prod_sse(len, vec, *g_tbls, **buffs, *dest);
+;;;
+;;; Author: Gregory Tucker
+
+
+%ifidn __OUTPUT_FORMAT__, elf64
+ %define arg0  rdi
+ %define arg1  rsi
+ %define arg2  rdx
+ %define arg3  rcx
+ %define arg4  r8
+
+ %define tmp   r11
+ %define tmp2  r10
+ %define tmp3  r9
+ %define return rax
+ %define PS 8
+ %define func(x) x:
+ %define FUNC_SAVE
+ %define FUNC_RESTORE
+%endif
+
+%ifidn __OUTPUT_FORMAT__, win64
+ %define arg0   rcx
+ %define arg1   rdx
+ %define arg2   r8
+ %define arg3   r9
+
+ %define arg4   r12            ; must be saved and loaded
+ %define tmp    r11
+ %define tmp2   r10
+ %define tmp3   rdi            ; must be saved and loaded
+ %define return rax
+ %define PS 8
+ %define frame_size 2*8
+ %define arg(x)      [rsp + frame_size + PS + PS*x]
+
+ %define func(x) proc_frame x
+ %macro FUNC_SAVE 0
+       rex_push_reg    r12
+       push_reg        rdi
+       end_prolog
+       mov     arg4, arg(4)
+ %endmacro
+
+ %macro FUNC_RESTORE 0
+       pop     rdi
+       pop     r12
+ %endmacro
+%endif
+
+
+%define len   arg0
+%define vec   arg1
+%define mul_array arg2
+%define        src   arg3
+%define dest  arg4
+
+%define vec_i tmp2
+%define ptr   tmp3
+%define pos   return
+
+
+%ifndef EC_ALIGNED_ADDR
+;;; Use Un-aligned load/store
+ %define XLDR movdqu
+ %define XSTR movdqu
+%else
+;;; Use Non-temporal load/stor
+ %ifdef NO_NT_LDST
+  %define XLDR movdqa
+  %define XSTR movdqa
+ %else
+  %define XLDR movntdqa
+  %define XSTR movntdq
+ %endif
+%endif
+
+
+default rel
+
+[bits 64]
+section .text
+
+%define xmask0f  xmm5
+%define xgft_lo  xmm4
+%define xgft_hi  xmm3
+
+%define x0     xmm0
+%define xtmpa  xmm1
+%define xp     xmm2
+
+align 16
+global gf_vect_dot_prod_sse:function
+func(gf_vect_dot_prod_sse)
+       FUNC_SAVE
+       sub     len, 16
+       jl      .return_fail
+       xor     pos, pos
+       movdqa  xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
+
+.loop16:
+       pxor    xp, xp
+       mov     tmp, mul_array
+       xor     vec_i, vec_i
+
+.next_vect:
+       mov     ptr, [src+vec_i*PS]
+       movdqu  xgft_lo, [tmp]          ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
+       movdqu  xgft_hi, [tmp+16]       ;     "     Cx{00}, Cx{10}, ..., Cx{f0}
+       XLDR    x0, [ptr+pos]           ;Get next source vector
+       add     tmp, 32
+       add     vec_i, 1
+       movdqa  xtmpa, x0               ;Keep unshifted copy of src
+       psraw   x0, 4                   ;Shift to put high nibble into bits 4-0
+       pand    x0, xmask0f             ;Mask high src nibble in bits 4-0
+       pand    xtmpa, xmask0f          ;Mask low src nibble in bits 4-0
+       pshufb  xgft_hi, x0             ;Lookup mul table of high nibble
+       pshufb  xgft_lo, xtmpa          ;Lookup mul table of low nibble
+       pxor    xgft_hi, xgft_lo        ;GF add high and low partials
+       pxor    xp, xgft_hi             ;xp += partial
+       cmp     vec_i, vec
+       jl      .next_vect
+
+       XSTR    [dest+pos], xp
+
+       add     pos, 16                 ;Loop on 16 bytes at a time
+       cmp     pos, len
+       jle     .loop16
+
+       lea     tmp, [len + 16]
+       cmp     pos, tmp
+       je      .return_pass
+
+       ;; Tail len
+       mov     pos, len        ;Overlapped offset length-16
+       jmp     .loop16         ;Do one more overlap pass
+
+.return_pass:
+       mov     return, 0
+       FUNC_RESTORE
+       ret
+
+.return_fail:
+       mov     return, 1
+       FUNC_RESTORE
+       ret
+
+endproc_frame
+
+section .data
+
+align 16
+mask0f:        ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
+
+%macro slversion 4
+global %1_slver_%2%3%4
+global %1_slver
+%1_slver:
+%1_slver_%2%3%4:
+       dw 0x%4
+       db 0x%3, 0x%2
+%endmacro
+;;;       func                 core, ver, snum
+slversion gf_vect_dot_prod_sse, 00,  03,  0060

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_vect_mul_avx.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_vect_mul_avx.asm.s
new file mode 100644 (file)
index 0000000..b60a6eb
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/erasure_code/gf_vect_mul_avx.asm.s
@@ -0,0 +1,172 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;;;
+;;; gf_vect_mul_avx(len, mul_array, src, dest)
+;;;
+;;; Author: Gregory Tucker
+
+
+%ifidn __OUTPUT_FORMAT__, elf64
+ %define arg0  rdi
+ %define arg1  rsi
+ %define arg2  rdx
+ %define arg3  rcx
+ %define arg4  r8
+ %define arg5  r9
+ %define tmp   r11
+ %define return rax
+ %define func(x) x:
+ %define FUNC_SAVE
+ %define FUNC_RESTORE
+
+%elifidn __OUTPUT_FORMAT__, win64
+ %define arg0  rcx
+ %define arg1  rdx
+ %define arg2  r8
+ %define arg3  r9
+ %define return rax
+ %define stack_size  5*16 + 8  ; must be an odd multiple of 8
+ %define func(x) proc_frame x
+ %macro FUNC_SAVE 0
+       alloc_stack     stack_size
+       save_xmm128     xmm6, 0*16
+       save_xmm128     xmm7, 1*16
+       save_xmm128     xmm13, 2*16
+       save_xmm128     xmm14, 3*16
+       save_xmm128     xmm15, 4*16
+       end_prolog
+ %endmacro
+
+ %macro FUNC_RESTORE 0
+       vmovdqa xmm6, [rsp + 0*16]
+       vmovdqa xmm7, [rsp + 1*16]
+       vmovdqa xmm13, [rsp + 2*16]
+       vmovdqa xmm14, [rsp + 3*16]
+       vmovdqa xmm15, [rsp + 4*16]
+       add     rsp, stack_size
+ %endmacro
+
+%endif
+
+
+%define len   arg0
+%define mul_array arg1
+%define        src   arg2
+%define dest  arg3
+%define pos   return
+
+
+;;; Use Non-temporal load/stor
+%ifdef NO_NT_LDST
+ %define XLDR vmovdqa
+ %define XSTR vmovdqa
+%else
+ %define XLDR vmovntdqa
+ %define XSTR vmovntdq
+%endif
+
+default rel
+
+[bits 64]
+section .text
+
+%define xmask0f  xmm15
+%define xgft_lo  xmm14
+%define xgft_hi  xmm13
+
+%define x0     xmm0
+%define xtmp1a xmm1
+%define xtmp1b xmm2
+%define xtmp1c xmm3
+%define x1     xmm4
+%define xtmp2a xmm5
+%define xtmp2b xmm6
+%define xtmp2c xmm7
+
+align 16
+global gf_vect_mul_avx:function
+func(gf_vect_mul_avx)
+       FUNC_SAVE
+       mov     pos, 0
+       vmovdqa xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
+       vmovdqu xgft_lo, [mul_array]    ;Load array Cx{00}, Cx{01}, Cx{02}, ...
+       vmovdqu xgft_hi, [mul_array+16] ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
+
+loop32:
+       XLDR    x0, [src+pos]           ;Get next source vector
+       XLDR    x1, [src+pos+16]        ;Get next source vector + 16B ahead
+       add     pos, 32                 ;Loop on 16 bytes at a time
+       cmp     pos, len
+       vpand   xtmp1a, x0, xmask0f     ;Mask low src nibble in bits 4-0
+       vpand   xtmp2a, x1, xmask0f
+       vpsraw  x0, x0, 4               ;Shift to put high nibble into bits 4-0
+       vpsraw  x1, x1, 4
+       vpand   x0, x0, xmask0f         ;Mask high src nibble in bits 4-0
+       vpand   x1, x1, xmask0f
+       vpshufb xtmp1b, xgft_hi, x0     ;Lookup mul table of high nibble
+       vpshufb xtmp1c, xgft_lo, xtmp1a ;Lookup mul table of low nibble
+       vpshufb xtmp2b, xgft_hi, x1     ;Lookup mul table of high nibble
+       vpshufb xtmp2c, xgft_lo, xtmp2a ;Lookup mul table of low nibble
+       vpxor   xtmp1b, xtmp1b, xtmp1c  ;GF add high and low partials
+       vpxor   xtmp2b, xtmp2b, xtmp2c
+       XSTR    [dest+pos-32], xtmp1b   ;Store result
+       XSTR    [dest+pos-16], xtmp2b   ;Store +16B result
+       jl      loop32
+
+
+return_pass:
+       FUNC_RESTORE
+       sub     pos, len
+       ret
+
+return_fail:
+       FUNC_RESTORE
+       mov     return, 1
+       ret
+
+endproc_frame
+
+section .data
+
+align 16
+
+mask0f:
+ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
+
+%macro slversion 4
+global %1_slver_%2%3%4
+global %1_slver
+%1_slver:
+%1_slver_%2%3%4:
+       dw 0x%4
+       db 0x%3, 0x%2
+%endmacro
+;;;       func             core, ver, snum
+slversion gf_vect_mul_avx, 01,   02,  0036

diff --git a/src/erasure-code/isa/isa-l/erasure_code/gf_vect_mul_sse.asm.s b/src/erasure-code/isa/isa-l/erasure_code/gf_vect_mul_sse.asm.s
new file mode 100644 (file)
index 0000000..3d5fb94
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/erasure_code/gf_vect_mul_sse.asm.s
@@ -0,0 +1,178 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;;;
+;;; gf_vect_mul_sse(len, mul_array, src, dest)
+;;;
+;;; Author: Gregory Tucker
+
+
+%ifidn __OUTPUT_FORMAT__, elf64
+ %define arg0  rdi
+ %define arg1  rsi
+ %define arg2  rdx
+ %define arg3  rcx
+ %define arg4  r8
+ %define arg5  r9
+ %define tmp   r11
+ %define return rax
+ %define func(x) x:
+ %define FUNC_SAVE
+ %define FUNC_RESTORE
+
+%elifidn __OUTPUT_FORMAT__, win64
+ %define arg0  rcx
+ %define arg1  rdx
+ %define arg2  r8
+ %define arg3  r9
+ %define return rax
+ %define stack_size  5*16 + 8  ; must be an odd multiple of 8
+ %define func(x) proc_frame x
+ %macro FUNC_SAVE 0
+       alloc_stack     stack_size
+       save_xmm128     xmm6, 0*16
+       save_xmm128     xmm7, 1*16
+       save_xmm128     xmm13, 2*16
+       save_xmm128     xmm14, 3*16
+       save_xmm128     xmm15, 4*16
+       end_prolog
+ %endmacro
+
+ %macro FUNC_RESTORE 0
+       movdqa  xmm6, [rsp + 0*16]
+       movdqa  xmm7, [rsp + 1*16]
+       movdqa  xmm13, [rsp + 2*16]
+       movdqa  xmm14, [rsp + 3*16]
+       movdqa  xmm15, [rsp + 4*16]
+       add     rsp, stack_size
+ %endmacro
+
+%endif
+
+
+%define len    arg0
+%define mul_array arg1
+%define        src    arg2
+%define dest   arg3
+%define pos    return
+
+
+;;; Use Non-temporal load/stor
+%ifdef NO_NT_LDST
+ %define XLDR movdqa
+ %define XSTR movdqa
+%else
+ %define XLDR movntdqa
+ %define XSTR movntdq
+%endif
+
+default rel
+
+[bits 64]
+section .text
+
+%define xmask0f  xmm15
+%define xgft_lo  xmm14
+%define xgft_hi  xmm13
+
+%define x0     xmm0
+%define xtmp1a xmm1
+%define xtmp1b xmm2
+%define xtmp1c xmm3
+%define x1     xmm4
+%define xtmp2a xmm5
+%define xtmp2b xmm6
+%define xtmp2c xmm7
+
+
+align 16
+global gf_vect_mul_sse:function
+func(gf_vect_mul_sse)
+       FUNC_SAVE
+       mov     pos, 0
+       movdqa  xmask0f, [mask0f]       ;Load mask of lower nibble in each byte
+       movdqu  xgft_lo, [mul_array]    ;Load array Cx{00}, Cx{01}, Cx{02}, ...
+       movdqu  xgft_hi, [mul_array+16] ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
+
+loop32:
+       XLDR    x0, [src+pos]           ;Get next source vector
+       XLDR    x1, [src+pos+16]        ;Get next source vector + 16B ahead
+       movdqa  xtmp1b, xgft_hi         ;Reload const array registers
+       movdqa  xtmp1c, xgft_lo
+       movdqa  xtmp2b, xgft_hi
+       movdqa  xtmp2c, xgft_lo
+       movdqa  xtmp1a, x0              ;Keep unshifted copy of src
+       movdqa  xtmp2a, x1
+       psraw   x0, 4                   ;Shift to put high nibble into bits 4-0
+       psraw   x1, 4
+       pand    xtmp1a, xmask0f         ;Mask low src nibble in bits 4-0
+       pand    xtmp2a, xmask0f
+       pand    x0, xmask0f             ;Mask high src nibble in bits 4-0
+       pand    x1, xmask0f
+       pshufb  xtmp1b, x0              ;Lookup mul table of high nibble
+       pshufb  xtmp1c, xtmp1a          ;Lookup mul table of low nibble
+       pshufb  xtmp2b, x1
+       pshufb  xtmp2c, xtmp2a
+       pxor    xtmp1b, xtmp1c          ;GF add high and low partials
+       pxor    xtmp2b, xtmp2c
+       XSTR    [dest+pos], xtmp1b      ;Store result
+       XSTR    [dest+pos+16], xtmp2b   ;Store +16B result
+       add     pos, 32                 ;Loop on 32 bytes at at time
+       cmp     pos, len
+       jl      loop32
+
+
+return_pass:
+       sub     pos, len
+       FUNC_RESTORE
+       ret
+
+return_fail:
+       mov     return, 1
+       FUNC_RESTORE
+       ret
+
+endproc_frame
+
+section .data
+
+align 16
+mask0f:
+ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
+
+%macro slversion 4
+global %1_slver_%2%3%4
+global %1_slver
+%1_slver:
+%1_slver_%2%3%4:
+       dw 0x%4
+       db 0x%3, 0x%2
+%endmacro
+;;;       func        core, ver, snum
+slversion gf_vect_mul_sse, 00,   02,  0034

diff --git a/src/erasure-code/isa/isa-l/include/erasure_code.h b/src/erasure-code/isa/isa-l/include/erasure_code.h
new file mode 100644 (file)
index 0000000..0f3b6db
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/include/erasure_code.h
@@ -0,0 +1,659 @@
+/**********************************************************************
+  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in
+      the documentation and/or other materials provided with the
+      distribution.
+    * Neither the name of Intel Corporation nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**********************************************************************/
+
+
+#ifndef _ERASURE_CODE_H_
+#define _ERASURE_CODE_H_
+
+/**
+ *  @file erasure_code.h
+ *  @brief Interface to functions supporting erasure code encode and decode.
+ *
+ *  This file defines the interface to optimized functions used in erasure
+ *  codes.  Encode and decode of erasures in GF(2^8) are made by calculating the
+ *  dot product of the symbols (bytes in GF(2^8)) across a set of buffers and a
+ *  set of coefficients.  Values for the coefficients are determined by the type
+ *  of erasure code.  Using a general dot product means that any sequence of
+ *  coefficients may be used including erasure codes based on random
+ *  coefficients.
+ *  Multiple versions of dot product are supplied to calculate 1-6 output
+ *  vectors in one pass.
+ *  Base GF multiply and divide functions can be sped up by defining
+ *  GF_LARGE_TABLES at the expense of memory size.
+ *
+ */
+
+#include "gf_vect_mul.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Initialize tables for fast Erasure Code encode and decode.
+ *
+ * Generates the expanded tables needed for fast encode or decode for erasure
+ * codes on blocks of data.  32bytes is generated for each input coefficient.
+ *
+ * @param k      The number of vector sources or rows in the generator matrix
+ *               for coding.
+ * @param rows   The number of output vectors to concurrently encode/decode.
+ * @param a      Pointer to sets of arrays of input coefficients used to encode
+ *               or decode data.
+ * @param gftbls Pointer to start of space for concatenated output tables
+ *               generated from input coefficients.  Must be of size 32*k*rows.
+ * @returns none
+ */
+
+void ec_init_tables(int k, int rows, unsigned char* a, unsigned char* gftbls);
+
+/**
+ * @brief Generate or decode erasure codes on blocks of data.
+ *
+ * Given a list of source data blocks, generate one or multiple blocks of
+ * encoded data as specified by a matrix of GF(2^8) coefficients. When given a
+ * suitable set of coefficients, this function will perform the fast generation
+ * or decoding of Reed-Solomon type erasure codes.
+ *
+ * @requires SSE4.1
+ * @param len    Length of each block of data (vector) of source or dest data.
+ * @param k      The number of vector sources or rows in the generator matrix
+ *              for coding.
+ * @param rows   The number of output vectors to concurrently encode/decode.
+ * @param gftbls Pointer to array of input tables generated from coding
+ *               coefficients in ec_init_tables(). Must be of size 32*k*rows
+ * @param data   Array of pointers to source input buffers.
+ * @param coding Array of pointers to coded output buffers.
+ * @returns none
+ */
+
+void ec_encode_data_sse(int len, int k, int rows, unsigned char *gftbls, unsigned char **data, unsigned char **coding);
+
+
+/**
+ * @brief Generate or decode erasure codes on blocks of data, runs appropriate version.
+ *
+ * Given a list of source data blocks, generate one or multiple blocks of
+ * encoded data as specified by a matrix of GF(2^8) coefficients. When given a
+ * suitable set of coefficients, this function will perform the fast generation
+ * or decoding of Reed-Solomon type erasure codes.
+ *
+ * This function determines what instruction sets are enabled and
+ * selects the appropriate version at runtime.
+ *
+ * @param len    Length of each block of data (vector) of source or dest data.
+ * @param k      The number of vector sources or rows in the generator matrix
+ *              for coding.
+ * @param rows   The number of output vectors to concurrently encode/decode.
+ * @param gftbls Pointer to array of input tables generated from coding
+ *              coefficients in ec_init_tables(). Must be of size 32*k*rows
+ * @param data   Array of pointers to source input buffers.
+ * @param coding Array of pointers to coded output buffers.
+ * @returns none
+ */
+
+void ec_encode_data(int len, int k, int rows, unsigned char *gftbls, unsigned char **data, unsigned char **coding);
+
+
+/**
+ * @brief Generate or decode erasure codes on blocks of data, runs baseline version.
+ *
+ * Given a list of source data blocks, generate one or multiple blocks of
+ * encoded data as specified by a matrix of GF(2^8) coefficients.  When given a
+ * suitable set of coefficients, this function will perform the fast generation
+ * or decoding of Reed-Solomon type erasure codes.
+ *
+ * @param len    Length of each block of data (vector) of source or dest data.
+ * @param srcs   The number of vector sources or rows in the generator matrix
+ *              for coding.
+ * @param dests  The number of output vectors to concurrently encode/decode.
+ * @param v      Pointer to array of input tables generated from coding
+ *              coefficients in ec_init_tables(). Must be of size 32*k*rows
+ * @param src    Array of pointers to source input buffers.
+ * @param dest   Array of pointers to coded output buffers.
+ * @returns none
+ */
+
+void ec_encode_data_base(int len, int srcs, int dests, unsigned char *v, unsigned char **src, unsigned char **dest);
+
+
+/**
+ * @brief GF(2^8) vector dot product.
+ *
+ * Does a GF(2^8) dot product across each byte of the input array and a constant
+ * set of coefficients to produce each byte of the output. Can be used for
+ * erasure coding encode and decode. Function requires pre-calculation of a
+ * 32*vlen byte constant array based on the input coefficients.
+ *
+ * @requires SSE4.1
+ * @param len    Length of each vector in bytes. Must be >= 16.
+ * @param vlen   Number of vector sources.
+ * @param gftbls Pointer to 32*vlen byte array of pre-calculated constants based
+ *               on the array of input coefficients.
+ * @param src    Array of pointers to source inputs.
+ * @param dest   Pointer to destination data array.
+ * @returns none
+ */
+
+void gf_vect_dot_prod_sse(int len, int vlen, unsigned char *gftbls,
+                       unsigned char **src, unsigned char *dest);
+
+/**
+ * @brief GF(2^8) vector dot product.
+ *
+ * Does a GF(2^8) dot product across each byte of the input array and a constant
+ * set of coefficients to produce each byte of the output. Can be used for
+ * erasure coding encode and decode. Function requires pre-calculation of a
+ * 32*vlen byte constant array based on the input coefficients.
+ *
+ * @requires AVX
+ * @param len    Length of each vector in bytes. Must be >= 16.
+ * @param vlen   Number of vector sources.
+ * @param gftbls Pointer to 32*vlen byte array of pre-calculated constants based
+ *               on the array of input coefficients.
+ * @param src    Array of pointers to source inputs.
+ * @param dest   Pointer to destination data array.
+ * @returns none
+ */
+
+void gf_vect_dot_prod_avx(int len, int vlen, unsigned char *gftbls,
+                       unsigned char **src, unsigned char *dest);
+
+/**
+ * @brief GF(2^8) vector dot product.
+ *
+ * Does a GF(2^8) dot product across each byte of the input array and a constant
+ * set of coefficients to produce each byte of the output. Can be used for
+ * erasure coding encode and decode. Function requires pre-calculation of a
+ * 32*vlen byte constant array based on the input coefficients.
+ *
+ * @requires AVX2
+ * @param len    Length of each vector in bytes. Must be >= 32.
+ * @param vlen   Number of vector sources.
+ * @param gftbls Pointer to 32*vlen byte array of pre-calculated constants based
+ *               on the array of input coefficients.
+ * @param src    Array of pointers to source inputs.
+ * @param dest   Pointer to destination data array.
+ * @returns none
+ */
+
+void gf_vect_dot_prod_avx2(int len, int vlen, unsigned char *gftbls,
+                       unsigned char **src, unsigned char *dest);
+
+/**
+ * @brief GF(2^8) vector dot product with two outputs.
+ *
+ * Vector dot product optimized to calculate two ouputs at a time. Does two
+ * GF(2^8) dot products across each byte of the input array and two constant
+ * sets of coefficients to produce each byte of the outputs. Can be used for
+ * erasure coding encode and decode. Function requires pre-calculation of a
+ * 2*32*vlen byte constant array based on the two sets of input coefficients.
+ *
+ * @requires SSE4.1
+ * @param len    Length of each vector in bytes. Must be >= 16.
+ * @param vlen   Number of vector sources.
+ * @param gftbls Pointer to 2*32*vlen byte array of pre-calculated constants
+ *               based on the array of input coefficients.
+ * @param src    Array of pointers to source inputs.
+ * @param dest   Array of pointers to destination data buffers.
+ * @returns none
+ */
+
+void gf_2vect_dot_prod_sse(int len, int vlen, unsigned char *gftbls,
+                       unsigned char **src, unsigned char **dest);
+
+/**
+ * @brief GF(2^8) vector dot product with two outputs.
+ *
+ * Vector dot product optimized to calculate two ouputs at a time. Does two
+ * GF(2^8) dot products across each byte of the input array and two constant
+ * sets of coefficients to produce each byte of the outputs. Can be used for
+ * erasure coding encode and decode. Function requires pre-calculation of a
+ * 2*32*vlen byte constant array based on the two sets of input coefficients.
+ *
+ * @requires AVX
+ * @param len    Length of each vector in bytes. Must be >= 16.
+ * @param vlen   Number of vector sources.
+ * @param gftbls Pointer to 2*32*vlen byte array of pre-calculated constants
+ *               based on the array of input coefficients.
+ * @param src    Array of pointers to source inputs.
+ * @param dest   Array of pointers to destination data buffers.
+ * @returns none
+ */
+
+void gf_2vect_dot_prod_avx(int len, int vlen, unsigned char *gftbls,
+                       unsigned char **src, unsigned char **dest);
+
+/**
+ * @brief GF(2^8) vector dot product with two outputs.
+ *
+ * Vector dot product optimized to calculate two ouputs at a time. Does two
+ * GF(2^8) dot products across each byte of the input array and two constant
+ * sets of coefficients to produce each byte of the outputs. Can be used for
+ * erasure coding encode and decode. Function requires pre-calculation of a
+ * 2*32*vlen byte constant array based on the two sets of input coefficients.
+ *
+ * @requires AVX2
+ * @param len    Length of each vector in bytes. Must be >= 32.
+ * @param vlen   Number of vector sources.
+ * @param gftbls Pointer to 2*32*vlen byte array of pre-calculated constants
+ *               based on the array of input coefficients.
+ * @param src    Array of pointers to source inputs.
+ * @param dest   Array of pointers to destination data buffers.
+ * @returns none
+ */
+
+void gf_2vect_dot_prod_avx2(int len, int vlen, unsigned char *gftbls,
+                       unsigned char **src, unsigned char **dest);
+
+/**
+ * @brief GF(2^8) vector dot product with three outputs.
+ *
+ * Vector dot product optimized to calculate three ouputs at a time. Does three
+ * GF(2^8) dot products across each byte of the input array and three constant
+ * sets of coefficients to produce each byte of the outputs. Can be used for
+ * erasure coding encode and decode. Function requires pre-calculation of a
+ * 3*32*vlen byte constant array based on the three sets of input coefficients.
+ *
+ * @requires SSE4.1
+ * @param len    Length of each vector in bytes. Must be >= 16.
+ * @param vlen   Number of vector sources.
+ * @param gftbls Pointer to 3*32*vlen byte array of pre-calculated constants
+ *               based on the array of input coefficients.
+ * @param src    Array of pointers to source inputs.
+ * @param dest   Array of pointers to destination data buffers.
+ * @returns none
+ */
+
+void gf_3vect_dot_prod_sse(int len, int vlen, unsigned char *gftbls,
+                       unsigned char **src, unsigned char **dest);
+
+/**
+ * @brief GF(2^8) vector dot product with three outputs.
+ *
+ * Vector dot product optimized to calculate three ouputs at a time. Does three
+ * GF(2^8) dot products across each byte of the input array and three constant
+ * sets of coefficients to produce each byte of the outputs. Can be used for
+ * erasure coding encode and decode. Function requires pre-calculation of a
+ * 3*32*vlen byte constant array based on the three sets of input coefficients.
+ *
+ * @requires AVX
+ * @param len    Length of each vector in bytes. Must be >= 16.
+ * @param vlen   Number of vector sources.
+ * @param gftbls Pointer to 3*32*vlen byte array of pre-calculated constants
+ *               based on the array of input coefficients.
+ * @param src    Array of pointers to source inputs.
+ * @param dest   Array of pointers to destination data buffers.
+ * @returns none
+ */
+
+void gf_3vect_dot_prod_avx(int len, int vlen, unsigned char *gftbls,
+                       unsigned char **src, unsigned char **dest);
+
+/**
+ * @brief GF(2^8) vector dot product with three outputs.
+ *
+ * Vector dot product optimized to calculate three ouputs at a time. Does three
+ * GF(2^8) dot products across each byte of the input array and three constant
+ * sets of coefficients to produce each byte of the outputs. Can be used for
+ * erasure coding encode and decode. Function requires pre-calculation of a
+ * 3*32*vlen byte constant array based on the three sets of input coefficients.
+ *
+ * @requires AVX2
+ * @param len    Length of each vector in bytes. Must be >= 32.
+ * @param vlen   Number of vector sources.
+ * @param gftbls Pointer to 3*32*vlen byte array of pre-calculated constants
+ *               based on the array of input coefficients.
+ * @param src    Array of pointers to source inputs.
+ * @param dest   Array of pointers to destination data buffers.
+ * @returns none
+ */
+
+void gf_3vect_dot_prod_avx2(int len, int vlen, unsigned char *gftbls,
+                       unsigned char **src, unsigned char **dest);
+
+/**
+ * @brief GF(2^8) vector dot product with four outputs.
+ *
+ * Vector dot product optimized to calculate four ouputs at a time. Does four
+ * GF(2^8) dot products across each byte of the input array and four constant
+ * sets of coefficients to produce each byte of the outputs. Can be used for
+ * erasure coding encode and decode. Function requires pre-calculation of a
+ * 4*32*vlen byte constant array based on the four sets of input coefficients.
+ *
+ * @requires SSE4.1
+ * @param len    Length of each vector in bytes. Must be >= 16.
+ * @param vlen   Number of vector sources.
+ * @param gftbls Pointer to 4*32*vlen byte array of pre-calculated constants
+ *               based on the array of input coefficients.
+ * @param src    Array of pointers to source inputs.
+ * @param dest   Array of pointers to destination data buffers.
+ * @returns none
+ */
+
+void gf_4vect_dot_prod_sse(int len, int vlen, unsigned char *gftbls,
+                       unsigned char **src, unsigned char **dest);
+
+/**
+ * @brief GF(2^8) vector dot product with four outputs.
+ *
+ * Vector dot product optimized to calculate four ouputs at a time. Does four
+ * GF(2^8) dot products across each byte of the input array and four constant
+ * sets of coefficients to produce each byte of the outputs. Can be used for
+ * erasure coding encode and decode. Function requires pre-calculation of a
+ * 4*32*vlen byte constant array based on the four sets of input coefficients.
+ *
+ * @requires AVX
+ * @param len    Length of each vector in bytes. Must be >= 16.
+ * @param vlen   Number of vector sources.
+ * @param gftbls Pointer to 4*32*vlen byte array of pre-calculated constants
+ *               based on the array of input coefficients.
+ * @param src    Array of pointers to source inputs.
+ * @param dest   Array of pointers to destination data buffers.
+ * @returns none
+ */
+
+void gf_4vect_dot_prod_avx(int len, int vlen, unsigned char *gftbls,
+                       unsigned char **src, unsigned char **dest);
+
+/**
+ * @brief GF(2^8) vector dot product with four outputs.
+ *
+ * Vector dot product optimized to calculate four ouputs at a time. Does four
+ * GF(2^8) dot products across each byte of the input array and four constant
+ * sets of coefficients to produce each byte of the outputs. Can be used for
+ * erasure coding encode and decode. Function requires pre-calculation of a
+ * 4*32*vlen byte constant array based on the four sets of input coefficients.
+ *
+ * @requires AVX2
+ * @param len    Length of each vector in bytes. Must be >= 32.
+ * @param vlen   Number of vector sources.
+ * @param gftbls Pointer to 4*32*vlen byte array of pre-calculated constants
+ *               based on the array of input coefficients.
+ * @param src    Array of pointers to source inputs.
+ * @param dest   Array of pointers to destination data buffers.
+ * @returns none
+ */
+
+void gf_4vect_dot_prod_avx2(int len, int vlen, unsigned char *gftbls,
+                       unsigned char **src, unsigned char **dest);
+
+/**
+ * @brief GF(2^8) vector dot product with five outputs.
+ *
+ * Vector dot product optimized to calculate five ouputs at a time. Does five
+ * GF(2^8) dot products across each byte of the input array and five constant
+ * sets of coefficients to produce each byte of the outputs. Can be used for
+ * erasure coding encode and decode. Function requires pre-calculation of a
+ * 5*32*vlen byte constant array based on the five sets of input coefficients.
+ *
+ * @requires SSE4.1
+ * @param len    Length of each vector in bytes. Must >= 16.
+ * @param vlen   Number of vector sources.
+ * @param gftbls Pointer to 5*32*vlen byte array of pre-calculated constants
+ *               based on the array of input coefficients.
+ * @param src    Array of pointers to source inputs.
+ * @param dest   Array of pointers to destination data buffers.
+ * @returns none
+ */
+
+void gf_5vect_dot_prod_sse(int len, int vlen, unsigned char *gftbls,
+                       unsigned char **src, unsigned char **dest);
+
+/**
+ * @brief GF(2^8) vector dot product with five outputs.
+ *
+ * Vector dot product optimized to calculate five ouputs at a time. Does five
+ * GF(2^8) dot products across each byte of the input array and five constant
+ * sets of coefficients to produce each byte of the outputs. Can be used for
+ * erasure coding encode and decode. Function requires pre-calculation of a
+ * 5*32*vlen byte constant array based on the five sets of input coefficients.
+ *
+ * @requires AVX
+ * @param len    Length of each vector in bytes. Must >= 16.
+ * @param vlen   Number of vector sources.
+ * @param gftbls Pointer to 5*32*vlen byte array of pre-calculated constants
+ *               based on the array of input coefficients.
+ * @param src    Array of pointers to source inputs.
+ * @param dest   Array of pointers to destination data buffers.
+ * @returns none
+ */
+
+void gf_5vect_dot_prod_avx(int len, int vlen, unsigned char *gftbls,
+                       unsigned char **src, unsigned char **dest);
+
+/**
+ * @brief GF(2^8) vector dot product with five outputs.
+ *
+ * Vector dot product optimized to calculate five ouputs at a time. Does five
+ * GF(2^8) dot products across each byte of the input array and five constant
+ * sets of coefficients to produce each byte of the outputs. Can be used for
+ * erasure coding encode and decode. Function requires pre-calculation of a
+ * 5*32*vlen byte constant array based on the five sets of input coefficients.
+ *
+ * @requires AVX2
+ * @param len    Length of each vector in bytes. Must >= 32.
+ * @param vlen   Number of vector sources.
+ * @param gftbls Pointer to 5*32*vlen byte array of pre-calculated constants
+ *               based on the array of input coefficients.
+ * @param src    Array of pointers to source inputs.
+ * @param dest   Array of pointers to destination data buffers.
+ * @returns none
+ */
+
+void gf_5vect_dot_prod_avx2(int len, int vlen, unsigned char *gftbls,
+                       unsigned char **src, unsigned char **dest);
+
+/**
+ * @brief GF(2^8) vector dot product with six outputs.
+ *
+ * Vector dot product optimized to calculate six ouputs at a time. Does six
+ * GF(2^8) dot products across each byte of the input array and six constant
+ * sets of coefficients to produce each byte of the outputs. Can be used for
+ * erasure coding encode and decode. Function requires pre-calculation of a
+ * 6*32*vlen byte constant array based on the six sets of input coefficients.
+ *
+ * @requires SSE4.1
+ * @param len    Length of each vector in bytes. Must be >= 16.
+ * @param vlen   Number of vector sources.
+ * @param gftbls Pointer to 6*32*vlen byte array of pre-calculated constants
+ *               based on the array of input coefficients.
+ * @param src    Array of pointers to source inputs.
+ * @param dest   Array of pointers to destination data buffers.
+ * @returns none
+ */
+
+void gf_6vect_dot_prod_sse(int len, int vlen, unsigned char *gftbls,
+                       unsigned char **src, unsigned char **dest);
+
+/**
+ * @brief GF(2^8) vector dot product with six outputs.
+ *
+ * Vector dot product optimized to calculate six ouputs at a time. Does six
+ * GF(2^8) dot products across each byte of the input array and six constant
+ * sets of coefficients to produce each byte of the outputs. Can be used for
+ * erasure coding encode and decode. Function requires pre-calculation of a
+ * 6*32*vlen byte constant array based on the six sets of input coefficients.
+ *
+ * @requires AVX
+ * @param len    Length of each vector in bytes. Must be >= 16.
+ * @param vlen   Number of vector sources.
+ * @param gftbls Pointer to 6*32*vlen byte array of pre-calculated constants
+ *               based on the array of input coefficients.
+ * @param src    Array of pointers to source inputs.
+ * @param dest   Array of pointers to destination data buffers.
+ * @returns none
+ */
+
+void gf_6vect_dot_prod_avx(int len, int vlen, unsigned char *gftbls,
+                       unsigned char **src, unsigned char **dest);
+
+/**
+ * @brief GF(2^8) vector dot product with six outputs.
+ *
+ * Vector dot product optimized to calculate six ouputs at a time. Does six
+ * GF(2^8) dot products across each byte of the input array and six constant
+ * sets of coefficients to produce each byte of the outputs. Can be used for
+ * erasure coding encode and decode. Function requires pre-calculation of a
+ * 6*32*vlen byte constant array based on the six sets of input coefficients.
+ *
+ * @requires AVX2
+ * @param len    Length of each vector in bytes. Must be >= 32.
+ * @param vlen   Number of vector sources.
+ * @param gftbls Pointer to 6*32*vlen byte array of pre-calculated constants
+ *               based on the array of input coefficients.
+ * @param src    Array of pointers to source inputs.
+ * @param dest   Array of pointers to destination data buffers.
+ * @returns none
+ */
+
+void gf_6vect_dot_prod_avx2(int len, int vlen, unsigned char *gftbls,
+                       unsigned char **src, unsigned char **dest);
+
+/**
+ * @brief GF(2^8) vector dot product, runs baseline version.
+ *
+ * Does a GF(2^8) dot product across each byte of the input array and a constant
+ * set of coefficients to produce each byte of the output. Can be used for
+ * erasure coding encode and decode. Function requires pre-calculation of a
+ * 32*vlen byte constant array based on the input coefficients.
+ *
+ * @param len    Length of each vector in bytes. Must be >= 16.
+ * @param vlen   Number of vector sources.
+ * @param gftbls Pointer to 32*vlen byte array of pre-calculated constants based
+ *               on the array of input coefficients. Only elements 32*CONST*j + 1
+ *               of this array are used, where j = (0, 1, 2...) and CONST is the
+ *               number of elements in the array of input coefficients. The
+ *               elements used correspond to the original input coefficients.
+ * @param src    Array of pointers to source inputs.
+ * @param dest   Pointer to destination data array.
+ * @returns none
+ */
+
+void gf_vect_dot_prod_base(int len, int vlen, unsigned char *gftbls,
+                        unsigned char **src, unsigned char *dest);
+
+/**
+ * @brief GF(2^8) vector dot product, runs appropriate version.
+ *
+ * Does a GF(2^8) dot product across each byte of the input array and a constant
+ * set of coefficients to produce each byte of the output. Can be used for
+ * erasure coding encode and decode. Function requires pre-calculation of a
+ * 32*vlen byte constant array based on the input coefficients.
+ *
+ * This function determines what instruction sets are enabled and
+ * selects the appropriate version at runtime.
+ *
+ * @param len    Length of each vector in bytes. Must be >= 32.
+ * @param vlen   Number of vector sources.
+ * @param gftbls Pointer to 32*vlen byte array of pre-calculated constants based
+ *               on the array of input coefficients.
+ * @param src    Array of pointers to source inputs.
+ * @param dest   Pointer to destination data array.
+ * @returns none
+ */
+
+void gf_vect_dot_prod(int len, int vlen, unsigned char *gftbls,
+                        unsigned char **src, unsigned char *dest);
+
+/**********************************************************************
+ * The remaining are lib support functions used in GF(2^8) operations.
+ */
+
+/**
+ * @brief Single element GF(2^8) multiply.
+ *
+ * @param a  Multiplicand a
+ * @param b  Multiplicand b
+ * @returns  Product of a and b in GF(2^8)
+ */
+
+unsigned char gf_mul(unsigned char a, unsigned char b);
+
+/**
+ * @brief Single element GF(2^8) inverse.
+ *
+ * @param a  Input element
+ * @returns  Field element b such that a x b = {1}
+ */
+
+unsigned char gf_inv(unsigned char a);
+
+/**
+ * @brief Generate a matrix of coefficients to be used for encoding.
+ *
+ * Vandermonde matrix example of encoding coefficients where high portion of
+ * matrix is identity matrix I and lower portion is constructed as 2^{i*(j-k+1)}
+ * i:{0,k-1} j:{k,m-1}. Commonly used method for choosing coefficients in
+ * erasure encoding but does not guarantee invertable for every sub matrix.  For
+ * large k it is possible to find cases where the decode matrix chosen from
+ * sources and parity not in erasure are not invertable. Users may want to
+ * adjust for k > 5.
+ *
+ * @param a  [mxk] array to hold coefficients
+ * @param m  number of rows in matrix corresponding to srcs + parity.
+ * @param k  number of columns in matrix corresponding to srcs.
+ * @returns  none
+ */
+
+void gf_gen_rs_matrix(unsigned char *a, int m, int k);
+
+/**
+ * @brief Generate a Cauchy matrix of coefficients to be used for encoding.
+ *
+ * Cauchy matrix example of encoding coefficients where high portion of matrix
+ * is identity matrix I and lower portion is constructed as 1/(i + j) | i != j,
+ * i:{0,k-1} j:{k,m-1}.  Any sub-matrix of a Cauchy matrix should be invertable.
+ *
+ * @param a  [mxk] array to hold coefficients
+ * @param m  number of rows in matrix corresponding to srcs + parity.
+ * @param k  number of columns in matrix corresponding to srcs.
+ * @returns  none
+ */
+
+void gf_gen_cauchy1_matrix(unsigned char *a, int m, int k);
+
+/**
+ * @brief Invert a matrix in GF(2^8)
+ *
+ * @param in  input matrix
+ * @param out output matrix such that [in] x [out] = [I] - identity matrix
+ * @param n   size of matrix [nxn]
+ * @returns 0 successful, other fail on singular input matrix
+ */
+
+int gf_invert_matrix(unsigned char *in, unsigned char *out, const int n);
+
+/*************************************************************/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_ERASURE_CODE_H_

diff --git a/src/erasure-code/isa/isa-l/include/gf_vect_mul.h b/src/erasure-code/isa/isa-l/include/gf_vect_mul.h
new file mode 100644 (file)
index 0000000..ef19845
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/include/gf_vect_mul.h
@@ -0,0 +1,148 @@
+/**********************************************************************
+  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in
+      the documentation and/or other materials provided with the
+      distribution.
+    * Neither the name of Intel Corporation nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**********************************************************************/
+
+
+#ifndef _GF_VECT_MUL_H
+#define _GF_VECT_MUL_H
+
+/**
+ *  @file gf_vect_mul.h
+ *  @brief Interface to functions for vector (block) multiplication in GF(2^8).
+ *
+ *  This file defines the interface to routines used in fast RAID rebuild and
+ *  erasure codes.
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+ /**
+ * @brief GF(2^8) vector multiply by constant.
+ *
+ * Does a GF(2^8) vector multiply b = Ca where a and b are arrays and C
+ * is a single field element in GF(2^8). Can be used for RAID6 rebuild
+ * and partial write functions. Function requires pre-calculation of a
+ * 32-element constant array based on constant C. gftbl(C) = {C{00},
+ * C{01}, C{02}, ... , C{0f} }, {C{00}, C{10}, C{20}, ... , C{f0} }. Len
+ * and src must be aligned to 32B.
+
+ * @requires SSE4.1
+ * @param len   Length of vector in bytes. Must be aligned to 32B.
+ * @param gftbl Pointer to 32-byte array of pre-calculated constants based on C.
+ * @param src   Pointer to src data array. Must be aligned to 32B.
+ * @param dest  Pointer to destination data array. Must be aligned to 32B.
+ * @returns 0 pass, other fail
+ */
+
+int gf_vect_mul_sse(int len, unsigned char *gftbl, void *src, void *dest);
+
+
+ /**
+ * @brief GF(2^8) vector multiply by constant.
+ *
+ * Does a GF(2^8) vector multiply b = Ca where a and b are arrays and C
+ * is a single field element in GF(2^8). Can be used for RAID6 rebuild
+ * and partial write functions. Function requires pre-calculation of a
+ * 32-element constant array based on constant C. gftbl(C) = {C{00},
+ * C{01}, C{02}, ... , C{0f} }, {C{00}, C{10}, C{20}, ... , C{f0} }. Len
+ * and src must be aligned to 32B.
+
+ * @requires AVX
+ * @param len   Length of vector in bytes. Must be aligned to 32B.
+ * @param gftbl Pointer to 32-byte array of pre-calculated constants based on C.
+ * @param src   Pointer to src data array. Must be aligned to 32B.
+ * @param dest  Pointer to destination data array. Must be aligned to 32B.
+ * @returns 0 pass, other fail
+ */
+
+int gf_vect_mul_avx(int len, unsigned char *gftbl, void *src, void *dest);
+
+
+/**
+ * @brief GF(2^8) vector multiply by constant, runs appropriate version.
+ *
+ * Does a GF(2^8) vector multiply b = Ca where a and b are arrays and C
+ * is a single field element in GF(2^8). Can be used for RAID6 rebuild
+ * and partial write functions. Function requires pre-calculation of a
+ * 32-element constant array based on constant C. gftbl(C) = {C{00},
+ * C{01}, C{02}, ... , C{0f} }, {C{00}, C{10}, C{20}, ... , C{f0} }.
+ * Len and src must be aligned to 32B.
+ *
+ * This function determines what instruction sets are enabled
+ * and selects the appropriate version at runtime.
+ *
+ * @param len   Length of vector in bytes. Must be aligned to 32B.
+ * @param gftbl Pointer to 32-byte array of pre-calculated constants based on C.
+ * @param src   Pointer to src data array. Must be aligned to 32B.
+ * @param dest  Pointer to destination data array. Must be aligned to 32B.
+ * @returns 0 pass, other fail
+ */
+
+int gf_vect_mul(int len, unsigned char *gftbl, void *src, void *dest);
+
+
+/**
+ * @brief Initialize 32-byte constant array for GF(2^8) vector multiply
+ *
+ * Calculates array {C{00}, C{01}, C{02}, ... , C{0f} }, {C{00}, C{10},
+ * C{20}, ... , C{f0} } as required by other fast vector multiply
+ * functions.
+ * @param c     Constant input.
+ * @param gftbl Table output.
+ */
+
+void gf_vect_mul_init(unsigned char c, unsigned char* gftbl);
+
+
+/**
+ * @brief GF(2^8) vector multiply by constant, runs baseline version.
+ *
+ * Does a GF(2^8) vector multiply b = Ca where a and b are arrays and C
+ * is a single field element in GF(2^8). Can be used for RAID6 rebuild
+ * and partial write functions. Function requires pre-calculation of a
+ * 32-element constant array based on constant C. gftbl(C) = {C{00},
+ * C{01}, C{02}, ... , C{0f} }, {C{00}, C{10}, C{20}, ... , C{f0} }. Len
+ * and src must be aligned to 32B.
+ *
+ * @param len   Length of vector in bytes. Must be aligned to 32B.
+ * @param a    Pointer to 32-byte array of pre-calculated constants based on C.
+ *             only use 2nd element is used.
+ * @param src   Pointer to src data array. Must be aligned to 32B.
+ * @param dest  Pointer to destination data array. Must be aligned to 32B.
+ */
+
+void gf_vect_mul_base(int len, unsigned char *a, unsigned char *src,
+                       unsigned char *dest);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //_GF_VECT_MUL_H

diff --git a/src/erasure-code/isa/isa-l/include/reg_sizes.asm b/src/erasure-code/isa/isa-l/include/reg_sizes.asm
new file mode 100644 (file)
index 0000000..ed21252
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/include/reg_sizes.asm
@@ -0,0 +1,96 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+%define EFLAGS_HAS_CPUID        (1<<21)
+%define FLAG_CPUID1_ECX_CLMUL   (1<<1)
+%define FLAG_CPUID1_EDX_SSE2    (1<<26)
+%define FLAG_CPUID1_ECX_SSE3   (1)
+%define FLAG_CPUID1_ECX_SSE4_1  (1<<19)
+%define FLAG_CPUID1_ECX_SSE4_2  (1<<20)
+%define FLAG_CPUID1_ECX_POPCNT  (1<<23)
+%define FLAG_CPUID1_ECX_AESNI   (1<<25)
+%define FLAG_CPUID1_ECX_OSXSAVE (1<<27)
+%define FLAG_CPUID1_ECX_AVX     (1<<28)
+%define FLAG_CPUID1_EBX_AVX2    (1<<5)
+%define FLAG_XGETBV_EAX_XMM_YMM        0x6
+
+%define FLAG_CPUID1_EAX_AVOTON 0x000406d0
+
+; define d and w variants for registers
+
+%define        raxd    eax
+%define raxw   ax
+%define raxb   al
+
+%define        rbxd    ebx
+%define rbxw   bx
+%define rbxb   bl
+
+%define        rcxd    ecx
+%define rcxw   cx
+%define rcxb   cl
+
+%define        rdxd    edx
+%define rdxw   dx
+%define rdxb   dl
+
+%define        rsid    esi
+%define rsiw   si
+%define rsib   sil
+
+%define        rdid    edi
+%define rdiw   di
+%define rdib   dil
+
+%define        rbpd    ebp
+%define rbpw   bp
+%define rbpb   bpl
+
+%define ymm0x xmm0
+%define ymm1x xmm1
+%define ymm2x xmm2
+%define ymm3x xmm3
+%define ymm4x xmm4
+%define ymm5x xmm5
+%define ymm6x xmm6
+%define ymm7x xmm7
+%define ymm8x xmm8
+%define ymm9x xmm9
+%define ymm10x xmm10
+%define ymm11x xmm11
+%define ymm12x xmm12
+%define ymm13x xmm13
+%define ymm14x xmm14
+%define ymm15x xmm15
+
+%define DWORD(reg) reg %+ d
+%define WORD(reg)  reg %+ w
+%define BYTE(reg)  reg %+ b
+
+%define XWORD(reg) reg %+ x

diff --git a/src/erasure-code/isa/isa-l/include/types.h b/src/erasure-code/isa/isa-l/include/types.h
new file mode 100644 (file)
index 0000000..0feed47
--- /dev/null
+++ b/src/erasure-code/isa/isa-l/include/types.h
@@ -0,0 +1,80 @@
+/**********************************************************************
+  Copyright(c) 2011-2014 Intel Corporation All rights reserved.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in
+      the documentation and/or other materials provided with the
+      distribution.
+    * Neither the name of Intel Corporation nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**********************************************************************/
+
+
+/**
+ *  @file  types.h
+ *  @brief Defines standard width types.
+ *
+ */
+
+#ifndef __TYPES_H
+#define __TYPES_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef __unix__
+#ifdef __MINGW32__
+# include <_mingw.h>
+#endif
+typedef unsigned __int64 UINT64;
+typedef          __int64  INT64;
+typedef unsigned __int32 UINT32;
+typedef unsigned __int16 UINT16;
+typedef unsigned char    UINT8;
+#else
+typedef unsigned long int  UINT64;
+typedef          long int   INT64;
+typedef unsigned int       UINT32;
+typedef unsigned short int UINT16;
+typedef unsigned char      UINT8;
+#endif
+
+
+#ifdef __unix__
+# define DECLARE_ALIGNED(decl, alignval) decl __attribute__((aligned(alignval)))
+# define __forceinline static inline
+#else
+# define DECLARE_ALIGNED(decl, alignval) __declspec(align(alignval)) decl
+# define posix_memalign(p, algn, len) (NULL == (*((char**)(p)) = (void*) _aligned_malloc(len, algn)))
+#endif
+
+#ifdef DEBUG
+# define DEBUG_PRINT(x) printf x
+#else
+# define DEBUG_PRINT(x) do {} while (0)
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  //__TYPES_H

diff --git a/src/erasure-code/isa/xor_op.cc b/src/erasure-code/isa/xor_op.cc
new file mode 100644 (file)
index 0000000..f369303
--- /dev/null
+++ b/src/erasure-code/isa/xor_op.cc
@@ -0,0 +1,177 @@
+/*
+ * Ceph - scalable distributed file system
+ *
+ * Copyright (C) 2014 CERN (Switzerland)
+ *                                                                                                                                                                                                            * Author: Andreas-Joachim Peters <Andreas.Joachim.Peters@cern.ch>                                                                                                                                            *
+ *  This library is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU Lesser General Public
+ *  License as published by the Free Software Foundation; either
+ *  version 2.1 of the License, or (at your option) any later version.
+ *
+ */
+
+// -----------------------------------------------------------------------------
+#include "xor_op.h"
+#include <stdio.h>
+#include "arch/intel.h"
+// -----------------------------------------------------------------------------
+
+
+// -----------------------------------------------------------------------------
+void
+// -----------------------------------------------------------------------------
+byte_xor (unsigned char* cw, unsigned char* dw, unsigned char* ew)
+// -----------------------------------------------------------------------------
+{
+  while (cw < ew)
+    *dw++ ^= *cw++;
+}
+
+// -----------------------------------------------------------------------------
+void
+// -----------------------------------------------------------------------------
+vector_xor (vector_op_t* cw,
+           vector_op_t* dw,
+           vector_op_t* ew)
+// -----------------------------------------------------------------------------
+{
+  assert(is_aligned(cw,EC_ISA_VECTOR_OP_WORDSIZE));
+  assert(is_aligned(dw,EC_ISA_VECTOR_OP_WORDSIZE));
+  assert(is_aligned(ew,EC_ISA_VECTOR_OP_WORDSIZE));
+  while (cw < ew) {
+    *dw++ ^= *cw++;
+  }
+}
+
+
+// -----------------------------------------------------------------------------
+void
+// -----------------------------------------------------------------------------
+region_xor (unsigned char** src,
+           unsigned char* parity,
+           int src_size,
+           unsigned size)
+{
+  if (!size) {
+    // nothing to do
+    return;
+  }
+
+  if (!src_size) {
+    // nothing to do
+    return;
+  }
+
+  if (src_size==1) {
+    // just copy source to parity
+    memcpy(parity, src[0], size);
+    return;
+  }
+
+  unsigned size_left = size;
+
+  // ----------------------------------------------------------
+  // region or vector XOR operations require aligned addresses
+  // ----------------------------------------------------------
+
+  bool src_aligned=true;
+  for (int i=0; i< src_size; i++) {
+    src_aligned &= is_aligned(src[i], EC_ISA_VECTOR_OP_WORDSIZE);
+  }
+
+  if ( src_aligned &&
+       is_aligned(parity,EC_ISA_VECTOR_OP_WORDSIZE) ) {
+
+#ifdef __x86_64__
+    if (ceph_arch_intel_sse2) {
+      // -----------------------------
+      // use SSE2 region xor function
+      // -----------------------------
+      unsigned region_size =
+       ( size / EC_ISA_VECTOR_SSE2_WORDSIZE ) * EC_ISA_VECTOR_SSE2_WORDSIZE;
+
+      size_left -= region_size;
+      // 64-byte region xor
+      region_sse2_xor((char**)src, (char*)parity, src_size, region_size);
+    }
+    else
+#endif
+    {
+      // --------------------------------------------
+      // use region xor based on vector xor operation
+      // --------------------------------------------
+      unsigned vector_words = size / EC_ISA_VECTOR_OP_WORDSIZE ;
+      unsigned vector_size = vector_words * EC_ISA_VECTOR_OP_WORDSIZE ;
+      memcpy(parity, src[0], vector_size);
+
+      size_left -= vector_size;
+      vector_op_t* p_vec = (vector_op_t*) parity;
+      for (int i=1; i< src_size; i++) {
+       vector_op_t* s_vec = (vector_op_t*) src[i];
+       vector_op_t* e_vec = s_vec + vector_words;
+       vector_xor( s_vec, p_vec, e_vec );
+      }
+    }
+  }
+
+  if (size_left)
+  {
+    // --------------------------------------------------
+    // xor the not aligned part with byte-wise region xor
+    // --------------------------------------------------
+    memcpy(parity+size-size_left, src[0]+size-size_left, size_left);
+    for (int i=1; i< src_size; i++) {
+      byte_xor( src[i]+size-size_left, parity+size-size_left, src[i]+size);
+    }
+  }
+}
+
+// -----------------------------------------------------------------------------
+void
+// -----------------------------------------------------------------------------
+region_sse2_xor (char** src,
+                char* parity,
+                int src_size,
+                unsigned size)
+// -----------------------------------------------------------------------------
+{
+#ifdef __x86_64__
+  assert(!(size % EC_ISA_VECTOR_SSE2_WORDSIZE));
+  unsigned char* p;
+  int d, l;
+  unsigned i;
+  unsigned char* vbuf[256];
+
+  for (int v=0; v< src_size; v++) {
+    vbuf[v] = (unsigned char*) src[v];
+  }
+
+  l = src_size;
+  p = (unsigned char*) parity;
+
+  for (i = 0; i < size; i += EC_ISA_VECTOR_SSE2_WORDSIZE) {
+    asm volatile("movdqa %0,%%xmm0" : : "m" (vbuf[0][i]));
+    asm volatile("movdqa %0,%%xmm1" : : "m" (vbuf[0][i + 16]));
+    asm volatile("movdqa %0,%%xmm2" : : "m" (vbuf[0][i + 32]));
+    asm volatile("movdqa %0,%%xmm3" : : "m" (vbuf[0][i + 48]));
+
+    for (d = 1; d < l; d++) {
+      asm volatile("movdqa %0,%%xmm4" : : "m" (vbuf[d][i]));
+      asm volatile("movdqa %0,%%xmm5" : : "m" (vbuf[d][i + 16]));
+      asm volatile("movdqa %0,%%xmm6" : : "m" (vbuf[d][i + 32]));
+      asm volatile("movdqa %0,%%xmm7" : : "m" (vbuf[d][i + 48]));
+      asm volatile("pxor %xmm4,%xmm0");
+      asm volatile("pxor %xmm5,%xmm1");
+      asm volatile("pxor %xmm6,%xmm2");
+      asm volatile("pxor %xmm7,%xmm3");
+    }
+    asm volatile("movntdq %%xmm0,%0" : "=m" (p[i]));
+    asm volatile("movntdq %%xmm1,%0" : "=m" (p[i + 16]));
+    asm volatile("movntdq %%xmm2,%0" : "=m" (p[i + 32]));
+    asm volatile("movntdq %%xmm3,%0" : "=m" (p[i + 48]));
+  }
+
+  asm volatile("sfence" : : : "memory");
+#endif // __x86_64__
+  return;
+}

diff --git a/src/erasure-code/isa/xor_op.h b/src/erasure-code/isa/xor_op.h
new file mode 100644 (file)
index 0000000..894e662
--- /dev/null
+++ b/src/erasure-code/isa/xor_op.h
@@ -0,0 +1,87 @@
+/*
+ * Ceph - scalable distributed file system
+ *
+ * Copyright (C) 2014 CERN (Switzerland)
+ *                                                                                                                                                                                                           \
+ * Author: Andreas-Joachim Peters <Andreas.Joachim.Peters@cern.ch>                                                                                                                                           \
+ *
+ *  This library is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU Lesser General Public
+ *  License as published by the Free Software Foundation; either
+ *  version 2.1 of the License, or (at your option) any later version.
+ *
+ */
+
+#ifndef EC_ISA_XOR_OP_H
+#define EC_ISA_XOR_OP_H
+
+// -----------------------------------------------------------------------------
+#include <assert.h>
+#include <stdint.h>
+#include <string.h>
+// -----------------------------------------------------------------------------
+
+// -------------------------------------------------------------------------
+// declaration of 64/128-bit vector operations depending on availability
+// -------------------------------------------------------------------------
+// -------------------------------------------------------------------------
+
+#define EC_ISA_VECTOR_SSE2_WORDSIZE 64
+
+#if __GNUC__ > 4 || \
+  ( (__GNUC__ == 4) && (__GNUC_MINOR__ >= 4) ) ||\
+  (__clang__ == 1 )
+#ifdef EC_ISA_VECTOR_OP_DEBUG
+#pragma message "* using 128-bit vector operations in " __FILE__
+#endif
+
+// -------------------------------------------------------------------------
+// use 128-bit pointer
+// -------------------------------------------------------------------------
+typedef long vector_op_t __attribute__ ((vector_size (16)));
+#define EC_ISA_VECTOR_OP_WORDSIZE 16
+#else
+// -------------------------------------------------------------------------
+// use 64-bit pointer
+// -------------------------------------------------------------------------
+typedef unsigned long long vector_op_t;
+#define EC_ISA_VECTOR_OP_WORDSIZE 8
+#endif
+
+
+// -------------------------------------------------------------------------
+// check if a pointer is aligend to byte_count
+// -------------------------------------------------------------------------
+#define is_aligned(POINTER, BYTE_COUNT) \
+  (((uintptr_t)(const void *)(POINTER)) % (BYTE_COUNT) == 0)
+
+// -------------------------------------------------------------------------
+// compute byte-wise XOR of cw and dw block, ew contains the end address of cw
+// -------------------------------------------------------------------------
+void
+byte_xor (unsigned char* cw, unsigned char* dw, unsigned char* ew);
+
+// -------------------------------------------------------------------------
+// compute word-wise XOR of cw and dw block, ew contains the end address of cw
+// -------------------------------------------------------------------------
+void
+vector_xor (vector_op_t* cw, vector_op_t* dw, vector_op_t* ew);
+
+// -------------------------------------------------------------------------
+// compute region XOR like parity = src[0] ^ src[1] ... ^ src[src_size-]
+// -------------------------------------------------------------------------
+void
+region_xor (unsigned char** src, unsigned char* parity, int src_size, unsigned size);
+
+// -------------------------------------------------------------------------
+// compute region XOR like parity = src[0] ^ src[1] ... ^ src[src_size-]
+// using SSE2 64-byte operations
+// -------------------------------------------------------------------------
+void
+region_sse2_xor (char** src /* array of 64-byte aligned source pointer to xor */ ,
+                 char* parity     /* 64-byte aligned output pointer containing the parity */ ,
+                 int src_size     /* size of the source pointer array */ ,
+                 unsigned size    /* size of the region to xor */ );
+
+
+#endif // EC_ISA_XOR_OP_H

diff --git a/src/test/erasure-code/Makefile.am b/src/test/erasure-code/Makefile.am
index fdbe003f6cec93c6caca851ff3afb07a65639de1..32f566baa26792beb22050907c046c5848d4024c 100644 (file)
--- a/src/test/erasure-code/Makefile.am
+++ b/src/test/erasure-code/Makefile.am
@@ -105,7 +105,25 @@ unittest_erasure_code_plugin_jerasure_LDADD += -ldl
 endif
 check_PROGRAMS += unittest_erasure_code_plugin_jerasure
 
+unittest_erasure_code_isa_SOURCES = test/erasure-code/TestErasureCodeIsa.cc
+unittest_erasure_code_isa_CXXFLAGS = ${AM_CXXFLAGS} ${UNITTEST_CXXFLAGS}
+unittest_erasure_code_isa_LDADD = $(LIBOSD) $(LIBCOMMON) $(UNITTEST_LDADD) $(CEPH_GLOBAL) .libs/libec_isa.la .libs/liberasure_code.la
+if LINUX
+unittest_erasure_code_isa_LDADD += -ldl
+endif
+check_PROGRAMS += unittest_erasure_code_isa
+
+unittest_erasure_code_plugin_isa_SOURCES = \
+       test/erasure-code/TestErasureCodePluginIsa.cc
+unittest_erasure_code_plugin_isa_CXXFLAGS = ${AM_CXXFLAGS} ${UNITTEST_CXXFLAGS}
+unittest_erasure_code_plugin_isa_LDADD = $(LIBOSD) $(LIBCOMMON) $(UNITTEST_LDADD) $(CEPH_GLOBAL) .libs/libec_isa.la .libs/liberasure_code.la
+if LINUX
+unittest_erasure_code_plugin_isa_LDADD += -ldl
+endif
+check_PROGRAMS += unittest_erasure_code_plugin_isa
+
 unittest_erasure_code_example_SOURCES = test/erasure-code/TestErasureCodeExample.cc 
+
 noinst_HEADERS += test/erasure-code/ErasureCodeExample.h
 unittest_erasure_code_example_CXXFLAGS = $(UNITTEST_CXXFLAGS)
 unittest_erasure_code_example_LDADD = $(LIBOSD) $(LIBCOMMON) $(UNITTEST_LDADD) $(CEPH_GLOBAL)

diff --git a/src/test/erasure-code/TestErasureCodeIsa.cc b/src/test/erasure-code/TestErasureCodeIsa.cc
new file mode 100644 (file)
index 0000000..d08d05a
--- /dev/null
+++ b/src/test/erasure-code/TestErasureCodeIsa.cc
@@ -0,0 +1,630 @@
+/*
+ * Ceph - scalable distributed file system
+ *
+ * Copyright (C) 2014 CERN (Switzerland)
+ *
+ * Author: Andreas-Joachim Peters <Andreas.Joachim.Peters@cern.ch>
+ *
+ *  This library is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU Lesser General Public
+ *  License as published by the Free Software Foundation; either
+ *  version 2.1 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <errno.h>
+
+#include "crush/CrushWrapper.h"
+#include "include/stringify.h"
+#include "global/global_init.h"
+#include "erasure-code/isa/ErasureCodeIsa.h"
+#include "common/ceph_argparse.h"
+#include "global/global_context.h"
+#include "gtest/gtest.h"
+
+template <typename T>
+class IsaErasureCodeTest : public ::testing::Test {
+public:
+};
+
+typedef ::testing::Types<
+ErasureCodeIsaDefault
+> IsaTypes;
+TYPED_TEST_CASE(IsaErasureCodeTest, IsaTypes);
+
+TYPED_TEST(IsaErasureCodeTest, encode_decode)
+{
+  TypeParam Isa;
+  map<std::string, std::string> parameters;
+  parameters["k"] = "2";
+  parameters["m"] = "2";
+  Isa.init(parameters);
+
+#define LARGE_ENOUGH 2048
+  bufferptr in_ptr(buffer::create_page_aligned(LARGE_ENOUGH));
+  in_ptr.zero();
+  in_ptr.set_length(0);
+  const char *payload =
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789";
+  in_ptr.append(payload, strlen(payload));
+  bufferlist in;
+  in.push_front(in_ptr);
+  int want_to_encode[] = {0, 1, 2, 3};
+  map<int, bufferlist> encoded;
+  EXPECT_EQ(0, Isa.encode(set<int>(want_to_encode, want_to_encode + 4),
+                          in,
+                          &encoded));
+  EXPECT_EQ(4u, encoded.size());
+  unsigned length = encoded[0].length();
+  EXPECT_EQ(0, strncmp(encoded[0].c_str(), in.c_str(), length));
+  EXPECT_EQ(0, strncmp(encoded[1].c_str(), in.c_str() + length,
+                       in.length() - length));
+
+
+  // all chunks are available
+  {
+    int want_to_decode[] = {0, 1};
+    map<int, bufferlist> decoded;
+    EXPECT_EQ(0, Isa.decode(set<int>(want_to_decode, want_to_decode + 2),
+                            encoded,
+                            &decoded));
+    EXPECT_EQ(2u, decoded.size());
+    EXPECT_EQ(length, decoded[0].length());
+    EXPECT_EQ(0, strncmp(decoded[0].c_str(), in.c_str(), length));
+    EXPECT_EQ(0, strncmp(decoded[1].c_str(), in.c_str() + length,
+                         in.length() - length));
+  }
+
+  // one data chunk is missing
+  {
+    map<int, bufferlist> degraded = encoded;
+
+    buffer::ptr enc1(buffer::create_page_aligned(LARGE_ENOUGH));
+    enc1.zero();
+    enc1.set_length(0);
+    enc1.append(encoded[1].c_str(), length);
+
+    degraded.erase(1);
+    EXPECT_EQ(3u, degraded.size());
+    int want_to_decode[] = {1};
+    map<int, bufferlist> decoded;
+    EXPECT_EQ(0, Isa.decode(set<int>(want_to_decode, want_to_decode + 1),
+                            degraded,
+                            &decoded));
+    // always decode all, regardless of want_to_decode
+    EXPECT_EQ(4u, decoded.size());
+    EXPECT_EQ(length, decoded[1].length());
+    EXPECT_EQ(0, strncmp(decoded[1].c_str(), enc1.c_str(), length));
+  }
+
+  // non-xor coding chunk is missing
+  {
+    map<int, bufferlist> degraded = encoded;
+
+    buffer::ptr enc3(buffer::create_page_aligned(LARGE_ENOUGH));
+    enc3.zero();
+    enc3.set_length(0);
+    enc3.append(encoded[3].c_str(), length);
+
+    degraded.erase(3);
+    EXPECT_EQ(3u, degraded.size());
+    int want_to_decode[] = {3};
+    map<int, bufferlist> decoded;
+    EXPECT_EQ(0, Isa.decode(set<int>(want_to_decode, want_to_decode + 1),
+                            degraded,
+                            &decoded));
+    // always decode all, regardless of want_to_decode
+    EXPECT_EQ(4u, decoded.size());
+    EXPECT_EQ(length, decoded[3].length());
+    EXPECT_EQ(0, strncmp(decoded[3].c_str(), enc3.c_str(), length));
+  }
+
+  // xor coding chunk is missing
+  {
+    map<int, bufferlist> degraded = encoded;
+
+    buffer::ptr enc2(buffer::create_page_aligned(LARGE_ENOUGH));
+    enc2.zero();
+    enc2.set_length(0);
+    enc2.append(encoded[2].c_str(), length);
+
+    degraded.erase(2);
+    EXPECT_EQ(3u, degraded.size());
+    int want_to_decode[] = {2};
+    map<int, bufferlist> decoded;
+    EXPECT_EQ(0, Isa.decode(set<int>(want_to_decode, want_to_decode + 1),
+                            degraded,
+                            &decoded));
+    // always decode all, regardless of want_to_decode
+    EXPECT_EQ(4u, decoded.size());
+    EXPECT_EQ(length, decoded[2].length());
+    EXPECT_EQ(0, strncmp(decoded[2].c_str(), enc2.c_str(), length));
+  }
+
+  // one data and one coding chunk is missing
+  {
+    map<int, bufferlist> degraded = encoded;
+
+    buffer::ptr enc3(buffer::create_page_aligned(LARGE_ENOUGH));
+    enc3.zero();
+    enc3.set_length(0);
+    enc3.append(encoded[3].c_str(), length);
+
+    degraded.erase(1);
+    degraded.erase(3);
+    EXPECT_EQ(2u, degraded.size());
+    int want_to_decode[] = {1, 3};
+    map<int, bufferlist> decoded;
+    EXPECT_EQ(0, Isa.decode(set<int>(want_to_decode, want_to_decode + 2),
+                            degraded,
+                            &decoded));
+    // always decode all, regardless of want_to_decode
+    EXPECT_EQ(4u, decoded.size());
+    EXPECT_EQ(length, decoded[1].length());
+    EXPECT_EQ(0, strncmp(decoded[3].c_str(), enc3.c_str(), length));
+  }
+
+  // two data chunks are missing
+  {
+    map<int, bufferlist> degraded = encoded;
+    degraded.erase(0);
+    degraded.erase(1);
+    EXPECT_EQ(2u, degraded.size());
+    int want_to_decode[] = {0, 1};
+    map<int, bufferlist> decoded;
+    EXPECT_EQ(0, Isa.decode(set<int>(want_to_decode, want_to_decode + 2),
+                            degraded,
+                            &decoded));
+    // always decode all, regardless of want_to_decode
+    EXPECT_EQ(4u, decoded.size());
+    EXPECT_EQ(length, decoded[0].length());
+    EXPECT_EQ(0, strncmp(decoded[0].c_str(), in.c_str(), length));
+    EXPECT_EQ(0, strncmp(decoded[1].c_str(), in.c_str() + length,
+                         in.length() - length));
+  }
+}
+
+TYPED_TEST(IsaErasureCodeTest, minimum_to_decode)
+{
+  TypeParam Isa;
+  map<std::string, std::string> parameters;
+  parameters["k"] = "2";
+  parameters["m"] = "2";
+  Isa.init(parameters);
+
+  //
+  // If trying to read nothing, the minimum is empty.
+  //
+  {
+    set<int> want_to_read;
+    set<int> available_chunks;
+    set<int> minimum;
+
+    EXPECT_EQ(0, Isa.minimum_to_decode(want_to_read,
+                                       available_chunks,
+                                       &minimum));
+    EXPECT_TRUE(minimum.empty());
+  }
+  //
+  // There is no way to read a chunk if none are available.
+  //
+  {
+    set<int> want_to_read;
+    set<int> available_chunks;
+    set<int> minimum;
+
+    want_to_read.insert(0);
+
+    EXPECT_EQ(-EIO, Isa.minimum_to_decode(want_to_read,
+                                          available_chunks,
+                                          &minimum));
+  }
+  //
+  // Reading a subset of the available chunks is always possible.
+  //
+  {
+    set<int> want_to_read;
+    set<int> available_chunks;
+    set<int> minimum;
+
+    want_to_read.insert(0);
+    available_chunks.insert(0);
+
+    EXPECT_EQ(0, Isa.minimum_to_decode(want_to_read,
+                                       available_chunks,
+                                       &minimum));
+    EXPECT_EQ(want_to_read, minimum);
+  }
+  //
+  // There is no way to read a missing chunk if there is less than k
+  // chunks available.
+  //
+  {
+    set<int> want_to_read;
+    set<int> available_chunks;
+    set<int> minimum;
+
+    want_to_read.insert(0);
+    want_to_read.insert(1);
+    available_chunks.insert(0);
+
+    EXPECT_EQ(-EIO, Isa.minimum_to_decode(want_to_read,
+                                          available_chunks,
+                                          &minimum));
+  }
+  //
+  // When chunks are not available, the minimum can be made of any
+  // chunks. For instance, to read 1 and 3 below the minimum could be
+  // 2 and 3 which may seem better because it contains one of the
+  // chunks to be read. But it won't be more efficient than retrieving
+  // 0 and 2 instead because, in both cases, the decode function will
+  // need to run the same recovery operation and use the same amount
+  // of CPU and memory.
+  //
+  {
+    set<int> want_to_read;
+    set<int> available_chunks;
+    set<int> minimum;
+
+    want_to_read.insert(1);
+    want_to_read.insert(3);
+    available_chunks.insert(0);
+    available_chunks.insert(2);
+    available_chunks.insert(3);
+
+    EXPECT_EQ(0, Isa.minimum_to_decode(want_to_read,
+                                       available_chunks,
+                                       &minimum));
+    EXPECT_EQ(2u, minimum.size());
+    EXPECT_EQ(0u, minimum.count(3));
+  }
+}
+
+TEST(IsaErasureCodeTest, encode)
+{
+  ErasureCodeIsaDefault Isa;
+  map<std::string, std::string> parameters;
+  parameters["k"] = "2";
+  parameters["m"] = "2";
+  Isa.init(parameters);
+
+  unsigned alignment = Isa.get_alignment();
+  {
+    //
+    // When the input bufferlist needs to be padded because
+    // it is not properly aligned, it is padded with zeros.
+    //
+    bufferlist in;
+    map<int, bufferlist> encoded;
+    int want_to_encode[] = {0, 1, 2, 3};
+    int trail_length = 2;
+    in.append(string(alignment + trail_length, 'X'));
+    EXPECT_EQ(0, Isa.encode(set<int>(want_to_encode, want_to_encode + 4),
+                            in,
+                            &encoded));
+    EXPECT_EQ(4u, encoded.size());
+    for (int i = 0; i < 4; i++)
+      EXPECT_EQ(alignment, encoded[i].length());
+    char *last_chunk = encoded[1].c_str();
+    EXPECT_EQ('X', last_chunk[0]);
+    EXPECT_EQ('\0', last_chunk[trail_length]);
+  }
+
+  {
+    //
+    // When only the first chunk is required, the encoded map only
+    // contains the first chunk. Although the encode
+    // internally allocated a buffer because of padding requirements
+    // and also computes the coding chunks, they are released before
+    // the return of the method, as shown when running the tests thru
+    // valgrind (there is no leak).
+    //
+    bufferlist in;
+    map<int, bufferlist> encoded;
+    set<int> want_to_encode;
+    want_to_encode.insert(0);
+    int trail_length = 2;
+    in.append(string(alignment + trail_length, 'X'));
+    EXPECT_EQ(0, Isa.encode(want_to_encode, in, &encoded));
+    EXPECT_EQ(1u, encoded.size());
+    EXPECT_EQ(alignment, encoded[0].length());
+  }
+}
+
+bool
+DecodeAndVerify(ErasureCodeIsaDefault& Isa, map<int, bufferlist> &degraded, set<int> want_to_decode, buffer::ptr* enc, int length)
+{
+  map<int, bufferlist> decoded;
+  bool ok;
+
+  // decode as requested
+  ok = Isa.decode(want_to_decode,
+                  degraded,
+                  &decoded);
+
+  for (int i = 0; i < (int) decoded.size(); i++) {
+    // compare all the buffers with their original
+    ok |= strncmp(decoded[i].c_str(), enc[i].c_str(), length);
+  }
+
+  return ok;
+}
+
+TYPED_TEST(IsaErasureCodeTest, isa_vandermonde_exhaustive)
+{
+  // Test all possible failure scenarios and reconstruction cases for
+  // a (12,4) configuration using the vandermonde matrix
+
+  TypeParam Isa;
+  map<std::string, std::string> parameters;
+  parameters["k"] = "12";
+  parameters["m"] = "4";
+  Isa.init(parameters);
+
+  int k = 12;
+  int m = 4;
+
+#define LARGE_ENOUGH 2048
+  bufferptr in_ptr(buffer::create_page_aligned(LARGE_ENOUGH));
+  in_ptr.zero();
+  in_ptr.set_length(0);
+  const char *payload =
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789";
+  in_ptr.append(payload, strlen(payload));
+  bufferlist in;
+  in.push_front(in_ptr);
+
+  set<int>want_to_encode;
+
+  map<int, bufferlist> encoded;
+  for (int i = 0; i < (k + m); i++) {
+    want_to_encode.insert(i);
+  }
+
+
+  EXPECT_EQ(0, Isa.encode(want_to_encode,
+                          in,
+                          &encoded));
+
+  EXPECT_EQ((unsigned) (k + m), encoded.size());
+
+  unsigned length = encoded[0].length();
+
+  for (int i = 0; i < k; i++) {
+    EXPECT_EQ(0, strncmp(encoded[i].c_str(), in.c_str() + (i * length), length));
+  }
+
+  buffer::ptr enc[k + m];
+  // create buffers with a copy of the original data to be able to compare it after decoding
+  {
+    for (int i = 0; i < (k + m); i++) {
+      buffer::ptr newenc(buffer::create_page_aligned(LARGE_ENOUGH));
+      enc[i] = newenc;
+      enc[i].zero();
+      enc[i].set_length(0);
+      enc[i].append(encoded[i].c_str(), length);
+    }
+  }
+
+  // loop through all possible loss scenarios
+  bool err = true;
+  int cnt_cf = 0;
+
+  for (int l1 = 0; l1 < (k + m); l1++) {
+    map<int, bufferlist> degraded = encoded;
+    set<int> want_to_decode;
+    degraded.erase(l1);
+    want_to_decode.insert(l1);
+    err = DecodeAndVerify(Isa, degraded, want_to_decode, enc, length);
+    EXPECT_EQ(0, err);
+    cnt_cf++;
+    for (int l2 = l1 + 1; l2 < (k + m); l2++) {
+      degraded.erase(l2);
+      want_to_decode.insert(l2);
+      err = DecodeAndVerify(Isa, degraded, want_to_decode, enc, length);
+      EXPECT_EQ(0, err);
+      cnt_cf++;
+      for (int l3 = l2 + 1; l3 < (k + m); l3++) {
+        degraded.erase(l3);
+        want_to_decode.insert(l3);
+        err = DecodeAndVerify(Isa, degraded, want_to_decode, enc, length);
+        EXPECT_EQ(0, err);
+        cnt_cf++;
+        for (int l4 = l3 + 1; l4 < (k + m); l4++) {
+          degraded.erase(l4);
+          want_to_decode.insert(l4);
+          err = DecodeAndVerify(Isa, degraded, want_to_decode, enc, length);
+          EXPECT_EQ(0, err);
+          degraded[l4] = encoded[l4];
+          want_to_decode.erase(l4);
+          cnt_cf++;
+        }
+        degraded[l3] = encoded[l3];
+        want_to_decode.erase(l3);
+      }
+      degraded[l2] = encoded[l2];
+      want_to_decode.erase(l2);
+    }
+    degraded[l1] = encoded[l1];
+    want_to_decode.erase(l1);
+  }
+  EXPECT_EQ(2516, cnt_cf);
+  EXPECT_EQ(2503, Isa.get_tbls_lru_size());
+}
+
+TYPED_TEST(IsaErasureCodeTest, isa_cauchy_exhaustive)
+{
+  // Test all possible failure scenarios and reconstruction cases for
+  // a (12,4) configuration using the cauchy matrix
+  TypeParam Isa(ErasureCodeIsaDefault::kCauchy);
+  map<std::string, std::string> parameters;
+  parameters["k"] = "12";
+  parameters["m"] = "4";
+  parameters["technique"] = "cauchy";
+
+  Isa.init(parameters);
+
+  int k = 12;
+  int m = 4;
+
+#define LARGE_ENOUGH 2048
+  bufferptr in_ptr(buffer::create_page_aligned(LARGE_ENOUGH));
+  in_ptr.zero();
+  in_ptr.set_length(0);
+  const char *payload =
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789";
+  in_ptr.append(payload, strlen(payload));
+  bufferlist in;
+  in.push_front(in_ptr);
+
+  set<int>want_to_encode;
+
+  map<int, bufferlist> encoded;
+  for (int i = 0; i < (k + m); i++) {
+    want_to_encode.insert(i);
+  }
+
+
+  EXPECT_EQ(0, Isa.encode(want_to_encode,
+                          in,
+                          &encoded));
+
+  EXPECT_EQ((unsigned) (k + m), encoded.size());
+
+  unsigned length = encoded[0].length();
+
+  for (int i = 0; i < k; i++) {
+    EXPECT_EQ(0, strncmp(encoded[i].c_str(), in.c_str() + (i * length), length));
+  }
+
+  buffer::ptr enc[k + m];
+  // create buffers with a copy of the original data to be able to compare it after decoding
+  {
+    for (int i = 0; i < (k + m); i++) {
+      buffer::ptr newenc(buffer::create_page_aligned(LARGE_ENOUGH));
+      enc[i] = newenc;
+      enc[i].zero();
+      enc[i].set_length(0);
+      enc[i].append(encoded[i].c_str(), length);
+    }
+  }
+
+  // loop through all possible loss scenarios
+  bool err = true;
+  int cnt_cf = 0;
+
+  for (int l1 = 0; l1 < (k + m); l1++) {
+    map<int, bufferlist> degraded = encoded;
+    set<int> want_to_decode;
+    degraded.erase(l1);
+    want_to_decode.insert(l1);
+    err = DecodeAndVerify(Isa, degraded, want_to_decode, enc, length);
+    EXPECT_EQ(0, err);
+    cnt_cf++;
+    for (int l2 = l1 + 1; l2 < (k + m); l2++) {
+      degraded.erase(l2);
+      want_to_decode.insert(l2);
+      err = DecodeAndVerify(Isa, degraded, want_to_decode, enc, length);
+      EXPECT_EQ(0, err);
+      cnt_cf++;
+      for (int l3 = l2 + 1; l3 < (k + m); l3++) {
+        degraded.erase(l3);
+        want_to_decode.insert(l3);
+        err = DecodeAndVerify(Isa, degraded, want_to_decode, enc, length);
+        EXPECT_EQ(0, err);
+        cnt_cf++;
+        for (int l4 = l3 + 1; l4 < (k + m); l4++) {
+          degraded.erase(l4);
+          want_to_decode.insert(l4);
+          err = DecodeAndVerify(Isa, degraded, want_to_decode, enc, length);
+          EXPECT_EQ(0, err);
+          degraded[l4] = encoded[l4];
+          want_to_decode.erase(l4);
+          cnt_cf++;
+        }
+        degraded[l3] = encoded[l3];
+        want_to_decode.erase(l3);
+      }
+      degraded[l2] = encoded[l2];
+      want_to_decode.erase(l2);
+    }
+    degraded[l1] = encoded[l1];
+    want_to_decode.erase(l1);
+  }
+  EXPECT_EQ(2516, cnt_cf);
+  EXPECT_EQ(2516, Isa.get_tbls_lru_size());
+}
+
+int main(int argc, char **argv)
+{
+  vector<const char*> args;
+  argv_to_vec(argc, (const char **) argv, args);
+
+  global_init(NULL, args, CEPH_ENTITY_TYPE_CLIENT, CODE_ENVIRONMENT_UTILITY, 0);
+  common_init_finish(g_ceph_context);
+
+  ::testing::InitGoogleTest(&argc, argv);
+  return RUN_ALL_TESTS();
+}
+
+/*
+ * Local Variables:
+ * compile-command: "cd ../.. ; make -j4 &&
+ *   make unittest_erasure_code_isa &&
+ *   valgrind --tool=memcheck --leak-check=full \
+ *      ./unittest_erasure_code_isa \
+ *      --gtest_filter=*.* --log-to-stderr=true --debug-osd=20"
+ * End:
+ */

diff --git a/src/test/erasure-code/TestErasureCodePluginIsa.cc b/src/test/erasure-code/TestErasureCodePluginIsa.cc
new file mode 100644 (file)
index 0000000..605bda0
--- /dev/null
+++ b/src/test/erasure-code/TestErasureCodePluginIsa.cc
@@ -0,0 +1,69 @@
+/*
+ * Ceph - scalable distributed file system
+ *
+ * Copyright (C) 2014 CERN (Switzerland)
+ *
+ * Author: Andreas-Joachim Peters <Andreas.Joachim.Peters@cern.ch>
+ *
+ *  This library is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU Lesser General Public
+ *  License as published by the Free Software Foundation; either
+ *  version 2.1 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <errno.h>
+#include "arch/probe.h"
+#include "arch/intel.h"
+#include "global/global_init.h"
+#include "erasure-code/ErasureCodePlugin.h"
+#include "common/ceph_argparse.h"
+#include "global/global_context.h"
+#include "gtest/gtest.h"
+
+TEST(ErasureCodePlugin, factory)
+{
+  ErasureCodePluginRegistry &instance = ErasureCodePluginRegistry::instance();
+  map<std::string,std::string> parameters;
+  parameters["directory"] = ".libs";
+  {
+    ErasureCodeInterfaceRef erasure_code;
+    EXPECT_FALSE(erasure_code);
+    EXPECT_EQ(-EIO, instance.factory("no-isa", parameters,
+                                        &erasure_code, cerr));
+    EXPECT_FALSE(erasure_code);
+  }
+  const char *techniques[] = {
+    "reed_sol_van",
+    0
+  };
+  for(const char **technique = techniques; *technique; technique++) {
+    ErasureCodeInterfaceRef erasure_code;
+    parameters["technique"] = *technique;
+    EXPECT_FALSE(erasure_code);
+    EXPECT_EQ(0, instance.factory("isa", parameters,
+                                  &erasure_code, cerr));
+    EXPECT_TRUE(erasure_code);
+  }
+}
+
+int main(int argc, char **argv)
+{
+  vector<const char*> args;
+  argv_to_vec(argc, (const char **)argv, args);
+
+  global_init(NULL, args, CEPH_ENTITY_TYPE_CLIENT, CODE_ENVIRONMENT_UTILITY, 0);
+  common_init_finish(g_ceph_context);
+
+  ::testing::InitGoogleTest(&argc, argv);
+  return RUN_ALL_TESTS();
+}
+
+/*
+ * Local Variables:
+ * compile-command: "cd ../.. ; make -j4 &&
+ *   make unittest_erasure_code_plugin_isa &&
+ *   valgrind --tool=memcheck ./unittest_erasure_code_plugin_isa \
+ *      --gtest_filter=*.* --log-to-stderr=true --debug-osd=20"
+ * End:
+ */