int ceph_arch_intel_ssse3 = 0;
int ceph_arch_intel_sse3 = 0;
int ceph_arch_intel_sse2 = 0;
+int ceph_arch_intel_aesni = 0;
#ifdef __x86_64__
#define CPUID_SSSE3 (1 << 9)
#define CPUID_SSE3 (1)
#define CPUID_SSE2 (1 << 26)
+#define CPUID_AESNI (1 << 25)
int ceph_arch_intel_probe(void)
{
if ((edx & CPUID_SSE2) != 0) {
ceph_arch_intel_sse2 = 1;
}
+ if ((ecx & CPUID_AESNI) != 0) {
+ ceph_arch_intel_aesni = 1;
+ }
return 0;
}
extern int ceph_arch_intel_ssse3; /* true if we have ssse 3 features */
extern int ceph_arch_intel_sse3; /* true if we have sse 3 features */
extern int ceph_arch_intel_sse2; /* true if we have sse 2 features */
+extern int ceph_arch_intel_aesni; /* true if we have aesni features */
+
extern int ceph_arch_intel_probe(void);
#ifdef __cplusplus