common/Cycles: Add high-precision counter support for riscv64

Signed-off-by: WenLei <lei.wen2@zte.com.cn>

diff --git a/src/common/Cycles.h b/src/common/Cycles.h
index b546479c2b3519609fd2429e19b0886a38f801f8..f12ea092f494906bba8eea59f3ace51481fa460d 100644 (file)
--- a/src/common/Cycles.h
+++ b/src/common/Cycles.h
@@ -84,6 +84,10 @@ class Cycles {
     uint64_t tsc;
     asm volatile("stck %0" : "=Q" (tsc) : : "cc");
     return tsc;
+#elif defined(__riscv) && __riscv_xlen == 64
+    uint64_t tsc;
+    asm volatile ("rdtime %0" : "=r" (tsc));
+    return tsc;
 #else
 #warning No high-precision counter available for your OS/arch
     return 0;